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SN65LVEL11 - 3.3 V ECL 1:2 Fanout Buffer - Texas Instruments

型  号:
SN65LVEL11
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405.50KB 共12页
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TI[TexasInstruments]
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http://www.ti.com/
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SN65LVEL11 - 3.3 V ECL 1:2 Fanout Buffer - Texas Instruments
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SN65LVEL11 www.ti.com ............................................................................................................................................................................................ SLLS927 – DECEMBER 2008 3.3 V ECL 1:2 Fanout Buffer 1 FEATURES 1:2 ECL Fanout Buffer Operating Range – PECL VCC = 3.0 V to 3.8 V With VEE = 0 V – NECL: VCC = 0 V with VEE = –3.0 to –3.8V 5 ps Skew Between Outputs Support for Clock Frequencies > 2.0 GHz 265 ps Typical Propagation Delay Deterministic Output Value for Open Input Conditions or When Inputs = VEE Built-in Temperature Compensation Drop in Compatible to MC10LVEL11, MC100LVEL11 Built-In Input Pull Down Resistors • • DESCRIPTION The SN65LVEL11 is a fully differential 1:2 ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in open condition. The SN65LVEL11 is functionally equivalent to SN65EL11 with improved performance. The SN65LVEL11 is housed in an industry standard SOIC-8 package and is also available in the TSSOP-8 package option. • • • • • • • • • PINOUT ASSIGNMENT Q0 1 Q0 2 8 VCC D 7 Q1 3 6 D VEE APPLICATIONS Data and Clock Transmission Over Backplane Signaling Level Conversion Q1 4 5 Table 1. Pin Description PIN D, D Q0, Q0, Q1, Q1 VCC VEE FUNCTION PECL/ECL data inputs PECL/ECL outputs Positive supply Negative supply ORDERING INFORMATION (1) PART NUMBER SN65LVEL11D SN65LVEL11DGK (1) PART MARKING SN65LVEL11 SN65LVEL11 PACKAGE SOIC SOIC-TSSOP LEAD FINISH NiPdAu NiPdAu Leaded device options not initially available. Contact TI sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated SN65LVEL11 SLLS927 – DECEMBER 2008 ............................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) PARAMETER Absolute PECL mode supply voltage, VCC Absolute NECL mode power supply, VEE PECL mode input voltage NECL mode input voltage Output current Operating temperature range Storage temperature range (1) CONDITION VEE = 0 V VCC = 0 V VEE = 0 V; VI ≤ VCC VCC = 0 V; VI ≥ VEE Continuous Surge VALUE 6 –6 6 –6 50 100 –40 to 85 –65 to 150 UNIT V V V V mA °C °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POWER DISSIPATION RATINGS PACKAGE SOIC SOIC-TSSOP CIRCUIT BOARD MODEL Low-K High-K Low-K High-K POWER RATING TA < 25°C (mW) 719 840 469 527 THERMAL RESISTANCE, JUNCTION TO AMBIENT NO AIRFLOW 139 119 213 189 DERATING FACTOR TA > 25°C (mW/°C) 7 8 5 5 POWER RATING TA = 85°C (mW) 288 336 188 211 THERMAL CHARACTERISTICS PARAMETER θJB θJC Junction-to Board Thermal Resistance Junction-to Case Thermal Resistance PACKAGE SOIC SOIC-TSSOP SOIC SOIC-TSSOP VALUE 79 120 98 74 °C/W UNIT °C/W KEY ATTRIBUTES CHARACTERISTICS Internal input pull down resistor Moisture sensitivity level Flammability rating (Oxygen Index: 28 to 34) ESD-HBM ESD-machine model ESD-charge device model Meets or exceeds JEDEC Spec EIA/JESD78 latchup test VALUE 75 kΩ Level 1 UL 94 V-0 at 0.125 in 4 kV 200 V 2 kV 2 Submit Documentation Feedback Product Folder Link(s): SN65LVEL11 Copyright © 2008, Texas Instruments Incorporated SN65LVEL11 www.ti.com ............................................................................................................................................................................................ SLLS927 – DECEMBER 2008 LVPECL DC CHARACTERISTICS (1) (VCC = 3.3 V, VEE = 0.0 V (2) CHARACTERISTICS ICC VOH VOL VIH VIL VIHCMR Power Supply Current Output HIGH Voltage Output LOW Voltage (3) –40°C MIN 2215 1470 2135 1490 TYP 20 MAX 25 2420 1680 2420 1825 MIN 25°C TYP 20 2215 2286 1470 1584 2135 1490 MAX 25 2420 1680 2420 1825 2215 1470 2135 1490 MIN 85°C TYP MAX 21 25 2420 1680 2420 1825 UNIT mA mV mV mV mV V (3) Input High Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH voltage common mode range (Differential) (4) Vpp < 500 mV Vpp > 500 mV 1.2 1.4 3.1 3.1 150 1.1 1.3 3.1 3.1 150 1.1 1.3 3.1 3.1 150 µA µA IIH IIL Input HIGH Current Input LOW current D D 0.5 –600 0.5 –600 0.5 –600 (1) (2) (3) (4) Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V Outputs are terminated through a 50 Ω resistor to VCC – 2.0 V. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP min and 1 V. (2) 85°C MAX 25 –880 –1620 –880 –1475 –1085 –1830 –1165 –1810 MIN TYP 21 MAX 25 –880 –1620 –880 –1475 LVPNECL DC CHARACTERISTICS (1) (VEE = –3.3 V; VCC = 0.0 V;) CHARACTERISTICS IEE VOH VOL VIH VIL VIHCMR Power supply current Output HIGH voltage (3) –40°C MIN TYP 20 –1085 –1830 –1165 –1810 MAX 25 –880 –1620 –880 –1475 –1085 –1830 –1165 –1810 MIN 25°C TYP 20 –1013 –1722 UNIT mA mV mV mV mV V Output LOW voltage (3) Input high voltage (Single-Ended) Input LOW voltage (Single-Ended) Input HIGH voltage common mode range (Differential) (4) Vpp < 500 mV Vpp > 500 mV –2.1 –1.9 –0.2 –0.2 150 –2.2 –2.0 –0.2 –0.2 150 –2.2 –2.0 –0.2 –0.2 150 µA µA IIH IIL Input HIGH current Input LOW current D D 0.5 –600 0.5 –600 0.5 –600 (1) (2) (3) (4) Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V. Outputs are terminated through a 50 Ω resistor to VCC – 2.0 V. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP min and 1 V. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65LVEL11 3 SN65LVEL11 SLLS927 – DECEMBER 2008 ............................................................................................................................................................................................ www.ti.com AC CHARACTERISTICS (1) (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = –3.3 V) (2) –40°C MIN 235 10 10 5 0.2 200 150 1000 300 200 150 TYP MAX 2.9 350 18 25 15 235 10 10 5 0.2 1000 300 200 150 MIN 25°C TYP 2.7 350 18 25 15 235 10 10 5 0.2 1000 300 MAX MIN 85°C TYP 2.4 350 18 25 15 MAX UNIT GHz ps ps ps ps ps mV ps CHARACTERISTIC fMAX tPLH/tPHL tSKEW tJITTER VPP tr/tf (1) Max switching frequency (3) See Figure 6 Propagation delay to output Within device skew Duty cycle skew (6) Random clock jitter (RMS) Input swing (7) Output rise/fall times Q (20%–80%) (4) Device to device skew (5) (2) (3) (4) (5) (6) (7) Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. VEE can vary ±0.3 V Maximum switching frequency measured at output amplitude of 300 mVpp. Within-device skew is defined as identical transitions on similar paths through a device. Device-Device Skew is defined as identical transitions at identical Vcc levels. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. VPP(min) is the minimum input swing for which AC parameters are assured. Typical Termination for Output Driver P ZO = 50 W P Driver Receiver N ZO = 50 W N 50 W 50 W VTT VTT = VCC - 2 V Figure 1. Termination for Output Driver D D Q Q tPLH tPHL Figure 2. Propagation Delay 4 Submit Documentation Feedback Product Folder Link(s): SN65LVEL11 Copyright © 2008, Texas Instruments Incorporated SN65LVEL11 www.ti.com ............................................................................................................................................................................................ SLLS927 – DECEMBER 2008 D VPP(min) VPP(max) D Figure 3. Input Voltage Swing 80% 20% tr tf Figure 4. Output Rise and Fall Times D D Q0 Q0 tPLH0 Q1 tPHL0 Q1 tPLH1 tPHL1 Device Skew = Higher [(tPLH1 - tPLH0), (tPHL1 - tPHL0)] Figure 5. Device Skew Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65LVEL11 5 SN65LVEL11 SLLS927 – DECEMBER 2008 ............................................................................................................................................................................................ www.ti.com 1000 900 800 VCC = 3.3 V, VEE = 0 V Output Amplitude - mV 700 600 500 400 300 200 100 0 0 500 1000 1500 2000 2500 3000 3500 4000 4500 f - Frequency - MHz TA = 85°C TA = -40°C TA = 25°C Figure 6. Output Amplitude vs Frequency 6 Submit Documentation Feedback Product Folder Link(s): SN65LVEL11 Copyright © 2008, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 19-Jan-2009 PACKAGING INFORMATION Orderable Device SN65LVEL11D SN65LVEL11DGK SN65LVEL11DGKR SN65LVEL11DR (1) Status (1) ACTIVE ACTIVE ACTIVE ACTIVE Package Type SOIC MSOP MSOP SOIC Package Drawing D DGK DGK D Pins Package Eco Plan (2) Qty 8 8 8 8 75 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Dec-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 330.0 12.4 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 8.0 W Pin1 (mm) Quadrant 12.0 Q1 SN65LVEL11DR 2500 6.4 5.2 2.1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Dec-2008 *All dimensions are nominal Device SN65LVEL11DR Package Type SOIC Package Drawing D Pins 8 SPQ 2500 Length (mm) 346.0 Width (mm) 346.0 Height (mm) 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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