74HC74D
CMOS Digital Integrated Circuits
Silicon Monolithic
74HC74D
1. Functional Description
•
Dual D-Type Flip-Flop with Preset and Clear
2. General
The 74HC74D is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the
CLOCK pulse.
CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to
an "L" level.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
Wide operating temperature range: Topr = -40 to 125 � (Note 1)
(2)
High speed: fMAX = 77 MHz (typ.) at VCC = 5 V
(3)
Low power dissipation: ICC = 2.0 µA (max) at Ta = 25�
(4)
Balanced propagation delays: tPLH ≈ tPHL
(5) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
4. Packaging
SOIC14
Start of commercial production
2020-07
©2016-2020
Toshiba Electronic Devices & Storage Corporation
1
2020-11-17
Rev.3.0
74HC74D
5. Pin Assignment
6. Marking
7. IEC Logic Symbol
8. Truth Table
X:
Don't care
©2016-2020
Toshiba Electronic Devices & Storage Corporation
2
2020-11-17
Rev.3.0
74HC74D
9. System Diagram
©2016-2020
Toshiba Electronic Devices & Storage Corporation
3
2020-11-17
Rev.3.0
74HC74D
10. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to VCC + 0.5
V
VOUT
-0.5 to VCC + 0.5
V
IIK
±20
mA
Output diode current
IOK
±20
mA
Output current
IOUT
±25
mA
VCC/ground current
ICC
Power dissipation
PD
Storage temperature
Tstg
Output voltage
Input diode current
(Note 1)
±50
mA
500
mW
-65 to 150
�
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: PD derates linearly with -8 mW/� above 85 �
11. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Symbol
Test Condition
Note
Rating
Unit
VCC
2.0 to 6.0
V
VIN
0 to VCC
V
Output voltage
VOUT
0 to VCC
V
Operating temperature
Topr
Input rise and fall times
tr,tf
-40 to 125
�
VCC = 2.0 V
(Note 1)
0 to 1000
ns
VCC = 4.5 V
0 to 500
VCC = 6.0 V
0 to 400
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
4
2020-11-17
Rev.3.0
74HC74D
12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, T a = 25 �)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
Test Condition
VIH
�
VIL
VOH
VOL
�
VIN = VIH or VIL
VIN = VIH or VIL
VCC (V)
Min
Typ.
Max
Unit
2.0
1.50
�
�
V
4.5
3.15
�
�
6.0
4.20
�
�
2.0
�
�
0.50
4.5
�
�
1.35
6.0
�
�
1.80
2.0
1.9
2.0
�
4.5
4.4
4.5
�
6.0
5.9
6.0
�
IOH = -4 mA
4.5
4.18
4.31
�
IOH = -5.2 mA
6.0
5.68
5.80
�
IOL = 20 µA
2.0
�
0.0
0.1
4.5
�
0.0
0.1
IOH = -20 µA
6.0
�
0.0
0.1
IOL = 4 mA
4.5
�
0.17
0.26
IOL = 5.2 mA
V
V
V
6.0
�
0.18
0.26
Input leakage current
IIN
VIN = VCC or GND
6.0
�
�
±0.1
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
�
�
2.0
µA
12.2. DC Characteristics (Unless otherwise specified, T a = -40 to 85 �)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
Test Condition
VIH
�
VIL
VOH
VOL
�
VIN = VIH or VIL
VIN = VIH or VIL
IOH = -20 µA
VCC (V)
Min
Max
Unit
2.0
1.50
�
V
4.5
3.15
�
6.0
4.20
�
2.0
�
0.50
4.5
�
1.35
6.0
�
1.80
2.0
1.9
�
4.5
4.4
�
6.0
5.9
�
IOH = -4 mA
4.5
4.13
�
IOH = -5.2 mA
6.0
5.63
�
IOL = 20 µA
2.0
�
0.1
4.5
�
0.1
6.0
�
0.1
IOL = 4 mA
4.5
�
0.33
IOL = 5.2 mA
6.0
�
0.33
V
V
V
Input leakage current
IIN
VIN = VCC or GND
6.0
�
±1.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
�
20.0
µA
©2016-2020
Toshiba Electronic Devices & Storage Corporation
5
2020-11-17
Rev.3.0
74HC74D
12.3. DC Characteristics (Note) (Unless otherwise specified, T a = -40 to 125 �)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
Test Condition
VIH
�
VIL
VOH
VOL
�
VIN = VIH or VIL
VIN = VIH or VIL
IOH = -20 µA
VCC (V)
Min
Max
Unit
2.0
1.50
�
V
4.5
3.15
�
6.0
4.20
�
2.0
�
0.50
4.5
�
1.35
6.0
�
1.80
2.0
1.9
�
4.5
4.4
�
6.0
5.9
�
IOH = -4 mA
4.5
3.7
�
IOH = -5.2 mA
6.0
5.2
�
IOL = 20 µA
2.0
�
0.1
4.5
�
0.1
6.0
�
0.1
IOL = 4 mA
4.5
�
0.4
IOL = 5.2 mA
6.0
�
0.4
V
V
V
Input leakage current
IIN
VIN = VCC or GND
6.0
�
±1.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
�
40.0
µA
Note:
Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
6
2020-11-17
Rev.3.0
74HC74D
12.4. Timing Requirements (Unless otherwise specified, T a = 25�, Input: t r = t f = 6
ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(CK)
tw(L),tw(H)
�
2.0
75
ns
4.5
15
6.0
13
Minimum pulse width
(CLR,PR)
tw(L)
2.0
75
4.5
15
6.0
13
2.0
75
4.5
15
6.0
13
2.0
0
4.5
0
6.0
0
2.0
25
4.5
5
6.0
4
2.0
6
4.5
31
6.0
36
Minimum setup time
Minimum hold time
Minimum removal time
(CLR,PR)
Clock frequency
�
ts
�
th
�
trem
�
f
�
ns
ns
ns
ns
MHz
12.5. Timing Requirements
(Unless otherwise specified, T a = -40 to 85�, Input: t r = t f = 6 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(CK)
tw(L),tw(H)
�
2.0
95
ns
4.5
19
6.0
16
Minimum pulse width
(CLR,PR)
tw(L)
2.0
95
4.5
19
6.0
16
2.0
95
4.5
19
6.0
16
2.0
0
4.5
0
6.0
0
2.0
30
4.5
6
6.0
5
2.0
5
4.5
25
6.0
29
Minimum setup time
Minimum hold time
Minimum removal time
(CLR,PR)
Clock frequency
©2016-2020
Toshiba Electronic Devices & Storage Corporation
�
ts
�
th
�
trem
�
f
�
7
ns
ns
ns
ns
MHz
2020-11-17
Rev.3.0
74HC74D
12.6. Timing Requirements (Note)
(Unless otherwise specified, T a = -40 to 125 �, Input: t r = t f = 6 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(CK)
tw(L),tw(H)
�
2.0
110
ns
4.5
22
Minimum pulse width
(CLR,PR)
tw(L)
Minimum setup time
Minimum hold time
Minimum removal time
(CLR,PR)
Clock frequency
Note:
�
ts
�
th
�
trem
�
f
�
6.0
18
2.0
110
4.5
22
6.0
18
2.0
110
4.5
22
6.0
18
2.0
0
4.5
0
6.0
0
2.0
34
4.5
7
6.0
6
2.0
4
4.5
21
6.0
24
ns
ns
ns
ns
MHz
Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
12.7. AC Characteristics
(Unless otherwise specified, C L = 15 pF, V CC = 5 V, T a = 25 �, Input: t r = t f = 6
ns)
Characteristics
Symbol
Test Condition
Min
Output transition time
tTLH,tTHL
�
Propagation delay time (CK-Qn, Q)
tPLH,tPHL
�
Propagation delay time (CLR, PR-Q, Q)
tPLH,tPHL
fMAX
Maximum clock frequency
©2016-2020
Toshiba Electronic Devices & Storage Corporation
8
Typ.
Max
Unit
�
6
12
ns
�
13
26
ns
�
�
14
26
ns
�
36
77
�
MHz
2020-11-17
Rev.3.0
74HC74D
12.8. AC Characteristics
(Unless otherwise specified, C L = 50 pF, T a = 25 �, Input: t r = t f = 6 ns)
Characteristics
Output transition time
Symbol
Note
tTLH,tTHL
Propagation delay time
(CK-Q, Q)
tPLH,tPHL
Propagation delay time
(CLR, PR-Q, Q)
tPLH,tPHL
Maximum clock frequency
fMAX
Input capacitance
CIN
Power dissipation capacitance
CPD
(Note 1)
VCC (V)
Min
Typ.
Max
Unit
2.0
�
30
75
ns
4.5
�
8
15
6.0
�
7
13
2.0
�
48
150
4.5
�
16
30
6.0
�
13
26
2.0
�
51
150
4.5
�
17
30
6.0
�
15
26
2.0
6
21
�
4.5
31
63
�
6.0
36
67
�
�
�
5
�
pF
�
�
34
�
pF
ns
ns
MHz
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load.
Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/2 (per F/F)
12.9. AC Characteristics
(Unless otherwise specified, C L = 50 pF, T a = -40 to 85 �, Input: t r = t f = 6 ns)
Characteristics
Output transition time
Propagation delay time
(CK-Q, Q)
VCC (V)
Min
Max
Unit
tTLH,tTHL
2.0
�
95
ns
4.5
�
19
6.0
�
16
2.0
�
190
4.5
�
38
6.0
�
32
2.0
�
190
4.5
�
38
6.0
�
32
2.0
5
�
4.5
25
�
6.0
29
�
tPLH,tPHL
Propagation delay time
(CLR, PR-Q, Q)
tPLH,tPHL
Maximum clock frequency
©2016-2020
Toshiba Electronic Devices & Storage Corporation
Symbol
fMAX
9
ns
ns
MHz
2020-11-17
Rev.3.0
74HC74D
12.10. AC Characteristics (Note)
(Unless otherwise specified, C L = 50 pF, T a = -40 to 125 �, Input: t r = t f = 6 ns)
Characteristics
Output transition time
Propagation delay time
(CK-Q, Q)
VCC (V)
Min
Max
Unit
tTLH,tTHL
2.0
�
110
ns
4.5
�
22
6.0
�
18
2.0
�
220
4.5
�
44
6.0
�
36
2.0
�
220
4.5
�
44
6.0
�
36
2.0
4
�
4.5
21
�
6.0
24
�
tPLH,tPHL
Propagation delay time
(CLR, PR-Q, Q)
tPLH,tPHL
Maximum clock frequency
Note:
Symbol
fMAX
ns
ns
MHz
Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after
July 2020.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
10
2020-11-17
Rev.3.0
74HC74D
Package Dimensions
Unit: mm
Weight: 0.13 g (typ.)
Package Name(s)
Nickname: SOIC14
©2016-2020
Toshiba Electronic Devices & Storage Corporation
11
2020-11-17
Rev.3.0
74HC74D
RESTRICTIONS ON PRODUCT USE
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Hardware, software and systems described in this document are collectively referred to as "Product".
• TOSHIBA reserves the right to make changes to the information in this document and related Product without notice.
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written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.
TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
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EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
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AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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