74VHCT540AFT,74VHCT541AFT
CMOS Digital Integrated Circuits
Silicon Monolithic
74VHCT540AFT,74VHCT541AFT
1. Functional Description
• Octal Bus Buffer
74VHCT540AFT: INVERTED, 3-STATE OUTPUTS
74VHCT541AFT: NON-INVERTED, 3-STATE OUTPUTS
2. General
The 74VHCT540AFT and 74VHCT541AFT are advanced high speed CMOS OCTAL BUS BUFFERs fabricated
with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
The 74VHCT540AFT is an inverting type and, the 74VHCT541AFT is a non-inverting type.
When either G1 or G2 are high, the terminal outputs are in the high-impedance state.
The input voltage are compatible with TTL output voltage.
These devices may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3. Features
(1)
AEC-Q100 (Rev. H) (Note 1)
(2)
Wide operating temperature range: Topr = -40 to 125
(3)
High speed: Propagation delay time = 5.4 ns (typ.) at VCC = 5.0 V
(4)
Quiescent supply current: ICC = 4.0 µA (max) at Ta = 25
(5)
Compatible with TTL input: VIL = 0.8 V (max)
VIH = 2.0 V (min)
(6)
Power down protection is provided on all inputs and outputs.
(7)
Balanced propagation delays: tPLH ≈ tPHL
(8)
Low noise: VOLP = 1.5 V (max)
(9)
Pin and function compatible with the 74 series
(ACT/HCT/AHCT etc.) 540/541 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
Start of commercial production
©2017-2020
Toshiba Electronic Devices & Storage Corporation
1
2013-01
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
4. Packaging
TSSOP20B
5. Pin Assignment
74VHCT540AFT
74VHCT541AFT
6. Marking
74VHCT540AFT
©2017-2020
Toshiba Electronic Devices & Storage Corporation
74VHCT541AFT
2
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
7. IEC Logic Symbol
74VHCT540AFT
74VHCT541AFT
8. Truth Table
Input G1
Input G2
Input An
Output Yn
Output Yn
H
X
X
Z
Z
X
H
X
Z
Z
L
L
H
H
L
L
L
L
L
H
X:
Z:
Yn:
Yn:
Don't care
High impedance
74VHCT541AFT
74VHCT540AFT
9. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
V
Supply voltage
VCC
-0.5 to 7.0
Input voltage
VIN
-0.5 to 7.0
Output voltage
VOUT
(Note1)
-0.5 to 7.0
(Note2)
-0.5 to VCC + 0.5
(Note3)
±20
Input diode current
IIK
Output diode current
IOK
Output current
IOUT
±25
VCC/ground current
ICC
±75
Power dissipation
PD
Storage temperature
Tstg
Note:
Note1:
Note2:
Note3:
Note4:
-20
(Note4)
mA
180
mW
-65 to 150
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Output in OFF state.
High (H) or Low (L) state. IOUT absolute maximum rating must be observed.
VOUT < GND, VOUT > VCC
180 mW in the range of Ta = -40 to 85 . From Ta = 85 to 125 a derating factor of -3.25 mW/ shall be
applied until 50 mW.
©2017-2020
Toshiba Electronic Devices & Storage Corporation
3
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
10. Operating Ranges (Note)
Characteristics
Symbol
Note
Rating
Unit
V
Supply voltage
VCC
4.5 to 5.5
Input voltage
VIN
0 to 5.5
Output voltage
VOUT
(Note1)
0 to 5.5
(Note2)
0 to VCC
Operating temperature
Topr
-40 to 125
Input rise and fall times
dt/dv
0 to 20
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note1: Output in OFF state.
Note2: High (H) or Low (L) state.
11. Electrical Characteristics
11.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Typ.
High-level input voltage
VIH
4.5 to 5.5
2.0
Low-level input voltage
VIL
4.5 to 5.5
High-level output voltage
VOH
VIN = VIH or VIL
Low-level output voltage
3-state output OFF-state
leakage current
VOL
VIN = VIH or VIL
Max
Unit
V
0.8
V
V
IOH = -50 µA
4.5
4.4
4.5
IOH = -8 mA
4.5
3.94
IOL = 50 µA
4.5
0.0
0.1
IOL = 8 mA
4.5
0.36
V
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
5.5
±0.25
µA
Input leakage current
IIN
VIN = 5.5 V or GND
0 to 5.5
±0.1
µA
Quiescent supply
current
ICC
VIN = VCC or GND
5.5
4.0
µA
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.35
mA
IOPD
VOUT = 5.5 V
0
0.5
µA
Output leakage current
(Power-OFF)
11.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
High-level input voltage
Symbol
Test Condition
VCC (V)
Min
Max
Unit
VIH
4.5 to 5.5
2.0
V
Low-level input voltage
VIL
High-level output voltage
VOH
VIN = VIH or VIL
4.5 to 5.5
0.8
V
IOH = -50 µA
4.5
4.4
V
Low-level output voltage
VOL
VIN = VIH or VIL
IOH = -8 mA
4.5
3.80
IOL = 50µA
4.5
0.1
3-state output OFF-state
leakage current
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
IOL = 8 mA
4.5
0.44
5.5
±2.50
µA
Input leakage current
IIN
Quiescent supply current
ICC
VIN = 5.5 V or GND
0 to 5.5
±1.0
µA
VIN = VCC or GND
5.5
40.0
µA
Quiescent supply current
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.50
mA
Output leakage current
(Power-OFF)
IOPD
VOUT = 5.5 V
0
5.0
µA
©2017-2020
Toshiba Electronic Devices & Storage Corporation
4
V
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
11.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Max
Unit
High-level input voltage
VIH
4.5 to 5.5
2.0
V
Low-level input voltage
VIL
4.5 to 5.5
0.8
V
High-level output voltage
VOH
V
Low-level output voltage
3-state output OFF-state
leakage current
VOL
VIN = VIH or VIL
VIN = VIH or VIL
IOH = -50 µA
4.5
4.4
IOH = -8 mA
4.5
3.70
IOL = 50 µA
4.5
0.1
IOL = 8 mA
4.5
0.55
±10.0
µA
V
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
5.5
Input leakage current
IIN
VIN = 5.5 V or GND
0 to 5.5
±2.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
5.5
80.0
µA
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.50
mA
IOPD
VOUT = 5.5 V
0
20.0
µA
Output leakage current
(Power-OFF)
11.4. AC Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Propagation delay time
Test
Condition
VCC (V)
CL (pF)
Min
Typ.
Max
Unit
74VHCT540AFT tPLH,tPHL
5.0 ± 0.5
15
5.4
7.4
ns
50
5.9
8.4
74VHCT541AFT tPLH,tPHL
5.0 ± 0.5
15
5.0
6.9
50
5.5
7.9
15
8.3
11.3
Part Number
Symbol
Note
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
50
8.8
12.3
3-state output disable time
tPLZ,tPHZ
RL = 1 kΩ
5.0 ± 0.5
50
9.4
11.9
5.0 ± 0.5
50
Output skew
tosLH,tosHL (Note 1)
Input capacitance
CIN
Output capacitance
COUT
Power dissipation
capacitance
CPD
(Note 2)
ns
ns
ns
1.0
ns
4
10
pF
9
pF
19
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/8 (per bit)
11.5. AC Characteristics
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 3 ns)
Characteristics
Propagation delay time
Part Number
Symbol
Note
74VHCT540AFT tPLH,tPHL
74VHCT541AFT tPLH,tPHL
3-state output enable time
3-state output disable time
Output skew
Input capacitance
Test
Condition
VCC (V)
CL (pF)
Min
Max
Unit
5.0 ± 0.5
15
1.0
8.5
ns
50
1.0
9.5
15
1.0
8.0
50
1.0
9.0
15
1.0
13.0
50
1.0
14.0
tPZL,tPZH
RL = 1 kΩ
tPLZ,tPHZ
tosLH,tosHL (Note 1)
CIN
5.0 ± 0.5
5.0 ± 0.5
ns
ns
RL = 1 kΩ
5.0 ± 0.5
50
1.0
13.5
ns
5.0 ± 0.5
50
1.0
ns
10
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
©2017-2020
Toshiba Electronic Devices & Storage Corporation
5
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
11.6. AC Characteristics
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns)
Characteristics
Propagation delay time
Part Number
Symbol
Note
Test
Condition
VCC (V)
CL (pF)
Min
5.0 ± 0.5
15
50
15
1.0
9.0
50
1.0
10.0
15
1.0
14.5
50
1.0
15.5
5.0 ± 0.5
50
1.0
15.0
ns
5.0 ± 0.5
50
1.0
ns
10
pF
74VHCT540AFT tPLH,tPHL
74VHCT541AFT tPLH,tPHL
3-state output enable time
3-state output disable time
Output skew
tPZL,tPZH
RL = 1 kΩ
tPLZ,tPHZ
RL = 1 kΩ
tosLH,tosHL (Note 1)
Input capacitance
CIN
5.0 ± 0.5
5.0 ± 0.5
Max
Unit
1.0
9.5
ns
1.0
10.5
ns
ns
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
11.7. Noise Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Limit
Unit
V
Quiet output maximum dynamic VOL
VOLP
CL = 50 pF
5.0
1.1
1.5
Quiet output minimum dynamic VOL
VOLV
CL = 50 pF
5.0
-1.1
-1.5
Minimum high-level dynamic input voltage
VIHD
CL = 50 pF
5.0
2.0
Maximum low-level dynamic input voltage
VILD
CL = 50 pF
5.0
0.8
©2017-2020
Toshiba Electronic Devices & Storage Corporation
6
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
Package Dimensions
Unit: mm
Weight: 0.071 g (typ.)
Package Name(s)
Nickname: TSSOP20B
©2017-2020
Toshiba Electronic Devices & Storage Corporation
7
2020-01-16
Rev.5.0
74VHCT540AFT,74VHCT541AFT
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