SSM3K7002BSU,LF

SSM3K7002BSU TOSHIBA Field-Effect Transistor Silicon N Channel MOS Type (U-MOSⅣ) SSM3K7002BSU High-Speed Switching Applications Analog Switch Applications Unit: mm • Small package • Low ON-resistance : RDS(ON) = 3.3 Ω (max) (@VGS = 4.5 V) : RDS(ON) = 2.6 Ω (max) (@VGS = 5 V) : RDS(ON) = 2.1 Ω (max) (@VGS = 10 V) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage VDSS 60 V Gate-source voltage VGSS ± 20 V DC ID 200 Pulse IDP 800 P D (Note 1) 150 mW Channel temperature Tch 150 °C 2. Source Storage temperature range Tstg −55 to 150 °C 3. Drain Drain current Power dissipation (Ta = 25°C) mA 1. Gate Note: Using continuously under heavy loads (e.g. the application of high JEDEC SOT-323 temperature/current/voltage and the significant change in JEITA temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. TOSHIBA 2-2Z1A operating temperature/current/voltage, etc.) are within the Weight: 5.5 mg (typ.) absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.6mm × 3) 0.6 mm 1.0 mm Marking Equivalent Circuit (top view) 3 3 NM 1 2 1 1 2 2011-12-09 SSM3K7002BSU Electrical Characteristics (Ta = 25°C) Characteristics Symbol Gate leakage current Min Typ Max Unit VGS = ± 20 V, VDS = 0 V   ±10 µA V (BR) DSS ID = 0.1 mA, VGS = 0 V 60   V (BR) DSX ID = 0.1 mA, VGS = -10 V 45   VDS = 60 V, VGS = 0 V   1 µA VDS = 10 V, ID = 0.25 mA 1.0  2.5 V mS IGSS Drain-source breakdown voltage Drain cutoff current IDSS Gate threshold voltage Vth Yfs Forward transfer admittance Drain-source ON-resistance RDS (ON) Input capacitance VDS = 10 V, ID = 200 mA (Note 2) 225   ID = 500 mA, VGS = 10 V (Note 2)  1.62 2.1 ID = 100 mA, VGS = 5 V (Note 2)  1.77 2.6 ID = 100 mA, VGS = 4.5 V (Note 2)  1.81 3.3  17.0  Ciss Reverse transfer capacitance Crss Output capacitance Coss Switching time Test Condition VDS = 25 V, VGS = 0 V, f = 1 MHz Turn-on delay time td(on) Turn-off delay time td(off) VDD = 30 V, ID = 200 mA , VGS = 0 to 10 V VDSF ID = -200 mA, VGS = 0 V Drain-source forward voltage (Note 2)  1.9   3.6   2.5 5.0  18 55  -0.84 -1.2 V Ω pF ns V Note2: Pulse test Switching Time Test Circuit (a) Test circuit 10 V (b) VIN 10 V 90 % OUT 10 % IN 0 10 µs VDD = 30 V Duty ≤ 1% VIN: tr, tf < 2 ns (Zout = 50 Ω) Common Source Ta = 25 °C 50 Ω 0V RL (c) VOUT VDD 90 % VDD 10 % VDS (ON) tr tf td(on) td(off) Precaution Let Vth be the voltage applied between gate and source that causes the drain current (ID) to be low (0.25 mA for the SSM3K7002BSU). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on). Take this into consideration when using the device Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. 2 2011-12-09 SSM3K7002BSU ID – VDS ID – VGS 1000 Common Source Ta = 25 °C Common Source VDS = 10 V 5.0 V 7.0 V 4.5 V (mA) 800 4.0 V 10 V Drain current ID Drain current ID (mA) 1000 600 3.5 V 3.3 V 400 VGS = 2.5 200 2.8V 100 Ta = 100 °C 10 25 °C 1 -25 °C 0 0 0.8 0.4 1.2 1.6 Drain–source voltage VDS 0.1 0 2.0 1.0 (V) 2.0 Drain–source ON-resistance RDS (ON) (Ω) Drain–source ON-resistance RDS (ON) (Ω) 4 3 4.0V 4.5 V 2 VGS = 10 V 1 5.0 V ID = 100 mA Common Source Ta = 25°C 4 3 Ta = 100 °C 2 25 °C 1 -25 °C 0 30 100 Drain current ID 300 0 1000 10 RDS (ON) – Ta Vth – Ta Gate threshold voltage Vth (V) Drain–source ON-resistance RDS (ON) (Ω) 4 100 mA / 4.5 V 2 ID = 500 mA / VGS = 10 V 1 100 mA / 5.0V 0 (V) 3.0 Common Source 0 −50 20 Gate–source voltage VGS (mA) 5 3 (V) RDS (ON) – VGS 5 Common Source Ta = 25°C 0 10 5.0 4.0 Gate–source voltage VGS RDS (ON) – ID 5 3.0 50 100 Common Source VDS = 10 V ID = 0.25 mA 2.0 1.0 0 −50 150 Ambient temperature Ta (°C) 0 50 100 150 Ambient temperature Ta (°C) 3 2011-12-09 IDR – VDS |Yfs| – ID 1 1000 0.3 (mA) Common Source VDS = 10 V Ta = 25°C Drain reverse current IDR Forward transfer admittance Yfs (S) SSM3K7002BSU 0.1 0.03 0.01 0.003 100 10 Drain current ID 1000 IDR G 600 S 400 200 -0.2 (mA) -0.4 -0.6 -0.8 (ns) Switching time t Capacitance C (pF) 30 10 5 Coss 1 0.1 Common Source Ta = 25°C f = 1 MHz VGS = 0 V (V) Common Source VDD = 30 V VGS = 0 to 10 V Ta = 25 °C 50 Ciss -1.2 t – ID 1000 tf 3 -1.0 Drain–source voltage VDS C – VDS 100 800 0 0 0.001 1 Common Source VGS = 0 V Ta = 25°C D td(off) 100 10 td(on) Crss tr 1 1 10 100 Drain–source voltage VDS 1 (V) 10 100 Drain current ID 1000 (mA) PD – Ta Drain power dissipation PD (mW) 250 Mounted on FR4 board. 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.6 mm × 3) 200 150 100 50 0 0 40 80 120 160 Ambient temperature Ta (°C) 4 2011-12-09 SSM3K7002BSU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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