TB62725F

TOSHIBA T B 6 2 7 2 5 P / F / FN TOSHIBA Bi-CMOS INTEGRATED CIRCIUTS SILICON MONOLITHIC TB62725P/F/FN 8BIT CONSTANT CURRENT LED DRIVER OF OPERATING VOLTAGE 3.3V TB62725 series is the constant current driver designed for LED and the LED display. Output current value is set with one resistor with the outside. Then, all the output becomes the about same current. This driver builds in the constant current output of eight bits, the shift register of eight bits, the latch of eight bits and gate circuit. This driver is designed by using the BI-CMOS process. FEATURE *Output Current Capability and the number of the output : 90mA X 8 outputs *Constant Current Range : 5 to 90mA *Application Output Voltage : 0.7V (output current 40 to 80 mA) 0.4V (output current 5 to 40 mA) *For Annode Common LED *Input Signal Voltage Level : 3.3V CMOS Level (Shmitt Triggered Input) *Power Supply Voltage Range VDD=3.0 to 3.6V *Muximum output terminal voltage 17V *Serial and Pararell Data Transfer Rate : 20MHz (max, Cascade Connection) *Operation Temperature Range : Topr= -40 to 85 degrees *Package : Type P : DIP16-P-300-2.56A Type F : SSOP16-P-225-1.00 Type FN : SSOP16-P-225-0.65 *Package and Pin Layout : Same as the TB62705 series. *Constant Current Error bitween bits ( All Output On ) Output Voltage >= 0.4V >= 0.7V Current Error between bits +/- 6% Current Error between ICs +/- 15% Output Current 2 to 40 mA 2 to 90 mA Weight : 1.11 g(Typ.) - - - Type P 0.14 g(Typ.) - - - Type F 0.07 g(Typ.) - - - Type FN TB62725P DIP16-P-300-2.56A TB62725F SSOP16-P-225-1.00 TB62725FN SSOP16-P-225-0.65 Pin layout (TOP VIEW) GND SERIAL-IN CLOCK /LATCH OUT0 OUT1 OUT2 OUT3 VDD R-EXT SERIAL-OUT /ENABLE OUT7 OUT6 OUT5 OUT4 marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA BLOCK DIAGRAM R-EXT I-REG T B 6 2 7 2 5 P / F / FN OUT0 OUT1 OUT7 /ENABLE Q ST D Q ST D Q ST D /LATCH SERIAL-IN D CK Q D CK Q D CK Q SERIAL-OUT CLOCK TRUTH TABLE CLOCK UP UP UP DOWN DOWN /LATCH H L H X X /ENABLE L L L L H SERIAL-IN Dn Dn+1 Dn+2 Dn+3 Dn+3 OUT0 --- OUT5 --- OUT7 Dn --- Dn-5 --- Dn-7 No Change Dn+2 --- Dn-3 --- Dn-5 Dn+2 --- Dn-3 --- Dn-5 Off SERIAL-OUT Dn-7 Dn-6 Dn-5 Dn-5 Dn-5 Note) "OUT0 to 7 = On" in case of Dn= "H" Level and "OUT0 to 7 = Off" in case of Dn= "L" Level. A resistor is connected with R-EXT and GND accompanied with outside, and it is necessary that a correct power supply voltage is supplied. TIMING DIAGRAM CLOCK SERIAL-IN /LATCH /ENABLE OUT0 OUT1 OUT3 OUT7 SERTIAL-OUT 5V 0V 5V 0V 5V 0V 5V 0V On Off On Off On Off On Off 5V 0V Note) Latches are level sensitive, not rising edge sensitive and not syncronus CLOCK. Input of LATCH-terminal to "H" level, data passes latches and input to "L" level, data hold latches. Input of ENABLE-terminal to "H" level, all output ( OUT0 to 7 ) off. marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA TERMINAL DISCRIPTION PIN No. 1 2 3 4 5~12 13 14 15 16 PIN NAME GND SERIAL-IN CLOCK /LATCH OUT0 to 7 /ENABLE SERIAL-OUT R-EXT VDD GND terminal for control logic. Input terminal of a serial-data for shift-register Input terminal of a clock for data shift to up-edge. T B 6 2 7 2 5 P / F / FN FUNCTION LATCH-terminal, and hold data with "L" level input. Output terminals. Input terminal of a data strobe. Latches passes data with "H" level input of Input terminal of output enable. All outputs (OUT0 to 7) do off with "H" level input of ENABLE-terminal, and do on with "L" level input. Output terminal of a serial-data for next SERIAL-IN terminal. Input terminal of connects with a resister for to set up all output current. 5V Supply voltage terminal EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS 1. /ENABLE Terminal VDD R(UP) 2. /LATCH Terminal VDD /ENABLE GND /LATCH GND R(DOWN) 3. CLOCK,SERIAL-IN Terminal VDD CLOCK, SERIAL - IN GND 4. SERIAL-OUT Terminal VDD 8th DATA GND SERIAL - OUT 5. OUT0 to 7 Terminal OUT 0 to 7 GND marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA MAXIMUM RATINGS ( Ta = 25degC ) CHARACTERISTICS Supply Voltage Input Voltage Output Current Output Voltage Power Dissipation SYMBOL VDD VIN IOUT VOUT Pd1 Pd2 Thrmal Resistance Rth(j-a)1 Rth(j-a)2 Oparating Temperature Storage Temperature Topr Tstg RATING 0 to 7 -0.2 to VDD+0.2 +90 -0.5 to 17 Type P : 1.47(Free Air) T B 6 2 7 2 5 P / F / FN UNIT V mA/ch V W Type F and FN : 0.37 (Free Air), 0.78 (On PCB) Type P : 85(Free Air) Type F and FN : 330 (Free Air),160 (On PCB) -40 to 85 -55 to 150 degC degC/W Note) Type P : Ambient temperature delated above 25degC in the proportion of 11.76 mW/degC. Type F and FN : Ambient temperature delated above 25degC in the proportion of 7.69 mW/degC. Condition) On PCB at 50 X 50 X 1.6mm Cu =0.4V,REXT=490ohms All outout on. VOUT>=0.7V,REXT=250ohms All outout on. VOUT=15.0V T B 6 2 7 2 5 P / F / FN ELECTRICAL CHARACTERISTICS (VDD=3.3V, Ta=25degC unless otherwise noted) MI N 3. 0 31.9 62.6 TYP 3.3 37.5 73.6 +/-1.5 +/-1.5 1.0 0.7 VDD GND 2.8 +/-1.5 100 125 1 3 200 250 1 3 6 7 14 13 25 MAX 3.6 43.1 84.6 +/-6 +/-6 5.0 VDD 0.3 VDD 0.4 +/-5.0 400 500 2 5 8 mA uA UNIT V mA % V % kohms SWITCHING CHARACTERISTICS (Ta=25degC unless otherwise noted) CHARACTERISTICS SYBOL tpLH1 tpLH2 tpLH3 tpLH tpHL1 tpHL2 tpHL3 tpHL t or t of tr tf TEST CONDITION CLK - OUTn, /LATCH="H",/ENABLE="L" /LATCH - OUTn, /ENABLE="L" /ENABLE - OUTn, /LATCH="H" CLK - SERIAL OUT CLK - OUTn, /LATCH="H",/ENABLE="L" /LATCH - OUTn, /ENABLE="L" MIN TYP 140 140 140 5 170 170 170 6 70 90 5 5 ns MAX UNIT Propagation Delay Time /ENABLE - OUTn, /LATCH="H" CLK - SERIAL OUT Voltage Waveform 10% to 90% Voltage Waveform 90% to 10% Output Rise Time Output Fall Time Muximum CLOCK Rise Time Muximum CLOCK Fall Time Cascade connection isn't guarantee. (Note1) us Condition : (Refer to test circuit.) Ta= 25 degC, VDD=VIH=3.3V, VOUT=0.7V, VIL=0V, REXT=490ohms, VL=3.0V, RL=60ohms, CL=10.5pF Note 1 : When tf / tf of clock wave form is enlarged at the time as the cascade connection, the timing condition which is necessary for the data transfer may not be able to be secured. Give careful consideration to the timing condition. marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA TEST CIRCUIT T B 6 2 7 2 5 P / F / FN IDD VIH,VIL /ENABLE Function Generator CLOCK /LATCH VDD OUT0 RL IOL OUT7 SERIAL-OUT GND CL CL SERIAL-IN LOGIC INPUT WAVEFORM Iref VDD=VIH=3.3V VIL=0V tr = tf = 10ns (10% to 90%) R-EXT VL marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA TIMING WAVEFORM 1. CLOCK ,SERIAL-IN, SERIAL-OUT tw CLK T B 6 2 7 2 5 P / F / FN CLOCK 50% 50% SERIAL IN 50% t SETUP1 t HOLD 50% SERIAL-OUT 50% tpLH/tpHL 2. CLOCK, SERIAL-IN , /LATCH, /ENABLE, OUTn CLOCK 50% SERIAL IN /LATCH t SETUP2 50% tw LAT 50% tw ENA /ENABLE t SETUP2 50% 50% OUTn tpHL1/LH1 tpHL2/LH2 3. OUTn 90% OUTn 10% tof 10% tor 50% tpHL3/LH3 90% marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA OUTPUT CURRNET vs Duty (LED Turn On Rate) DUTY(%)-IOUT(mA) On PCB Topr=25degC VDD=3.3V, Vce=1.0(V), Tj=120(degC max) 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 DUTY - Turn On Rate (%) TB62725F/FN TB62725P 100 90 80 70 60 50 40 30 20 10 0 0 20 T B 6 2 7 2 5 P / F / FN DUTY(%)-IOUT(mA) On PCB Topr=55degC VDD=3.3V, Vce=1.0(V), Tj=120(degC max) IOUT(mA) IOUT(mA) TB62725F/FN TB62725P 40 60 80 100 DUTY - Turn On Rate (%) DUTY(%)-IOUT(mA) On PCB Topr=85degC VDD=3.3V, Vce=1.0(V), Tj=120(degC max) 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 DUTY - Turn On Rate (%) TB62725F/FN TB62725P marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 IOUT(mA) TOSHIBA OUTPUT CURRNET vs Duty (LED Turn On Rate) ** Comparison in VDD=5V of TB62705 and TB6272 TB62705 & 725 DUTY(%)-IOUT(mA) On PCB Topr=25degC VDD=5.0V, Vce=1.0(V), Tj=120(degC max) 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 DUTY - Turn On Rate (%) TB62725F/FN TB62725P TB62705CF/CFN TB62705CP T B 6 2 7 2 5 P / F / FN TB62705 & 725 DUTY(%)-IOUT(mA) On PCB Topr=55degC VDD=5.0V, Vce=1.0(V), Tj=120(degC max) 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 DUTY - Turn On Rate (%) TB62725F/FN TB62725P TB62705CF/CFN TB62705CP IOUT(mA) IOUT(mA) Ta(degC) - Pd(w) 1.6 1: F/FN(OnPCB) 1.4 1.2 Power dissipation PD (W/IC) 1 IOUT(mA) 0.8 0.6 0.4 0.2 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 2: P(FreeAir) TB62705 & 725 DUTY(%)-IOUT(mA) On PCB Topr=85degC VDD=5.0V, Vce=1.0(V), Tj=120(degC max) 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 DUTY - Turn On Rate (%) TB62725F/FN TB62725P TB62705CF/CFN TB62705CP Ambient Temperature Ta (deg) marktech optoelectronics 120 Broadway • Menands, New York 12204 Toll Free: (800) 98-4LEDS• Fax: (518) 432-7454 TOSHIBA OUTPUT CURRNET vs REXT RESISTOR TB62725P/F/FN REXT-IOUT (Topr) VDD=3.3(V), VCE=0.7(V) T B 6 2 7 2 5 P / F / FN 90 80 70 60 IOUT(mA) 50 40 30 20 10 0 100 1000 REXT(Ohms) IOUT[mA]=(1.14/REXT[ohms])*16 -- Theory formula Topr=-40(degC) Topr=+25(degC) Topr=+85(degC) 10000 APPLICATION NOTES(1 of 2) TB62725P/F/FN application circuit (a general example) 1 : Vf of LED is Vf=2.5 (V max). 2 : Output saturation Vce1 = 0.4(V min) at Iout 17(V) ) Example : An unnecessary voltage in the case of VLED>17(V) makes a voltage descend by the Zener diode. T B 6 2 7 2 5 P / F / FN Example) TD62M8600F 8-bit Multi-Chip PNP Tr Array, which is not used in Static Lighting System. SCAN O0 O1 O2 O5 O6 O7 S-OUT S-IN ENA LAT CLK O0 O1 O2 O5 O6 O7 S-OUT VLED S-IN C.U. ENA LAT CLK 8-bit SIPO,Latches & Constant Sink Current Drivers 8-bit SIPO,Latches & Constant Sink Current Drivers TB62725P/F/FN TB62725P/F/FN r2 r1 r1 r1 : Resistance for a setup of output current. r2 : Resistance for the LED module brightness adjustment. TB62725P/F/FN application circuit (with VLED