TC78S600FNG/FTG
CD Integrated Circuit Silicon Monolithic
TC78S600FNG/FTG
Stepping Motor Driver IC
The TC78S600FNG/FTG is a PWM constant-current type
stepping motor driver IC designed for sinusoidal-input
micro-step control of stepping motors.
The TC78S600FNG/FTG can be used in applications that
require 1-2-phase, W1-2-phase, 2W1-2 phase, and 4W1-2 phase
excitation modes. The TC78S600FNG/FTG is capable of forward
and reverse driving of a 2-phase bipolar stepping motor using
only a clock signal.
Features
•
Motor power supply voltage: VM = 15V (max)
•
Control power supply voltage: Vcc = 2.7 to 5.5V (operation
range)
•
Output current: Iout ≤ 0.8A (max)
•
Output ON-resistance: Ron = 1.2Ω (upper and lower sum)
•
Decoder that enables micro step control with the clock signal
•
Selectable phase excitation modes (1-2, W1-2, 2W1-2, and
4W1-2)
•
Internal pull-down resistors on inputs: 200 kΩ (typ.)
•
Output monitor pin ( MO )
P-WQFN24-0404-0.50-004
Weight: SSOP20-P-225-0.65A 0.09g(typ.)
P-WQFN24-0404-0.50-004 0.03g(typ.)
•
Over current protection (ISD), Thermal shutdown (TSD) circuit, and Undervoltage lockout (UVLO) circuit.
•
Package: SSOP20 and QFN24
•
Fast decay: always 12.5%
•
Built-in cross conduction protection circuit
•
This product has a MOS structure and is sensitive to electrostatic discharge. When handling this product, ensure
that the environment is protected against electrostatic discharge by using an earth strap, a conductive mat and an
ionizer. Ensure also that the ambient temperature and relative humidity are maintained at reasonable levels.
•
Do not insert devices in the wrong orientation or incorrectly. Otherwise, it may cause the device breakdown,
damage and/or deterioration.
© 2014 TOSHIBA Corporation
1
2014-10-01
TC78S600FNG/FTG
Block Diagram
GND
STBY
Vcc
MO
POR
M1
Pre
Drive
M2
PWM
Timer
H-Bridge
A
μstep
Decoder
AO1
AO2
RFA
CW/CCW
1-2 phase
W1-2 phase
2W1-2 phase
4W1-2 phase
CK
RESET
ISD
VM
TSD
ENABLE
Pre
Drive
H-Bridge
B
BO1
BO2
Vref
PWM
Timer
Vref
TQ
OSC
RFB
OSC
2
2014-10-01
TC78S600FNG/FTG
Pin Function
Pin No.
Symbol
FNG
Pin name
Remarks
FTG
1
4, 5
Vcc
Power supply pin for logic block
VCC (opr) = 2.7 to 5.5 V
2
6
STBY
Standby input
See the Input Signals and Operating Modes
3
7
OSC
Connection pin for an external
capacitor used for internal oscillation
4
8
M1
Excitation mode setting input 1
See the Excitation Mode Settings
5
9
M2
Excitation mode setting input 2
See the Excitation Mode Settings
6
10, 11
VM
Power supply pin for output
VM (opr) = 2.5 to 15.0 V
7
12
CW/CCW
Rotation direction select input
See the Input Signals and Operating Modes
8
13
BO2
B-phase output 2
Connect BO2 to a motor coil pin.
9
14
RFB
Connection pin for a B-phase output
current detection resistor
10
15
BO1
B-phase output 1
Connect BO1 to a motor coil pin.
11
16
AO2
A-phase output 2
Connect AO2 to a motor coil pin.
12
17
RFA
Connection pin for an A-phase output
current detection resistor
13
18
AO1
A-phase output 1
Connect AO1 to a motor coil pin.
14
19
RESET
Reset input
See the Input Signal and Operating Modes
15
20, 21
GND
Ground
16
22
MO
Monitor output
17
23
TQ
Torque setting input
18
1
Vref
Vref setting input
See the Formula of Setting Current
19
2
ENABLE
Enable input
See the Input Signal and Operating Modes
20
3
CK
Initial state: MO = Low (open drain, pulled up by an
external resistor)
Clock input
FTG: Pin No. 24 of QFN24: N.C.
Input pin
(M1, M2, CK, CW/CCW,
RESET, TQ, ENABLE, STBY)
Output pin
(MO)
Vcc
200kΩ
100 Ω
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2014-10-01
TC78S600FNG/FTG
Pin Assignment (Top view)
FNG
SSOP20
Vcc
1
20
CK
STBY
2
19
ENABLE
OSC
3
18
Vref
M1
4
17
TQ
M2
5
16
MO
VM
6
15
GND
CW/CCW
7
14
RESET
BO2
8
13
AO1
RFB
9
12
RFA
BO1
10
11
AO2
(NC)
TQ
MO
GND
GND
RESET
FTG
WQFN24
24
23
22
21
20
19
17
RFA
CK
3
16
A02
Vcc
4
15
B01
Vcc
5
14
RFB
STBY
6
13
B02
7
8
9
10
11
12
CW/CCW
2
VM
ENABLE
VM
A01
M2
18
M1
1
OSC
Vref
4
2014-10-01
TC78S600FNG/FTG
Absolute Maximum Ratings (Ta = 25℃)
Characteristics
Symbol
Rating
Unit
Vcc
6
V
VM
18
V
1.0
A
IMO
4
mA
Withstand voltage of MO
VMO
6
V
Input voltage
VIN
−0.2 to Vcc+0.2
V
Power supply voltage
Iout(AO) and Iout(BO),
Output current
FNG
Power dissipation
PD
FTG
Remarks
Peak, Per one phase,
tw ≤ 10ms, duty ≤ 20%
0.71
IC only
0.96
Mounted on a glass epoxy board
(50 mm × 50 mm × 1.6 mm, Cu 40%)
W
Mounted on a board of 76 mm ×
114 mm × 1.6 mm, 4 layers
(In accordance with JESDF-51).
3.17
Operating temperature
Topr
−20 to 85
°C
Storage temperature
Tstg
−55 to 150
°C
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause the device breakdown, damage or deterioration, and may result injury by explosion
or combustion.
Please use the IC within the specified operating ranges.
Operating Conditions (Ta = -20 to 85℃)
Characteristics
Symbol
Min
Typ.
Max
Unit
Control power supply voltage
Vcc(opr)
2.7
3.3
5.5
V
Motor power supply voltage
VM(opr)
2.5
5
15
V
Output current
IOUT
―
―
0.8
A
Input voltage
VIN
―
―
5.5
V
Input voltage
Vref
0.4
1.5
Clock frequency
fck
―
1
60
kHz
OSC frequency
fosc
160
320
480
kHz
Chopping frequency
fchop
20
40
60
kHz
Vcc － 1.8
(Note 1)
V
Note 1: Pay attention that Vref should be 2.5V or less when TQ is high.
Maximum current is limited by power dissipation and depends on the ambient temperature, excitation mode, and
heat radiation of the board.
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2014-10-01
TC78S600FNG/FTG
Electrical Characteristics
(Unless otherwise specified, Ta = 25°C, VCC = 3.3 V, VM = 5 V, RNF = 2 Ω, COSC = 220 pF.)
Characteristics
Input voltage
Symbol
Test
Circuit
Min
Typ.
Max
Unit
2
―
5.5
V
-0.2
―
0.8
V
CW/CCW, CK, RESET, ENABLE, M1,
M2, TQ, and STBY
―
200
―
mV
VIN = 3.3V
11
16.5
22
μA
VIN = GND
2
4
8
μA
ICC1
Output open, ENABLE:H, RESET:H
―
4
6
mA
ICC2
ENABLE:L
―
4
6
mA
Standby mode
―
5
10
μA
Output open, ENABLE:H, RESET:H
―
1
2
mA
IM2
ENABLE:L
―
0.5
1
mA
IM3
Standby mode
―
―
1
μA
VIN (H) (1)
1
Test Condition
CW/CCW, CK, RESET, ENABLE, M1,
M2, TQ, and STBY
VIN (L) (1)
Input hysteresis voltage
Input current
Dynamic supply current
Comparator reference voltage
Channel-to-channel voltage
differential
VH
IINH
IINL
ICC3
IM1
VRFA(1),VRFB(1)
VRFA(2),VRFB(2)
―
1
2
3
RNF = 1Ω, Vref = 1.0 V, TQ = L
0.040 0.050 0.060
RNF = 1Ω, Vref = 1.0 V, TQ = H
―
0.200
―
V
∆VO
―
B/A, TQ:H
-8
―
8
%
Lower threshold
UVLD
―
Design target value (Note 1)
―
2.2
―
V
―
Design target value (Note 1)
―
2.3
―
V
Lower threshold
UVLD
―
Design target value (Note 1)
―
2.0
―
V
Upper threshold
UVLC
―
Design target value (Note 1)
―
2.1
―
V
MO output voltage
VMO
―
IMO = 1mA
―
―
0.5
V
TSD operating temperature
TSD
―
Design target value (Note 1)
―
170
―
°C
TSD recovery temperature
TSDhys
―
Design target value (Note 1)
―
40
―
°C
OSC frequency
fOSC
―
COSC = 220 pF
210
320
430
kHz
Undervoltage lockout threshold
at VCC
Upper threshold
UVLC
Undervoltage lockout threshold
at VM
(Note 1) Toshiba does not implement testing before shipping.
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2014-10-01
TC78S600FNG/FTG
Output Block
Characteristics
Output saturation voltage
Diode forward voltage
4W1-2
phase
excitation
Symbol
Test circuit
VSAT
4
(U+L)
VF U
5
VF L
1-2
W1-2
2W1-2
phase
phase
phase
excitation excitation excitation
2W1-2
phase
excitation
4W1-2
phase
excitation
4W1-2
phase
excitation
W1-2
2W1-2
phase
phase
excitation excitation
A-/B-phase chopping current (Note)
4W1-2
phase
excitation
4W1-2
phase
excitation
2W1-2
phase
excitation
4W1-2
phase
excitation
4W1-2
phase
excitation
1-2
W1-2
2W1-2
phase
phase
phase
excitation excitation excitation
Vector
IOUT = 0.2 A
―
0.24
0.32
IOUT = 0.6 A
―
0.72
0.96
―
1
1.2
―
1
1.2
―
0.200
―
θ = 1/16
0.190
0.200
0.210
θ = 2/16
0.186
0.196
0.206
θ = 3/16
0.182
0.192
0.202
θ = 4/16
0.174
0.184
0.194
θ = 5/16
0.166
0.176
0.186
θ = 6/16
0.156
0.166
0.176
0.144
0.154
0.164
IOUT = 0.6 A
θ = 8/16
2W1-2
phase
excitation
W1-2
2W1-2
phase
phase
excitation excitation
4W1-2
phase
excitation
4W1-2
phase
excitation
Max
3
4W1-2
phase
excitation
4W1-2
phase
excitation
Typ.
θ = 7/16
4W1-2
phase
excitation
4W1-2
phase
excitation
Min
θ=0
4W1-2
phase
excitation
4W1-2
phase
excitation
Test Condition
2W1-2
phase
excitation
4W1-2
phase
excitation
7
TQ: H
RNF = 1Ω
Vref = 1.0V
V
V
V
0.132
0.142
0.152
θ = 9/16
0.116
0.126
0.136
θ = 10/16
0.102
0.112
0.122
θ = 11/16
0.084
0.094
0.104
θ = 12/16
0.066
0.076
0.086
θ = 13/16
0.048
0.058
0.068
θ = 14/16
0.030
0.040
0.050
θ = 15/16
0.010
0.020
0.030
COSC = 220pF
Unit
2014-10-01
TC78S600FNG/FTG
Characteristics
Symbol
Test circuit
tr
Output transistor switching characteristics
(Design target value)
tf
Upper
IOH
Lower
IOL
Min
Typ.
Max
Design target value
Output load 25 Ω + 15 pF
―
0.2
―
―
0.2
―
Design target value
ENABLE to output
―
1
―
―
0.5
―
―
―
1
―
―
1
7
tpLH
tpHL
Output leakage current
Test Condition
6
VM = 15V
Note: Relative to the peak current at θ = 0.
8
2014-10-01
Unit
μs
ms
μA
TC78S600FNG/FTG
Test circuit 1: VIN (H), VIN (L), IINH, IINL
VM
VM
Vcc
Vcc=3.3V
VVM
M＝5V
=5V
MO
CW/CCW
RESET
ENABLE
STBY
M1
M2
TC78S600FNG/FTG
CK
AO1
AO2
BO1
オシロ
Oscilloscope
BO2
2Ω
スコープ
RFA
2Ω
RFB
TQ
Vref
OSC
Ａ
I INL
V IN(L)
Ａ
GND
I INH
V IN(H)
Test circuit 2: ICC, IM
Ａ
VM
VM
Vcc
I CC
Vcc=3.3V
Ａ
IM
MO
=5V
VVM
M＝5V
CW/CCW
RESET
ENABLE
STBY
M1
TC78S600FNG/FTG
CK
AO1
AO2
BO1
BO2
2Ω
RFA
2Ω
RFB
M2
TQ
Vref
OSC
GND
3.3V
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2014-10-01
TC78S600FNG/FTG
Test circuit 3: VRFA, VRFB
VM
Vcc
Vcc=3.3V
VM
=5V
VVM
M＝5V
MO
CW/CCW
RESET
ENABLE
STBY
M1
M2
TC78S600FNG/FTG
CK
AO1
5ｍH/50Ω
AO2
BO1
5ｍH/50Ω
BO2
RFA
RFB
TQ
Vref
2Ω
2Ω
OSC
Ｖ
Ｖ
GND
2.5V
3.3V
220pF
Test circuit 4: VSAT(UL)
Vcc
Vcc=3.3V
VM
VM
=5V
VVM
M＝5V
MO
CK
RESET
ENABLE
STBY
M1
M2
TC78S600FNG/FTG
AO1
CW/CCW
Ｖ
AO2
BO1
Ｖ
BO2
RFA
RFB
TQ
Vref
OSC
3.3V
GND
2.5V
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2014-10-01
TC78S600FNG/FTG
Test circuit 5: VF U, VF L
Vcc
VM
MO
V
CK
CW/CCW
RESET
ENABLE
STBY
M1
M2
TC78S600FNG/FTG
AO1
AO2
BO1
BO2
RFA
RFB
TQ
Vref
OSC
Test circuit 6: IO H, IO L
VM
Vcc
A
MO
13V
CK
AO1
CW/CCW
RESET
ENABLE
STBY
M1
M2
TC78S600FNG/FTG
Vcc=3.3V
AO2
BO1
BO2
RFA
RFB
TQ
A
Vref
13V
OSC
GND
11
2014-10-01
TC78S600FNG/FTG
AC electric characteristics Test points 7: CK(OSC)-OUT
CLOCK
(OSC)
50%
tCLOCK
(tOSC)
50%
50%
tCLOCK
(tOSC)
50%
VM
90%
OUT
90%
50%
50%
10%
10%
tr
GND
tf
tpLH
tpHL
12
2014-10-01
TC78S600FNG/FTG
PD – Ta characteristics
･TC78S600FNG
PD - Ta
1.50
(1) IC only θj-a = 176°C/W
(2) When mounted on a board,
PCB area size 50 mm × 50 mm × 1.6 mm, Cu
Power dissipation PD (W)
(3)
area size ≥ 40%
1.00
(3) When mounted on a board,
(2)
PCB area size 76.2 mm × 114.3 mm × 1.6 mm
Cu ≥ 30%
(1)
0.50
0.00
0
50
100
150
Ambient temperature Ta (℃)
･TC78S600FTG
PD - Ta
(w)
4.00
When mounted on a board
PCB area size
76mm×114mm×1.6mm 4 layers
(In accordance with JESD-51)
Power dissipation PD (W)
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
0
25
50
75
100
125
150
175
Ta (℃)
Ambient temperature Ta (℃)
13
2014-10-01
TC78S600FNG/FTG
Functional Descriptions
Excitation Mode Settings
Four excitation modes are selectable by setting M1 and M2 terminals.
(4W1-2 phase excitation is default by internal pull-down resistor.)
Input
Excitation mode
M1
M2
L
L
4W1-2 phase
H
L
1-2 phase
L
H
W1-2 phase
H
H
2W1-2 phase
When excitation mode is shifted, the operation starts from the initial state.
Input Signals and Operation Modes
When ENABLE outputs low, operation of the output block turns off. When RESET terminal outputs low, the
mode moves to the initial mode shown below.
Input
Operation mode
CW/CCW
RESET
ENABLE
STBY
L
H
H
H
CW
H
H
H
H
CCW
X
X
L
H
H
Initial mode
X
X
X
L
H
Enable standby mode (Output OFF, High impedance)
X
X
X
X
L
Standby mode (Output OFF, High impedance)
CK
X: Don’t Care
Initial A- and B-Phase Currents (Initial mode)
Current of each phase in RESET is shown in below table.
In this state, MO terminal outputs low. (Open drain connection)
Excitation Mode
A-Phase Current
B-Phase Current
4W1-2 phase
100%
0%
1-2 phase
100%
0%
W1-2 phase
100%
0%
2W1-2 phase
100%
0%
In this specification, the directions of the current flowing from AO1 to AO2 and from BO1 to BO2 are defined as
the forward direction.
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2014-10-01
TC78S600FNG/FTG
Torque Settings
The current ratio of actual operation to the current setting value determined by the resistance is decided.
Weak excitation mode can be set when torque is set low (stop mode).
TQ1 and TQ2 are connected with pull-down resistance in the IC. So, it is set 25 % in case there is no
external input.
Input
Voltage ratio
TQ
L
25%
H
100%
Formula of Setting Current
In constant current operation, the reference current should be set by the external resistance. When the
voltage of RFA and RFB terminals is 1/5×Vref (V) (for example, 1/5×Vref = 0.5 V @Vref = 2.5V) or more,
charge stops and the current of reference value or more does not flow.
IOUT (A) = 1/5×Vref (V) /RNF (Ω) (When torque is 100 %.)
Ex.) When the torque is 100 %, Vref is 2.5V, and the maximum current is 0.5 A, the external
resistance is 1.0Ω. Then, torque changes to 25 % under the same condition, the maximum
current becomes 0.125 A.
Vref should be set between 0.5V to 3.4V. (There is a limitation depending on the conditions, so
refer to the operating conditions in page 5). The accuracy becomes low when Vref is less than 0.5V.
The recommended resistance is 0.25Ω to 1Ω.
MO (Output terminal)
Output terminal has an open drain connection. Pull-up resistance is connected in using.
MO terminal turns on and outputs low when it is resumed to the specified state.
Pin state
MO
Low
Initial state
Z
Not initial state
Open drain connection
The rest voltage of the MO (output terminal) becomes 0.5 V(max.) when IO is 1 mA.
OSC
Triangle wave is generated internally by connecting the external capacitor to OSC terminal and CR
oscillates.
Cosc 180 pF ≤ Cosc ≤ 260 pF
The system should be constructed with the circuits whose variation is 10 % or less.
15
2014-10-01
TC78S600FNG/FTG
Relationship between the ENABLE Input and the Phase Current and MO Outputs)
Setting the ENABLE signal Low disables only the output signals. On the other hand, internal logic functions
continue to operate in accordance with the CK signal.
Therefore, when the ENABLE signal goes High again, the output current generation is restarted as if phases
proceeded with the CK signal.
Example 1. 1−2 phase excitation (M1: H, M2: L)
CK
ENABLE
RESET
MO
(%)
100
71
IA
0
−71
−100
t0
t1
t2
t3
OFF
t7
t8
t9
t10
t11
t12
Example 2. 2W1−2 phase excitation (M1: H, M2: H)
CK
ENABLE
RESET
MO
(%)
100
98
92
83
71
56
38
20
IA
0
-20
-38
-56
-71
-83
-92
-98
-100
t0
t2
t4
t6
t8 t10 t11
OFF
16
t23 t24 t26 t28 t30 t32 t34
2014-10-01
TC78S600FNG/FTG
Relationship between the RESET Input and the Phase Current and MO Outputs
Setting the RESET signal Low causes the outputs to be put in the Initial state and the MO output to be
Low. (Initial state: A-channel output current is at its peak (100%).) When the RESET signal goes High again,
the output current generation is resumed at the next rising edge of the CK signal with the state following the
Initial state. If RESET goes High when CK is already High, the output current generation is resumed
immediately without waiting for the next rising edge of CK with the state following the Initial state.
Example 1. 1−2 phase excitation (M1: H, M2: L)
CK
ENABLE
RESET
MO
(%)
100
71
IA
0
−71
−100
t0
t1
t2
t3
t2
t3
t4
t5
t6
t7
t8
Example 2. 2W1−2 phase excitation (M1: H, M2: H)
CK
ENABLE
RESET
MO
(%)
100
98
92
83
71
56
38
20
IA
0
-20
-38
-56
-71
-83
-92
-98
-100
t0
t2
t4
t6
t8
t10 t11
t8 t10 t12 t14 t16
17
t18
2014-10-01
TC78S600FNG/FTG
1−2 phase excitation (M1: H, M2: L, CW mode)
CK
MO
(%)
100
71
IA
0
−71
−100
(%)
100
71
IB
0
−71
−100
t0
t1
t2
t3
t4
t5
t6
t7
t8
1−2 phase excitation (M1: H, M2: L, CCW mode)
CK
MO
(%)
100
71
IA
0
−71
−100
(%)
100
71
IB
0
−71
−100
t0
t1
t2
t3
t4
t5
t6
t7
t8
18
2014-10-01
TC78S600FNG/FTG
W1−2 phase excitation (M1: L, M2: H, CW mode)
CK
MO
(%)
100
92
71
38
IA
0
−38
−71
−92
−100
(%)
100
92
71
38
IB
0
−38
−71
−92
−100
t0
t1
t2
t3
t4
t5
t6
t7
19
t8
t9
t10
t11
t12
t13
t14
t15
t16
2014-10-01
TC78S600FNG/FTG
W1−2 phase excitation (M1: L, M2: H, CCW mode)
CK
MO
(%)
100
92
71
38
IA
0
−38
−71
−92
−100
(%)
100
92
71
38
IB
0
−38
−71
−92
−100
t0
t1
t2
t3
t4
t5
t6
t7
20
t8
t9
t10
t11
t12
t13
t14
t15
t16
2014-10-01
TC78S600FNG/FTG
2W1−2 phase excitation (M1: H, M2: H, CW mode)
CK
MO
(%)
100
98
92
83
71
56
38
20
IA
0
−20
−38
−56
−71
−83
−92
−98
−100
(%)
100
98
92
83
71
56
38
20
IB
0
−20
−38
−56
−71
−83
−92
−98
−100
t0 t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 t18 t19 t20 t21 t22 t23 t24 t25 t26 t27 t28 t29 t30 t31 t32
21
2014-10-01
TC78S600FNG/FTG
2W1−2 phase excitation (M1: H, M2: H, CCW mode)
CK
MO
(%)
100
98
92
83
71
56
38
20
IA
0
−20
−38
−56
−71
−83
−92
−98
−100
(%)
100
98
92
83
71
56
38
20
IB
0
−20
−38
−56
−71
−83
−92
−98
−100
t0 t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 t18 t19 t20 t21 t22 t23 t24 t25 t26 t27 t28 t29 t30 t31 t32
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2014-10-01
TC78S600FNG/FTG
4W1−2 phase excitation (M1: L, M2: L, CW mode)
CLK
[%]
100
98
96
92
88
83
77
71
63
IA
56
47
IB
38
29
20
10
0
−10
−20
−29
−38
−47
−56
−63
−71
−77
−83
−88
−92
−96
−98
−100
t0･･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t64
23
2014-10-01
TC78S600FNG/FTG
4W1−2 phase excitation (M1: L, M2: L, CCW mode)
CLK
[%]
100
98
96
92
88
83
77
71
63
IA
56
47
IB
38
29
20
10
0
−10
−20
−29
−38
−47
−56
−63
−71
−77
−83
−88
−92
−96
−98
−100
t0･･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t64
24
2014-10-01
TC78S600FNG/FTG
Current level (Unit: %)
Step
4W1-2 phase
2W1-2 phase
W1-2 phase
1-2 phase
A phase B phase A phase B phase A phase B phase A phase B phase
θ
0
100
0
θ
1
100
10
θ
2
98
20
θ
3
96
29
θ
4
92
38
θ
5
88
47
θ
6
83
56
θ
7
77
63
θ
8
71
71
θ
9
63
77
θ
10
56
83
θ
11
47
88
θ
12
38
92
θ
13
29
96
θ
14
20
98
θ
15
10
100
θ
16
0
100
100
0
98
20
92
38
83
56
71
71
56
83
38
92
20
98
0
100
25
100
0
92
38
71
71
38
92
0
100
100
0
71
71
0
100
2014-10-01
TC78S600FNG/FTG
CK
MO
M1
M2
RESET
(%)
100
91
71.4
40
IA
0
−40
−71.4
−91
−100
1-2-phase excitation
Other excitation mode
M1 and M2 should be changed after RESET is set low in the initial state (MO = Low).
Smooth current waveform cannot be gained if they are changed without setting RESET low though MO is set
low.
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2014-10-01
TC78S600FNG/FTG
Decay mode
Fast decay mode is fixed to 12.5%. Cycle of charge and discharge of PWM drive corresponds to 8 cycles of
OCS. Last 1 cycles of OCS are decayed in Fast mode.
1.
Current waveform and setting of MIXED DECAY MODE
Cycle of charge and discharge of PWM drive corresponds to 8 cycles of OSC.
DECAY MODE is fixed to Fast decay mode of 12.5%.
NF means the point where the output current reaches the setting current.
fchop
OSC
Internal
Waveform
Setting current
NF
12.5%
Fast
Decay
Mode
MDT
CHARGE MODE → NF: Reach setting current → SLOW MODE →
MIXED DECAY TIMMING → FAST MODE → Monitor current →
(Setting current > Output current): CHARGE MODE
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2014-10-01
TC78S600FNG/FTG
2.
Each current control mode (Efficiency of DECAY MODE)
・Increasing current (Sine-wave drive)
Slow
Setting
current
Charge
Charge
Slow
Fast
Charge
Fast
Charge
Slow
Fast
Slow
Setting
current
Fast
・Decreasing current (Example 1)
Setting
current
Slow
Charge
Slow
Fast
Charge
Fast
Slow
Setting
current
Slow
Fast
Charge
Fast
・ Decreasing current (Example 2)
Setting
current
Slow
Charge
Slow
Fast
Charge
Fast
Slow
Charge
Fast
Charge
Slow
Fast
Setting
current
In MIXED DECAY MODE and FAST DECAY MODE, when output current is higher than setting current,
CHARGE MODE does not exist (in a narrow sense, CHARGE MODE is very short time for detecting
current) at the next chopping cycle. And it moves to SLOW and FAST MODE. SLOW MODE is moved to
FAST MODE by MDT.
Note: The figure above is an image. It is a transient response curve in actual.
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2014-10-01
TC78S600FNG/FTG
3.
Wave form of MIXED DECAY MODE (Current waveform)
fchop
fchop
OSC
Internal
waveform
Setting
current
Setting
current
NF
NF
IOUT
12.5% Fast DECAY MODE
•
Point of MDT (MIXED DECAY TIMMING)
In case NF point is after MIXED DECAY TIMMING;
FAST mode after CHARGE
fchop
fchop
NF
Setting current
Point of MDT (MIXED DECAY TIMMING)
NF
Setting
current
IOUT
12.5%
Fast DECAY MODE
Input CLK signal
•
Output current in MIXED DECAY MODE > Setting current;
fchop
Setting
current
fchop
fchop
NF
IOUT
NF
Setting current
Point of MDT (MIXED DECAY TIMMING)
12.5%
Fast DECAY MODE
Input CLK signal
It is charged for a short time for current confirmation though
the current is higher than the setting current.
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2014-10-01
TC78S600FNG/FTG
Current pulling path in case Enable is inputted during operation
In Slow Mode, when all output transistors are turned off forcedly, the energy of the coil is pulled in the below
mode
•
Note: Though parasitic diodes exist on dotted lines, they are not used in the normal MIXED DECAY MODE.
VM
VM
U1
ON
Note
U2
U1
OFF
OFF
Note
OUT1
OUT1 Load OUT2
VM
Load
U2
U1
OFF
OFF
OUT2
ENABLE: low
OFF
ON
ON
L2
L1
L2
L1
ON
RNF
RNF
PGND
Charge mode
U2
OFF
Note
OUT1
Load
OUT2
L1
L2
OFF
OFF
RNF
PGND
Slow mode
PGND
Forced OFF mode
Parasitic diodes exist in the output transistors as shown above.
Parasitic diodes are not used in drawing the energy of the coil because each transistor turns on and current
flows in opposite direction. However, when all output transistors are turned off forcedly, the energy of the coil
is drawn through the parasitic diodes.
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2014-10-01
TC78S600FNG/FTG
Transistor operation of output
VM
VM
U1
U2
U1
OFF
OFF
OFF
ON
ON
L1
L2
L1
ON
Note
VM
Note
Load
Load
U2
U1
OFF
OFF
L2
ON
RNF
L1
Load
L2
OFF
RNF
PGND
Charge mode
ON
Note
ON
RNF
PGND
U2
PGND
Slow mode
Fast mode
Function of output transistor
CLK
U1
U2
L1
L2
Charge
ON
OFF
OFF
ON
Slow
OFF
OFF
ON
ON
Fast
OFF
ON
ON
OFF
Note: Above table is in the case of applying the current in the direction of an arrow in the above figure. The case
of the opposite direction is shown in the below table.
CLK
U1
U2
L1
L2
Charge
OFF
ON
ON
OFF
Slow
OFF
OFF
ON
ON
Fast
ON
OFF
OFF
ON
In moving the function above, each dead time of about 300 ns is inserted.
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TC78S600FNG/FTG
Thermal shut down (TSD) circuit
The TC78S600FNG/FTG includes a thermal shutdown circuit, which turns the output transistors off when the
junction temperature (Tj) exceeds 170°C (typ.).
The output transistors are automatically turned on when Tj cools past the shutdown threshold, which is lowered
by a hysteresis of 40°C.
TSD = 170°C (design target value) (Note)
∆TSD = 40°C (design target value) (Note)
Note: Toshiba does not implement testing before shipping.
*In thermal shutdown mode, the internal circuitry and outputs assume the same states as in enable standby mode.
Upon exit from thermal shutdown mode, they revert to those states which they assume when taken out of enable
standby mode. Start of the output waveform is not defined. It can start from the initial state by inputting low to the
reset.
ISD (Over current protection)
When any of current which flows in 8 DMOS transistors exceeds 1.7 A (typ.), all outputs are turned off. It
does not resume automatically but latches. It resumes when ENABLE is set low to high or UVLO operates.
When ENABLE is set low to high, the pulse of 0.15ms or more should be recognized.
However, masking term of 4μs(typ.) should be added in order to avoid detection error by the noise.
ISD = 1.7A ±0.5A (Note)
1.7A (typ.)
Current of DMOS Power transistor
Dead band:
4μs(typ.)
ENABLE input
H
Output off Output on
0.15ms (min.)
L
Note: Toshiba does not implement testing before shipping.
The state of internal IC and the output state while ISD function operates are same as that of enable standby mode .
Start of the output waveform of automatic recovery can not be defined along with the release from the enable
standby mode. It can start from the initial state by setting the reset low.
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2014-10-01
TC78S600FNG/FTG
Under voltage lockout (UVLO) circuit
The TC78S600FNG/FTG includes an undervoltage lockout circuit, which puts the output transistors in the
high-impedance state when VCC decreases to 2.2 V (typ.) or lower.
The output transistors are automatically turned on when VCC increases past the lockout threshold, which is
raised to 2.3 V (typ.) by a hysteresis of 0.1 V (typ.).
Even when UVLO circuit is tripped, internal circuitry continues to operate in accordance with the CK input like
when ENABLE is set Low. Thus, after the TC78S600FNG/FTG exits the UVLO mode, the RESET signal should be
asserted for putting the TC78S600FNG/FTG in the Initial state if necessary.
The TC78S600FNG/FTG includes an undervoltage lockout circuit, which puts the output transistors in the
high-impedance state when VM decreases to 2.0 V (typ.) or lower.
The output transistors are automatically turned on when VM increases past the lockout threshold, which is
raised to 2.1 V (typ.) by a hysteresis of 0.1 V (typ.).
Even when UVLO circuit is tripped, internal circuitry continues to operate in accordance with the CK input like
when ENABLE is set Low. Thus, after the TC78S600FNG/FTG exits the UVLO mode, the RESET signal should be
asserted for putting the TC78S600FNG/FTG in the Initial state if necessary.
State of the internal IC and output state when UVLO function operates are same as that of the enable standby
mode. Start of the output waveform of automatic recovery can not be defined along with the release from the enable
standby mode. It can start from the initial state by setting the reset low.
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2014-10-01
TC78S600FNG/FTG
Power-on Sequence with Control Input Signals
The order of turning on Vcc and VM is not settled for the user. So, please design the IC not to be damaged
even in case of the start-up (or, even in case of shutdown) from either power supply.
In supplying and shutting down the power, there should be no abnormal operations in outputting. Power
supply monitoring circuit should be provided in necessary. The IC should not be damaged if the power-on
sequence is wrong. The IC should not be damaged in power-on if each input terminal (M1, M2, M3,CLK,
CW/CCW, ENABLE, RESET,DCY, and TQ) is high or low, and Vref outputs any value within the operating
range.
Two examples are shown below figures.
(Example 1): ENABLE = High → RESET = High
(Example 2): RESET = High → ENABLE = High
Motor can start rotating from the initial state in the Example 1.
(1)CLK: Current steps proceed in every rising edge of CLK.
(2)ENABLE: Low: Output is Hi-Z. High: Outputting.
RESET: Low: Initial state (A phase 100％, B phase 0％).
①ENABLE = Low and RESET = Low: Setting of internal current is initial state though output is Hi-Z.
②ENABLE = Low and RESET = High: Setting of internal current is proceeded by the internal counter
though output is Hi-Z.
③ENABLE = High and RESET = Low: Outputting in the initial state (A phase 100％, B phase 0％).
④ENABLE = High and RESET = High: Outputting at the value proceeded by the internal counter.
< Recommended Control Input Sequence >
(Ex.1）
CLK
RESET
ENABLE
Internal current set
Output current (A phase)
(Ex.2)
Z
CLK
RESET
ENABLE
Internal current set
Output current (A phase)
Z
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2014-10-01
TC78S600FNG/FTG
Application Circuit Example
Vcc = 3.3V
+
-
0.1μF
Vcc
VM
+
-
0.1μF
33μF
MO
Clock
CW/CCW
Reset
CPU
I/O
Enable
Standby
CK
CW/CCW
RESET
ENABLE
STBY
Vref
H/L
TQ
H/L
M1
H/L
TC78S600FNG/FTG
10μF
VM = 5 V
AO1
Stepping
motor
AO2
BO1
BO2
RFA
RFB
1Ω
1Ω
M2
OSC
GND
220pF
Note 1: Capacitors for the power supply lines should be connected as close to the IC as possible.
Note 2: The ENABLE pin must be set Low upon powering on and off the device. Otherwise, a large current might
abruptly flow through the output pins.
Usage Considerations
A large current might abruptly flow through the IC in case of a short-circuit across its outputs, a short-circuit to
power supply or a short-circuit to ground, leading to a damage of the IC. Also, the IC or peripheral parts may be
permanently damaged or emit smoke or fire resulting in injury especially if a power supply pin (VCC, VM) or an
output pin (AO1, AO2, BO1, BO2) is short-circuited to adjacent or any other pins.
These possibilities should be fully considered in the design of the output, VCC, VM and ground lines.
Install this IC correctly. If not, (e.g., installing it in the wrong position,) the IC may be damaged permanently.
Fuses should be connected to the power supply lines.
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2014-10-01
TC78S600FNG/FTG
Package Dimensions
Weight: 0.09g(typ.)
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2014-10-01
TC78S600FNG/FTG
P-WQFN24-0404-0.50-004
Unit: mm
Weight: 0.03g(typ.)
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2014-10-01
TC78S600FNG/FTG
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory
purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation
is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even
for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by
explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over
current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute
maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the
wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To
minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse
capacity, fusing time and insertion circuit location, are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON
or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause
injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the
protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the
rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or
combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation or
incorrectly even just one time.
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2014-10-01
TC78S600FNG/FTG
Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the over current protection circuits operate against the over current, clear the over current
status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause
the over current protection circuit to not operate properly or IC breakdown before operation. In addition,
depending on the method of use and usage conditions, if over current continues to flow for a long time after
operation, the IC may generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown
circuits operate against the over temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause
the thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that
heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition.
These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease
in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into
considerate the effect of IC heat radiation with peripheral components.
(4) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings.
To avoid this problem, take the effect of back-EMF into consideration in system design.
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TC78S600FNG/FTG
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
("UNINTENDED USE"). Except for specific applications as expressly stated in this document, Unintended Use includes, without
limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions,
safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE
PRODUCT FOR UNINTENDED USE, TOSHIBA ASSUMES NO LIABILITY FOR PRODUCT. For details, please contact your
TOSHIBA sales representative.
• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to
any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY
WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR
LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND
LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO
SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
• Do not use or otherwise make available Product or related software or technology for any military purposes, including without
limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile
technology products (mass destruction weapons). Product and related software and technology may be controlled under the
applicable export laws and regulations including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the
U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited
except in compliance with all applicable export laws and regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES
OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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2014-10-01
工商网监
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