TC7WPB9307FK,LF(CT

TC7WPB9306FK,TC7WPB9307FK CMOS Digital Integrated Circuits Silicon Monolithic TC7WPB9306FK,TC7WPB9307FK 1. Functional Description • Low-Voltage, Low-Power 2-Bit Dual-Supply Bus Switch 2. General The TC7WPB9306FK and TC7WPB9307FK are CMOS 2-bit dual-supply bus switches that can provide an interface between two nodes at different voltage levels. These devices can be connected to two independent power supplies. VCCA supports 1.8 V, 2.5 V and 3.3 V power supplies, whereas VCCB supports 2.5 V, 3.3 V and 5.0 V power supplies. Bidirectional level-shifting is possible by simply adding external pull-up resistors between the An/Bn data lines and the VCCA / VCCB supplies. There is no restriction on the relative magnitude of the An and Bn voltages; both the An and Bn data lines can be pulled up to arbitrary power supplies. The enable signal can be used to disable the device so that the buses are effectively isolated. The Output Enable (OE:TC7WPB9306FK, OE:TC7WPB9307FK) input is common for all the 2-bits of the data lines; thus these device are used as a single 2-bits bus switch. For the TC7WPB9306FK, Output Enable (OE) is active-High: When OE is High, the switch is on; when Low, the switch is off. For the TC7WPB9307FK, Output Enable (OE) is active-Low: When OE is Low, the switch is on; when High, the switch is off. The TC7WPB9306FK and TC7WPB9307FK supports power-down protection at the OE, OE input, with OE, OE being 5.5 V tolerant. The channels consist of n-type MOSFETs. All the inputs provide protection against electrostatic discharge. 3. Features (1) AEC-Q100 (rev.H) Grade 1 qualified (Note 1) (2) Wide operating temperature range: Topr = -40 to 125 � (Note 2) (3) Operating voltage: 1.8 V to 2.5 V / 1.8 V to 3.3 V / 1.8 V to 5.0 V / 2.5 V to 3.3 V / 2.5 V to 5.0 V / 3.3 V to 5.0 V bidirectional interface (4) Operating voltage: VCCA = 1.65 to 5.0 V, VCCB = 2.3 to 5.5 V (5) Low ON-resistance: RON = 5.0 Ω (typ.) @ VIS = 0 V, IIS = 30 mA, VCCA = 3.0 V, VCCB = 4.5 V (6) 5.5 V tolerance and power-down protection at the Output Enable input. (7) Packages: US8 Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Note 2: For devices with the ordering part number ending in (CT. Topr = -40 to 85 � for the other devices. Start of commercial production 2020-09 ©2020-2021 Toshiba Electronic Devices & Storage Corporation 1 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 4. Packaging US8 5. Pin Assignment TC7WPB9306FK TC7WPB9307FK 6. Block Diagram TC7WPB9306FK ©2020-2021 Toshiba Electronic Devices & Storage Corporation TC7WPB9307FK 2 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 7. Truth Table Inputs OE (TC7WPB9306FK) Function Inputs OE (TC7WPB9307FK) Function L Disconnect L A port = B port H A port = B port H Disconnect 8. Absolute Maximum Ratings (Note) (Unless otherwise specified, T a = 25 �) Characteristics Supply voltage Symbol Note Rating Unit VCCA -0.5 to 7.0 V VCCB -0.5 to 7.0 Input voltage VIN -0.5 to 7.0 Switch I/O voltage VS -0.5 to 7.0 V Clamp diode current IIK -50 mA IS 64 mA ICCA ±25 mA Switch I/O current VCC/ground current per supply pin V ICCB ±25 Power dissipation PD 200 mW Storage temperature Tstg -65 to 150 � Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 9. Operating Ranges (Note) Characteristics Supply voltage Input voltage Symbol Note Rating Unit VCCA (Note 1) 1.65 to 5.0 V VCCB 2.3 to 5.5 VIN 0 to 5.5 V Switch I/O voltage VS Operating temperature Topr 0 to 5.5 V (Note 2) -40 to 125 � Input rise time dt/dv (Note 3) -40 to 85 0 to 10 ns/V Input fall time dt/dv 0 to 10 ns/V Note : The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCCA or GND. Note 1: The VCCA voltage must be lower than the VCCB voltage. Note 2: For devices with the ordering part number ending in (CT. Note 3: For devices except those with the ordering part number ending in (CT. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 3 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 10. Application Circuit (Note) Note: Note: The VCCA < VCCB voltage must be lower than the VCCB voltage. Level-shifting functionality is enabled by adding pull-up resistors from An to VCCA or VCCB and from Bn to VCCB or VCCA, respectively. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 4 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 11. Electrical Characteristics 11.1. DC Characteristics (Unless otherwise specified, T a = -40 to 85 �) Characteristics High-level input voltage Low-level input voltage ON-resistance Symbol Note VIH VIL RON Test Condition VCCA (V) VCCB (V) Min Max Unit � 1.65 ≤ VCCA < 2.3 VCCA to 5.5 0.8 × VCCA � V 2.3 ≤ VCCA < 5.0 VCCA to 5.5 0.7 × VCCA � 1.65 ≤ VCCA < 2.3 VCCA to 5.5 � 0.2 × VCCA 2.3 ≤ VCCA < 5.0 VCCA to 5.5 � 0.3 × VCCA 1.65 2.3 � 16.0 2.3 3.0 � 11.0 3.0 4.5 � 8.0 0 0 � ±1.0 µA � (Note 1) VIS = 0 V, IIS = 30 mA See Figure 12.1 V Ω Power-OFF leakage current IOFF An, Bn = 0 to 5.5 V per circuit Switch OFF-state leakage current ISZ An, Bn = 0 to 5.5 V OE = GND, OE = VCCA 1.65 to 5.0 VCCA to 5.5 � ±1.0 µA Input leakage current IIN OE, OE = 0 to 5.5 V 1.65 to 5.0 VCCA to 5.5 � ±1.0 µA Leakage current form VCCB to VCCA ICCBA OE, OE = GND or VCCA VCCB → VCCA 3.3 5.0 � 10.0 µA Quiescent supply current ICCA1 OE, OE = VCCA or GND, IIS = 0 A 1.65 to 5.0 VCCA � 1.0 µA ICCB1 OE, OE = VCCA or GND, IIS = 0 A 1.65 to 5.0 VCCA � 1.0 ICCA2 VCCA ≤ OE, OE ≤ 5.5 V, IIS = 0 A 1.65 to 5.0 VCCA � ±1.0 ICCB2 VCCA ≤ OE, OE ≤ 5.5 V, IIS = 0 A 1.65 to 5.0 VCCA � ±1.0 Note 1: ON-resistance is measured by measuring the voltage drop across the switch at the indicated current. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 5 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 11.2. DC Characteristics (Note) (Unless otherwise specified, T a = -40 to 125 �) Characteristics High-level input voltage Low-level input voltage ON-resistance Symbol Note VIH � VIL RON � VCCA (V) VCCB (V) Min Max Unit 1.65 ≤ VCCA < 2.3 VCCA to 5.5 0.8 × VCCA � V 2.3 ≤ VCCA < 5.0 VCCA to 5.5 0.7 × VCCA � 1.65 ≤ VCCA < 2.3 VCCA to 5.5 � 0.2 × VCCA 2.3 ≤ VCCA < 5.0 VCCA to 5.5 � 0.3 × VCCA 1.65 2.3 � 25.0 2.3 3.0 � 16.0 3.0 4.5 � 12.0 0 0 � ±4.0 µA (Note 1) VIS = 0 V, IIS = 30 mA See Figure 12.1 V Ω Power-OFF leakage current IOFF An, Bn = 0 to 5.5 V Per circuit Switch OFF-state leakage current ISZ An, Bn = 0 to 5.5 V OE = GND, OE = VCCA 1.65 to 5.0 VCCA to 5.5 � ±4.0 µA Input leakage current IIN OE, OE = 0 to 5.5 V 1.65 to 5.0 VCCA to 5.5 � ±4.0 µA Leakage current form VCCB to VCCA ICCBA OE, OE = GND or VCCA VCCB → VCCA 3.3 5.0 � 40.0 µA Quiescent supply current ICCA1 OE, OE = VCCA or GND, IIS = 0 A 1.65 to 5.0 VCCA � 5.0 µA ICCB1 OE, OE = VCCA or GND, IIS = 0 A 1.65 to 5.0 VCCA � 5.0 ICCA2 VCCA ≤ OE, OE ≤ 5.5 V, IIS = 0 A 1.65 to 5.0 VCCA � ±5.0 ICCB2 VCCA ≤ OE, OE ≤ 5.5 V, IIS = 0 A 1.65 to 5.0 VCCA � ±5.0 Note 1: ON-resistance is measured by measuring the voltage drop across the switch at the indicated current. 11.3. Level Shift Characteristics (Unless otherwise specified, T a = -40 to 85 �) Characteristics Input/Output characteristics (translating up) Input/Output characteristics (translating down) Symbol VOHU VOHD Note Test Condition VCCA (V) VCCB (V) Min Max Unit (Note 1) An = VIN SW = ON See Fig. 14.1. 1.65 3.0 to 5.5 1.4 � V 2.3 4.5 to 5.5 2.05 � 3.0 4.5 to 5.5 2.7 � (Note 2) An = VCCA SW = ON See Fig. 15.1. 1.65 3.0 to 5.5 1.3 1.65 2.3 4.5 to 5.5 1.95 2.3 3.0 4.5 to 5.5 2.6 3.0 V Note 1: The Input/Output characteristics for translating up indicate the input voltages required to provide VCCA + 0.5 V on the outputs when measured using the test circuitry shown in Fig. 14.1. Note 2: The Input/Output characteristics for translating down indicate the voltages that cause the output voltages to saturate when measured using the test circuitry shown in Fig. 15.1. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 6 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 11.4. Level Shift Characteristics (Note) (Unless otherwise specified, T a = -40 to 125 �) Characteristics Symbol Input/Output characteristics (translating up) VOHU Input/Output characteristics (translating down) VOHD Note Test Condition VCCA (V) VCCB (V) Min Max Unit (Note 1) An = VIN SW = ON See Fig. 14.1. 1.65 2.3 3.0 to 5.5 1.4 � V 4.5 to 5.5 2.05 � (Note 2) An = VCCA SW = ON See Fig. 15.1. 3.0 4.5 to 5.5 2.7 � 1.65 3.0 to 5.5 1.3 1.65 2.3 4.5 to 5.5 1.95 2.3 3.0 4.5 to 5.5 2.6 3.0 V Note 1: The Input/Output characteristics for translating up indicate the input voltages required to provide VCCA + 0.5 V on the outputs when measured using the test circuitry shown in Fig. 14.1. Note 2: The Input/Output characteristics for translating down indicate the voltages that cause the output voltages to saturate when measured using the test circuitry shown in Fig. 15.1. 11.5. AC Characteristics (Unless otherwise specified, T a = -40 to 85 �, Input: t r = t f = 2.0 ns, f = 10 kHz) 11.5.1. V CCA = 3.3 ± 0.3 V, V CCB = 5.0 ± 0.5 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.3 ns � 1.2 Propagation delay time (bus to bus) tPLH Output enable time tPZL See Fig. 13.2, 13.4 � 9.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 11.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). 11.5.2. V CCA = 2.5 ± 0.2 V, V CCB = 5.0 ± 0.5 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.35 ns Propagation delay time (bus to bus) tPLH � 1.8 Output enable time tPZL See Fig. 13.2, 13.4 � 13.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 15.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). 11.5.3. V CCA = 2.5 ± 0.2 V, V CCB = 3.3 ± 0.3 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.45 ns � 2.2 Propagation delay time (bus to bus) tPLH Output enable time tPZL See Fig. 13.2, 13.4 � 17.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 19.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). ©2020-2021 Toshiba Electronic Devices & Storage Corporation 7 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 11.6. AC Characteristics (Note) (Unless otherwise specified, T a = -40 to 125 �, Input: t r = t f = 2.0 ns, f = 10 kHz) 11.6.1. V CCA = 3.3 ± 0.3 V, V CCB = 5.0 ± 0.5 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.5 ns Propagation delay time (bus to bus) tPLH � 1.4 Output enable time tPZL See Fig. 13.2, 13.4 � 13.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 15.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). 11.6.2. V CCA = 2.5 ± 0.2 V, V CCB = 5.0 ± 0.5 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.55 ns � 2.0 Propagation delay time (bus to bus) tPLH Output enable time tPZL See Fig. 13.2, 13.4 � 17.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 19.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). 11.6.3. V CCA = 2.5 ± 0.2 V, V CCB = 3.3 ± 0.3 V Characteristics Symbol Note Test Condition (Note 1) See Fig. 13.1, 13.3 Min Max Unit � 0.65 ns Propagation delay time (bus to bus) tPLH � 2.4 Output enable time tPZL See Fig. 13.2, 13.4 � 21.0 ns Output disable time tPLZ See Fig. 13.2, 13.4 � 23.0 ns tPHL Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 30 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). 11.7. Capacitive Characteristics (Unless otherwise specified, T a = 25 �) Characteristics Symbol Test Condition VCCA (V) VCCB (V) Input capacitance CIN � 3.3 Switch terminal ON-capacitance CI/O � 3.3 Switch terminal OFF-capacitance CI/O � 3.3 ©2020-2021 Toshiba Electronic Devices & Storage Corporation 8 Typ. Unit 3.3 3 pF 3.3 14 pF 3.3 7 pF 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 12. DC Test Circuit Fig. 12.1 ©2020-2021 Toshiba Electronic Devices & Storage Corporation ON-resistance Test Circuits 9 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 13. AC Test Circuits/Waveform Fig. 13.1 t PLH , t PHL Test Circuits Fig. 13.2 t PLZ , t PZL Test Circuits Fig. 13.3 ©2020-2021 Toshiba Electronic Devices & Storage Corporation AC Waveform of t PLH , t PHL 10 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK Fig. 13.4 ©2020-2021 Toshiba Electronic Devices & Storage Corporation AC Waveform of t PLZ , t PZL 11 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 14. Level Shift Function (Used Pull-up Resistance) Fig. 14.1 Test Circuit Fig. 14.2 Input/Output Characteristics (Typ.) V CCA = 1.8 V, T a = 25 � Fig. 14.3 Fig. 14.4 Input/Output Characteristics (Typ.) V CCA = 3.0 V, T a = 25 � Note: Input/Output Characteristics (Typ.) V CCA = 2.3 V, T a = 25 � The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 12 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK 15. Level Shift Function (Unused Pull-up Resistance) Fig. 15.1 Test Circuit Fig. 15.2 Input/Output Characteristics (Typ.) V CCA = 1.8 V, T a = 25 � Fig. 15.3 Fig. 15.4 Input/Output Characteristics (Typ.) V CCA = 3.0 V, T a = 25 � Note: Input/Output Characteristics (Typ.) V CCA = 2.3 V, T a = 25 � The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2020-2021 Toshiba Electronic Devices & Storage Corporation 13 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK Package Dimensions Unit: mm Weight: 0.01 g (typ.) Package Name(s) JEDEC: SOT-765 Nickname: US8 ©2020-2021 Toshiba Electronic Devices & Storage Corporation 14 2021-06-11 Rev.4.0 TC7WPB9306FK,TC7WPB9307FK RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as "TOSHIBA". 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