TLX9310(TPL,F

TLX9310 Photocouplers Infrared LED & Photo IC TLX9310 1. Applications • Automotive • Battery Management System (BMS) 2. General The Toshiba TLX9310 consists of a high-output an infrared LED coupled with a high-speed photo-diode-transistor chip. It is housed in the SO6 package. This photocoupler guarantees operation at up to 105  and on supplies from 2.7 V to 5.5 V. Since TLX9310 has guaranteed 0.3 mA low supply current (IDDL/IDDH), and 1.0 mA (Topr = 105 ) low threshold input current(IFHL), it contributes to energy saving of devices. It can drive directly from a microcomputer for a low input current. 3. Features (1) Buffer logic type (totem pole output) (2) Package: SO6 (3) Operating temperature: -40 to 105  (4) Supply voltage: 2.7 to 5.5 V (5) Threshold input current: 1.0 mA (max) (6) Supply current: 0.3 mA (max) (7) Data transfer rate: 5 Mbps (typ.) (8) Common-mode transient immunity: ±25 kV/µs (min) (9) Isolation voltage: 3750 Vrms (min) (10) AEC-Q101 qualified 4. Packaging and Pin Assignment 1: Anode 3: Cathode 4: GND 5: VO 6: VDD 11-4L1S ©2016-2019 Toshiba Electronic Devices & Storage Corporation 1 2019-11-18 Rev.5.0 TLX9310 5. Internal Circuit (Note) Note: A 0.1-µF bypass capacitor must be connected between pin 6 and pin 4. 6. Principle of Operation 6.1. Truth Table Input LED Output H ON H L OFF L 6.2. Mechanical Parameters Characteristics Min Unit Creepage distances 5.0 mm Clearance 5.0 Internal isolation thickness  7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 ) Characteristics LED Symbol Input forward current Input forward current derating (Ta ≥ 85 ) Note Rating Unit IF 8 mA ∆IF/∆Ta -0.05 mA/ Input forward current (pulsed) IFP Input power dissipation PD Input reverse voltage VR 5 V IO 10 mA Output voltage VO 6 V Supply voltage VDD 6 V Detector Output current Output power dissipation Common Operating temperature Storage temperature 1 A 20 mW PO 20 mW Topr -40 to 105  Tstg -55 to 125  (10 s) Tsol 260  (AC, 60 s, R.H. ≤ 60 %) BVS 3750 Vrms Lead soldering temperature Isolation voltage (Note 1) (Note 2) Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Pulse width (PW) ≤ 1 µs, 300 pps Note 2: This device is considered as a two-terminal device: Pins 1 and 3 are shorted together, and pins 4, 5 and 6 are shorted together. ©2016-2019 Toshiba Electronic Devices & Storage Corporation 2 2019-11-18 Rev.5.0 TLX9310 8. Recommended Operating Conditions (Note) Characteristics Symbol Note Min Typ. Max Unit Supply voltage VDD 2.7 3.0 to 5.0 5.5 V Operating temperature Topr -40  105  Note: Note: Note: The recommended operating conditions are given as a design guide necessary to obtain the intended performance of the device. Each parameter is an independent value. When creating a system design using this device, the electrical characteristics specified in this data sheet should also be considered. A ceramic capacitor (0.1 µF) should be connected between pin 6 (VDD) and pin 4 (GND) to stabilize the operation of a high-gain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be placed within 1 cm of each pin. If the rising slope of the supply voltage (VDD) for the detector is steep, stable operation of the internal circuits cannot be guaranteed. Be sure to set 3.0 V/µs or less for a rising slope of the VDD. 9. Electrical Characteristics (Note) (Unless otherwise specified, Ta = -40 to 105 , VDD = 2.7 to 5.5 V) Characteristics Symbol Input forward voltage VF Input reverse current IR Input capacitance Test Circuit Ct Test Condition Min Typ. Max Unit IF = 2 mA, Ta = 25  1.4 1.55 1.7 V IF = 2 mA 1.2  1.9 VR = 5 V, Ta = 25    10 µA V = 0 V, f = 1 MHz , Ta = 25   20  pF   0.1 V Low-level output voltage VOL Fig. 12.1 IF = 0 mA, IO = 20 µA High-level output voltage VOH Fig. 12.2 IF = 2 mA, IO = -20 µA Low-level supply current IDDL Fig. 12.3 IF = 0 mA High-level supply current IDDH Fig. 12.4 IF = 2 mA Threshold input current (L/H) IFLH IF = 0 mA, IO = 3.2 mA IF = 2 mA, IO = -3.2 mA Note:   0.4 VDD-0.1   VDD-1.0     0.3 mA   0.3 mA   1.0 mA Min Typ. Max Unit IO = -3.2 mA, VO > 2.4 V V All typical values are at VDD = 5 V, Ta = 25 , unless otherwise noted. 10. Isolation Characteristics (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Note Test Condition Total capacitance (input to output) CS (Note 1) VS = 0 V, f = 1 MHz  0.8  pF Isolation resistance RS (Note 1) VS = 500 V, R.H. ≤ 60 % 1012 1014  Ω (Note 1) AC, 60 s 3750   Vrms Isolation voltage BVS Note 1: This device is considered as a two-terminal device: Pins 1 and 3 are shorted together, and pins 4, 5 and 6 are shorted together. ©2016-2019 Toshiba Electronic Devices & Storage Corporation 3 2019-11-18 Rev.5.0 TLX9310 11. Switching Characteristics (Note) (Unless otherwise specified, Ta = -40 to 105 , VDD = 2.7 to 5.5 V) Characteristics Symbol Note Propagation delay time (L/H) tpLH (Note 1) Propagation delay time (H/L) tpHL Pulse width distortion Min Typ. Max Unit   250 ns   250   50   65   250 tpHL   250 |tpHL-tpLH|   50   65 Fig.12.5 VIN = 0 → 3.3 V, RT = 820 Ω, VDD = 5 V  11  VIN = 3.3 → 0 V, RT = 820 Ω, VDD = 5 V  13  ±25 ±40  tpsk (Note 1), (Note 2) Propagation delay time (L/H) tpLH (Note 1) Pulse width distortion Propagation delay skew (device to device) Test Condition Fig.12.5 VIN = 3.3 V, RT = 820 Ω |tpHL-tpLH| Propagation delay skew (device to device) Propagation delay time (H/L) Test Circuit tpsk (Note 1), (Note 2) Rise time tr (Note 1) Fall time tf High-level common-mode transient immunity CMH Low-level common-mode transient immunity CML Fig.12.5 VIN = 5 V, RT = 1.6 kΩ Fig.12.6 VIN = 3.3 V/5 V, VDD = 2.7 V/5 V, VCM = 1000 Vp-p, Ta = 25  ns ns kV/µs Note: Note: All typical values are at VDD = 5 V, Ta = 25 , unless otherwise noted. Recommendation input resistance conditions VIN = 3.3 V: R1 = R2 = 430 Ω VIN = 5 V: R1 = R2 = 820 Ω Note 1: f = 250 kHz, duty = 50 %, input current tr = tf = 5 ns, CL is less than 15 pF which includes probe and stray wiring capacitance. Note 2: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc.). ©2016-2019 Toshiba Electronic Devices & Storage Corporation 4 2019-11-18 Rev.5.0 TLX9310 12. Test Circuits Fig. 12.1 VOL Test Circuit Fig. 12.2 VOH Test Circuit Fig. 12.3 IDDL Test Circuit Fig. 12.4 IDDH Test Circuit Fig. 12.5 Switching Time Test Circuit and Waveform Fig. 12.6 Common-Mode Transient Immunity Test Circuit and Waveform ©2016-2019 Toshiba Electronic Devices & Storage Corporation 5 2019-11-18 Rev.5.0 TLX9310 Package Dimensions Unit: mm Weight: 0.08 g (typ.) Package Name(s) TOSHIBA: 11-4L1S ©2016-2019 Toshiba Electronic Devices & Storage Corporation 6 2019-11-18 Rev.5.0 TLX9310 RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as "TOSHIBA". Hardware, software and systems described in this document are collectively referred to as "Product". • TOSHIBA reserves the right to make changes to the information in this document and related Product without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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