CMH82

CMH82 Preliminary Datasheet • H igh-Linearity, Cellular LNA/Mixer IC for use in TDMA and CDMA Mobile Phones • I ntegrated bypass switch for LNA • G aAs PHEMT Process • L eadless 3.5 x 3.5 mm. SMT package • L O Input power range: -12.0 to 0 dBm • O perating voltage range: 2.7 to 4 V • T otal current consumption: 20 mA • A djustable Mixer Gain and IP3 ESD: E lectro s tatic d ischarge sensitive device Observe handling Precautions! LO LNA IF CDMA AMPS Type Marking Ordering code (tape and reel) Package CMH82 H82 TBD VQFN-20 Maximum Ratings Supply Voltage DC-Voltage at RF Ports DC-Voltage at GND Ports DC-Voltage at CNTL Ports Power into LO Input Operating Temperature Channel Temperature Storage Temperature Thermal Resistance Channel to Soldering Point (GND) Symbol min VDD VRF VGND VCNTL Pin,LO Ta TCh Tstg -55 0 - 0.3 - 0.3 0 -40 Value max 4 0.3 0.3 0.3 + VDD 10 85 150 150 Unit V V V V dBm °C °C °C RthChS 102 °C /W CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 1 CMH82 Electrical Characteristics Parameter, RF - Frequency LO - Frequency (1) min 869 919 50 -12.0 2.7 2.4 0.0 typ 2.7 - max 894 1194 300 0.0 4.0 0.3 + VDD 0.3 Unit MHz MHz MHz dBm V V V IF Frequency range LO Power Input Supply Voltage (Vdd) High Logic Level (H) Low Logic Level (L) 1) Low-side LO can be achieved using external tuning LNA – Performance of LNA: Test conditions: Ta = 25°C, VDD= 2.7 V, fRF = 869 - 894 MHz Mode – High Gain, High Linearity min Operating Current Noise Figure Gain Input / Output return loss 3rd Order Input Intercept Point Mode – High Gain, Reduced Current Operating Current Noise Figure Gain Input / Output return loss 3rd Order Input Intercept Point Mode – Low Gain, By-Pass Mode Operating Current Noise Figure Gain Input / Output return loss 3rd Order Input Intercept Point min min typ 6.5 1.1 12.5 10 10.0 typ 4.5 1.2 12.3 10 8.0 typ 0 4.5 -4.5 10 25 max Unit mA dB dB dB dBm max Unit mA dB dB dB dBm max Unit mA dB dB dB dBm CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 2 CMH82 MIXER - Electrical Characteristics of Mixer section Test conditions: Ta = 25°C; VDD= 2.7V, PLO = -10 dBm, fLO = fRF + f IF, fIF = 85MHz Mode – High Gain, High Linearity CDMA min typ max Operating Current Conversion Gain Noise Figure 3rd Order Input Intercept Point RF Input return loss LO Input return loss IF Output Impedance Operating Current Conversion Gain(1) Noise Figure 3rd Order Input Intercept Point RF Input return loss LO Input return loss IF Output Impedance Mode – AMPS Operating Current Conversion Gain Noise Figure 3rd Order Input Intercept Point RF Input return loss LO Input return loss IF Output Impedance (2) (2) (2) (1) Unit mA dB dB dBm dB dB Ω 13.5 15.5 4.5 6.5 10 10 695+j*135 min typ 11.0 15.2 4.7 4.5 10 10 695+j*135 min typ 11 13.5 5.7 2.5 10 10 172+j*78 max max Mode – Reduced Current CDMA Unit mA dB dB dBm dB dB Ω Unit mA dB dB dBm dB dB Ω 1) CDMA Mixer Gain may be varied from approximately 10 to 20 dB (typical) by choice of external components. See notes. 2) IF Output externally tuned to desired impedance CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 3 CMH82 FULL CHAIN – LNA / Downconverter Characteristics Test conditions: Ta = 25 °C, VDD= 2.7 V, PLO = -10 dBm, fIF = 85 MHz Mode – High Gain, High Linearity CDMA Total operating Current Conversion Gain Noise Figure Input IP3 LNA Input IP3 Mode – High Gain, Reduced Current CDMA Total operating Current Conversion Gain Noise Figure Input IP3 LNA Input IP3 Mode – Low Gain (LNA bypass) CDMA Total operating Current Conversion Gain Noise Figure Input IP3 Mode – AMPS (2) (1) (2) (1) (1) min typ 20 25 1.9 -3.5 10.0 max Unit mA dB dB dBm dBm min typ 15.5 24.5 2.0 -5 8.0 max Unit mA dB dB dBm dBm min typ 11.0 7.7 12.0 11.5 max Unit mA dB dB dBm min (1) typ 15.5 22.8 2.3 -6.5 max Unit mA dB dB dBm Total operating Current Conversion Gain Noise Figure Input IP3 1) Assumes 3 dB loss for image filter 2) Assumes reduced current mode CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 4 CMH82 Truth Table Control Voltage Operating Mode High Gain & Linearity High Gain, Low Current Low Gain (LNA bypass) AMPS Mode Ctl H H H L Gain Ctl H H L H Rcv Only H L L L PIN Assignments & Functional Block Diagram CDMA LNA RFA IFA LOA AMPS PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol LO in GND LO Vdd Mix out AMPS in CDMA in GND Ifa src CDMA out AMPS out Mode RFA in RFA Vdd Vdd LNA Vdd LNA out GND LNA in Rcv Gctl Description Mixer LO Input Ground Supply voltage for LO Buffer Amp Mixer output to IF Amplifier AMPS IF Amplifier input CDMA IF Amplifier input Ground IF Amplifier FET source ground CDMA IF output AMPS IF output AMPS or CDMA IF mode control Downconverter input from image filter Supply voltage for RFA Supply voltage Supply voltage for LNA Output of LNA Ground RF Input to LNA Reduced current mode control Control voltage for LNA gain selection CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 5 CMH82 Application Circuit Vdd C2 C1 L2 16 15 14 13 C3 R3 L3 12 11 Mode Vdd C9 L4 C7 17 10 RF in Rcv L1 18 9 C4 19 8 C8 L6 L5 20 7 R2 C13 Gctl R1 Vdd C10 C5 1 2 3 4 5 6 LO in L8 L9 C6 L7 C14 C12 C11 Vdd External Components Component values for IF = 85 MHz. LO = RF +IF . Component C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 Description CAP, 47 PF CAP, 10K PF CAP, 100 PF CAP, 47 PF CAP, 47 PF CAP, 1000 PF CAP, 18 PF CAP, 10 PF CAP, 10K PF CAP, 10K PF CAP, 12 PF CAP, 100 PF CAP, 3.3 PF CAP, 0.5 PF Package Type 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 Component L1 L2 L3 L4 L5 L6 L7 L8 L9 R1 R2 R3 Description IND, 19 NH IND, 12 NH IND, 12 NH IND, 330 NH IND, 270 NH IND, 220 NH IND, 270 NH IND, 18 NH IND, 12 NH RES, 47 KOHM RES, 47 KOHM RES, 47 KOHM Package Type 0402 0402 0402 0805 0603 0603 0603 0402 0402 0402 0402 0402 CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 6 CMH82 Package Outline - VQFN 20 Recommended PCB Layout CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 7 CMH82 Evaluation Board 2000 (mil) C5 C4 L1 C1 C2 RF SAW filter L9 C6 L8 CMH82 L2 L3 C12 C14 L7 C11 C8 Jumper L6 L5 C13 C10 C7 L4 C3 C9 R3 R2 R1 2000 (mil) CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 8 CMH82 CMH82 – Application Information DC Biasing: Supply Voltage. One regulated voltage source is needed for CMH82. On the evaluation board, it is labeled VDD. Minimum LO Power for Proper Biasing For proper biasing of the CMH82, a minimum LO input power is required. If the part is turned ON without any LO drive applied, all currents will be extremely high. The minimum LO required is approximately –12 dBm. Operation with LO input powers below the minimum value causes the current to increase in all amplifier stages. For higher LO input power levels the current stays relatively constant over a wide range of LO powers. Proper matching of the LO amplifier is also important to achieve the lowest current consumption and to minimize the required LO input power. Adjustable Current Level The CMH82 can operate in two different current/linearity modes: High Linearity (with higher current) and Reduced Current (lower linearity). To operate with reduced current the voltage on pin 19 (RCV) should be set LOW. Some additional current reduction can be achieved by reducing the voltage at pin 14 by inserting a resistor between VDD and pin 14. The current pulled by pin 14 is approximately 1 mA. Higher currents can be realized by using a higher VDD voltage. Tuning LO and IF Amplifiers: The CMH82 can be tuned to utilize either high or low side LO frequencies and allows a wide range of IF frequencies. Depending on the chosen frequency plan the off chip components for the LO and IF amplifiers will need to be optimized. An application circuit with all component values is provided for high side LO injection with IF frequency of 85 MHz (RF freq 869 – 894 MHz). Two external components (L9 and L8) are required for tuning the LO. L8 is critical for setting the minimum current and to achieve the constant DC current over the operating band. L9 sets the input match. Components L7, C11 and C12 form the input match for the IF amplifiers and will vary depending on the chosen IF frequency. The inductor on pin 8 allows adjustment to the gain of the IF amplifiers. Output matching components shown in the application circuit provide a transformation for a 50 Ohm load impedance. The output impedance for the CDMA IFA (looking into pin 9) at 85 MHz is approximately (695 + j*135) Ohms. The AMPS output impedance is approximately (172 + j*78) Ohms at 85 MHz. CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 9 CMH82 Downconverter Gain Adjustment: The Downconverter gain can be adjusted by changing the source feedback inductor L6 for the IFA. Higher inductance will give lower downconverter gain and typically improve the IIP3. Gain/Current Control Pins: LOW = 0 to 0.3 V HIGH = Vdd to (Vdd – 0.3) V VGAIN – select between high and low gain states in the LNA. VGAIN = HIGH : LNA ON (~12 dB Gain, ~ 6 mA current) VGAIN = LOW : LNA bypassed (~ 4 dB Loss, no current) VRCV - selects Current/Linearity mode (changes current in LNA/RFA/IFA) VRCV = LOW selects Reduced Current Mode VRCV = HIGH selects High Linearity Mode. VMODE - selects which IF amplifier is ON VMODE = LOW selects AMPS mode VMODE = HIGH selects CDMA mode Other Notes: Inductor L1 is critical for setting the Noise Figure of the LNA. A high Q wire wound inductor (e.g. Coilcraft) is recommended to achieve minimum NF. LNA current can be determined by subtracting the current in Low Gain mode from the current in High Gain mode (keeping VRCV and VMODE constant). Capacitor C14 can be eliminated if a slightly higher (~0.5 dB) downconverter noise figure is tolerable. Control lines (G_CNTL, VRCV and VMODE) have an input impedance of > 1 MΩ when Vdd is ON. When VDD is off, they have approximately 20 KΩ input impedance. CMH82 - Preliminary Datasheet (Rev 3nl, 1/02) 10