TQBIHEMT

Limited Release- Proprietary Combined 0.7μm E/D pHEMT & 2μm HBT Foundry Service TQBiHEMT Features • E-Mode, 0.30 V, Vth • D-Mode, -0.8 V Vp • InGaAs Active Layer pHEMT Process + InGaP HBT • 0.7 µm Optical Lithography- Gates • 2 µm Optical Lithography- Emit- ters; Beta = 75 • High Density Interconnects: • 2 Global • 1 Local • High-Q Passives • Thin Film Resistors • High Value Capacitors (1200 TQBiHEMT Process Cross-Section General Description TriQuint’s TQBiHEMT process is based on our productionreleased 0.7 µm TQPED and TQHBT3.1 processes. TQPED includes E-Mode and D-Mode pHEMT transistors. TQHBT3.1 is a 2 µm emitter InGaP HBT process designed for high ruggedness, high power applications. TQBiHEMT combines both processes onto a single wafer, enabling designers to integrate highly efficient, high power InGaP HBT PAs onto a single die with switches, LNAs, mixers and other functions that exhibit higher performance with a pHEMT realization. This process is targeted for integration of power amplifiers with linear, low loss and high isolation RF switch applications, converters and integrated RF Front Ends. The three metal interconnecting layers are encapsulated in a high performance dielectric that allows wiring flexibility, optimized die size and plastic packaging simplicity. Precision NiCr resistors and high value MIM capacitors are included allowing higher levels of integration, while maintaining smaller, cost – effective die sizes. pF/µm2) • Backside Vias Optional • Based on Production TQPED pHEMT and TQHBT3.1 HBT Applications • Integration of Highly Efficient • • • • • • and Linear Power Amplifiers Low Loss, High Isolation, LowHarmonic Content Switches Integrated digital control logic for Switches and Transceivers Converters Integrated RF Front Ends– LNA, SW, PA Wireless Transceivers, Base stations, Direct Broadcast Satellite Radars, Digital Radios, RF / Mixed Signal ICs Power Detectors and Couplers Page 1 of 3; Rev 0.3; 6/05/2008 Limited Release- Proprietary Production Process Combined 0.7μm E/D pHEMT & 2μm HBT Foundry Service TQBiHEMT TQBiHEMT Process Details Transistor Details @ Vds = 3.0V Element D-Mode pHEMT Parameter Vp (1uA/um) Idss Imax Breakdown, Vdg Ft @ 50% Idss Fmax @ 50% Idss Gm (50% Idss) Ron E-Mode pHEMT Vth (1uA/um) Idss (max) Imax Breakdown, Vdg Ft @ 50% Idss Fmax @ 50% Idss Gm (50% Imax) Ron HBT Beta BVcbo Ft Fmax (For a 3x3x45μm unit cell:) BVceo BVbeo Typical* -0.8 160 430 10 min, 18 typ 21 38 225 2.3 +0.30 0.01 175 10 min, 18 typ 20 39 355 3.0 75 24 30 60 14 7 v GHz GHz V V Units V mA/mm mA/mm V GHz GHz mS/mm Ohms * mm V uA/um mA/mm V GHz GHz mS/mm Ohms * mm Common Process Element Details Gate Length Interconnect MIM Caps Resistors Value NiCr 0.7 3 1200 50 μm Metal Layers pF/mm2 Ohms/sq Bulk 360 Ohms/sq *Values for reference only: Actual specifications subject to change without notice prior to Production Release. TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Semiconductors for Communications www.triquint.com Page 2 of 3; Rev 0.3; 6/05/2008 Page 2 of 5; Rev 2.0 7/22/03 Phone: 503-615-9000 Fax: 503-615-8905 Email: foundryinfo@triquint.com Limited Release- Proprietary Combined 0.7μm E/D pHEMT & 2μm HBT Foundry Service TQBiHEMT Deg C Deg C V kA/cm2 V Maximum Ratings Storage Temperature Range Operating Temperature Range EFET/DFET Transistor (Vs open; Idg = 1uA/um) HBT Junction Current Density Capacitor -65 to +150 -55 to +150 10 20 40 Prototyping and Development • Prototype Development Quick Turn (PDQ): • Shared mask set • Bi-Monthly, starting in 3rd Quarter 2008 • 5 to 6 week cycle time • Prototype Wafer Option (PWO): • Customer-specific masks; Customer schedule • 2 wafers delivered • 8 week cycle time Process Qualification Status • New Process based on mature TQPED and TQHBT3.1 150-mm processes • Process in final stages of development • Full 150mm wafer Process Qualification by June 2008 • For more information on Quality and Reliability, contact TriQuint or visit: www.triquint.com/company/quality Applications Support Services • • • • Tiling of GDSII stream files including PCM Design Rule Check services Packaging Development Engineering Test Development Engineering: • On-wafer • Packaged parts • Yield Enhancement Engineering • Failure Analysis Design Tool Status • Preliminary Design Manual includes Device Library of circuit elements: FETs, diodes, thin film resistors, capacitors, inductors • Preliminary Layout Library in GSD II format • Cadence Development Kit with PCells and Layout Rule Sets for Design Rule Check in Cadence • Preliminary Design Kit for Agilent’s ADS design environment • Preliminary Design Kit for AWR’s Microwave Office design environment planned Manufacturing Services • • • • • • • • Mask making Production 150-mm wafer fab Wafer Thinning Wafer Sawing Substrate Vias DC Diesort Testing Plastic Packaging RF Packaged Part Testing Training • GaAs Design Classes: • Half-Day Introduction; Upon request • Three-Day Technical Training, typically midyear. Please contact your local TriQuint Semiconductor Representative/ Distributor or Foundry Services Division for Additional information: E-mail: sales@triquint.com Phone: (503) 615-9000 Fax: (503) 615-8905 Semiconductors for Communications www.triquint.com Page 3 of 3; Rev 0.3 6/05/2008 TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Phone: 503-615-9000 Fax: 503-615-8905 Email: foundryinfo@triquint.com