TQHBT

Production Process InGaP HBT Foundry Service Features Metal 2 - 4um TQHBT • • • • • Dielectric Dielectric Metal 1 - 2um Dielectric E B C Emitter Metal 1 - 2um B C NiCr MIM Metal 0 Base Collector • Sub Collector Isolation Implant Buffer & Substrate • • • • • • • TQHBT Process Cross-Section General Description TriQuint’s TQHBT process is a highly reliable InGaP HBT process with three levels of interconnecting metal. Thick metal interconnects and high quality passives promote integration. The thick metal interconnects, which promote enhanced thermal management, and high density capacitors keep die sizes small. MOCVD epitaxial processes are utilized to grow the active layers. A carbon-doped Base and InGaP Emitter are utilized for high RF performance consistent with high reliability. Precision NiCr resistors and high value MIM capacitors are included. The three metal layers are encapsulated in a high performance dielectric that allows wiring flexibility and plastic packaging simplicity. InGaP Emitter Process for High Reliability and Thermal Stability Base Etch Stop for Uniformity MOCVD Epitaxy High Linearity in PA applications High Density Interconnects; • 2 Global, 1 Local • Over 6 µm Total Thickness • Dielectric Encapsulated Metals Thick Metal Interconnects: • Enhanced Thermal Management • Minimum Die Size Effective Base Ballasting for Maximum Gain 150 mm Wafers High-Q Passives NiCr Thin Film Resistors High Value Capacitors Backside Vias Optional Validated Models and Design Support Applications • • • • • • Power Amplifiers Driver Amplifiers Wideband, General Purpose Amplifiers Gilbert Cell Mixers VCOs Single Supply and Easy Biasing TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Semiconductors for Communications www.triquint.com Page 1 of 5; Rev 2.1 8/10/02 Phone: 503-615-9000 Fax: 503-615-8905 Email: info@triquint.com Production Process InGaP HBT Foundry Service TQHBT TQHBT Process Details TQHBT Process Details Element HBT Transistor Parameter Emitter Periphery For Standard Cells (Coming Soon:) Vbe Beta Ft Fmax BVcbo BVebo BVceo Interconnect MIM Caps Inductors Resistors Vias Mask Layers Metal Layers Value Q @ 2 GHz NiCr Yes No Vias With Vias 15 17 Value 3 @ 3 x 45 1 @ 3 x 45 3 @ 2 x 45 1.25 75 28 46 21 7 12 3 1200 >20 50 pF/mm2 GHz GHz V V V Units µm µm µm V Maximum Ratings HBT Storage Temperature Range HBT Operating Junction Temperature Range Junction Current Denstity Capacitor -65 to +150 -55 to +150 20 10 Deg C Deg C kA/cm^2 V TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Semiconductors for Communications www.triquint.com Page 2 of 5; Rev 2.1 8/10/02 Phone: 503-615-9000 Fax: 503-615-8905 Email: info@triquint.com Production Process InGaP HBT Foundry Service Three Finger 3x45 µ HBT Gummel Plot TQHBT Three Finger 3x45 µ HBT I-V Characteristics S im u la t e d v s M e a s u r e d IV c u r v e s 4 .5 0 E - 0 2 4 .0 0 E - 0 2 3 .5 0 E - 0 2 s im u la te d Ib = 1 0 u A m e a s u r e d Ib = 1 0 u A s im u la te d Ib = 6 0 u A m e a s u r e d IB = 6 0 u A s im u la te d Ib = 1 1 0 u A m e a s u r e d Ib = 1 1 0 u A 3 .0 0 E - 0 2 2 .5 0 E - 0 2 Ic (A) s im u la te d Ib = 1 6 0 u A m e a s u r e d Ib = 1 6 0 u A s im u la te d Ib = 2 1 0 u A 2 .0 0 E - 0 2 m e a s u r e d Ib = 2 1 0 u A s im u la te d Ib = 2 6 0 u A m e a s u r e d Ib = 2 6 0 u A s im u la te d Ib = 3 1 0 u A m e a s u r e d Ib = 3 1 0 u A s im u la te d Ib = 3 6 0 u A m e a s u r e d Ib = 3 6 0 u A s im u la te d Ib = 4 1 0 u A 1 .5 0 E - 0 2 1 .0 0 E - 0 2 5 .0 0 E - 0 3 m e a s u r e d Ib = 4 1 0 u A s im u la te d Ib = 4 6 0 u A m e a s u r e d Ib = 4 6 0 u A 0 .0 0 E + 0 0 0 .0 - 5 .0 0 E - 0 3 V c e (V ) 0 .5 1 .0 1 .5 2 .0 2 .5 3 .0 3 .5 4 .0 4 .5 TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Semiconductors for Communications www.triquint.com Page 3 of 5; Rev 2.1 8/10/02 Phone: 503-615-9000 Fax: 503-615-8905 Email: info@triquint.com Production Process InGaP HBT Foundry Service 25 Ft and Gmax vs IC VCE ~ 2.5V TQHBT 20 70 60 50 Ft (GHz) 40 30 20 10 0 0 10 20 30 40 50 Ft Gmax 30 25 2.0 GHz Gmax (dB) 20 P u [d m ot B ] 15 10 15 10 5 SBC 50 Ω Data LP Data _V3 Sim 5 0 0 -5 -5 -20 -15 -10 -5 Pin [dBm] 0 5 Collector Current (mA) (Emitter Area = 405 um^2) Ft and Gmax versus Collector Current Compression- Modeled vs Measured 70 60 50 PAE [% ] 40 30 20 SBC 50 Ω Data LP Data _V3 Sim B eta vs temperature 74 72 70 Beta 68 Beta 66 64 10 62 Beta versus Junction Temperature C 25 Vbe versus temperature 1.18 1.16 1.14 1.12 C 45 C 65 C 85 0 -20 -15 -10 -5 Pin [dBm] 0 5 Temperature Efficiency– Modeled vs. Measured Vbe 1.1 1.08 1.06 1.04 1.02 1 Vbe Vbe versus Junction Temperature TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 C 25 C 45 C 65 C 85 Temperature Semiconductors for Communications www.triquint.com Page 4 of 5; Rev 2.1 8/10/02 Phone: 503-615-9000 Fax: 503-615-8905 Email: info@triquint.com Production Process InGaP HBT Foundry Service Prototyping and Development Process Qualification Status TQHBT • • Prototype Development QuickTurn (PDQ): • Shared Mask Set; • Run Monthly • Hot Lot Cycle Time • Via and Non-Via Options Prototype Wafer Option (PWO): • Customer-specific Masks, Customer Schedule • 2 wafers delivered • Hot Lot Cycle Time • With thinning and sawing; optional backside vias • • • • • Mature Process based on 10 GHz, 8V Vdd Process for Military Phased-Array Radar Applications. Over 10 Years of Reliability Data Collected. Process Qualification Program complete. 150mm Wafer Conversion Qualification underway. For more information on Quality & Reliability, contact TriQuint or visit: www.triquint.com/manufacturing/QR/ • • • • • • • Design Manual Device Library of Circuit Elements: Transistors, Diodes, Thin Film Resistors, Capacitors, Inductors Parameters for Gummel-Poon Model • Agilent ADS Now • MWO and PSPICE Now Process Corner Models Planned Layout Files Available for: • Cadence, MWO, & ICED Now Layout Rule Sets for Design Rule & Layout versus Schematic Check Now Qualified Package Models for Supported Package Styles Design Tool Status • • • • • • • • • Tiling of GDSII Stream Files including PCM Design Rule Check Services Layout versus Schematic Check Services Packaging Development Engineering Test Development Engineering: • On-Wafer • Packaged Parts Thermal Analysis Engineering Yield Enhancement Engineering Part Qualification Services Failure Analysis Applications Support Services • • GaAs Design Classes: • Half Day Introduction; Upon Request • Four Day Technical Training; Fall & Spring at TriQuint Oregon facility For Training & PDQ Schedules please visit: www.triquint.com/foundry/ Training • • • • • • • • • Mask Making Pre-Production 100 & 150 mm Wafer Fab Wafer Thinning Wafer Sawing Substrate Vias DC Die Sort Testing RF On-Wafer Testing Plastic Packaging RF Packaged Part Testing Manufacturing Services Please contact your local TriQuint Semiconductor Representative/ Distributor or Foundry Services Division Marketing for Additional information: E-mail: sales@triquint.com Phone: (503) 615-9316 Fax: (503) 615-8905 TriQuint Semiconductor 2300 NE Brookwood Pkwy Hillsboro, Oregon 97124 Semiconductors for Communications www.triquint.com Page 5 of 5; Rev 2.1 8/10/02 Phone: 503-615-9000 Fax: 503-615-8905 Email: info@triquint.com