TS339CD14C4

TS339 Low Power Low Offset Quad Comparators DIP-14 SOP-14 Pin Definition: 1. Output 2 14. Output 3 2. Output 1 13. Output 4 3. Vcc 12. Gnd 4. Input 1 (-) 11. Input 4 (+) 5. Input 1 (+) 10. Input 4 (-) 6. Input 2 (-) 9. Input 3 (+) 7. Input 2 (+) 8. Input 3 (-) General Description The TS339 is quad independent precision voltage comparators capable of single-supply or split-supply operation. The specifications as low as 2.0 mV make this device an excellent ground level with single-supply operation. Input offsetvoltage selection for many applications in consumer automotive, and It is designed to permit a common mode rangeto- industrial electronics. Features ● ● ● ● ● ● Low input bias current: 25nA (Typ) Low input offset current: ±5nA (Typ) Low input offset voltage Input common mode voltage range to GND Low output saturation voltage: 130mV (Typ) TTL and CMOS compatible Block Diagram Ordering Information Part No. TS339CD14 C4 TS339CS14 RL Package DIP-14 SOP-14 Packing 50pcs / Tube 2.5Kpcs / 13” Reel Absolute Maximum Rating Parameter Supply Voltage Differential Input Voltage Input Common Mode Voltage Range Input Current Output Short Circuit Duration (note 1) Operating Temperature Range Junction Temperature Storage Temperature Range Symbol VCC VIDR VICR IIN tsc TOPR TJ TSTG Limit +36 or ±18 36 -0.3 to 36 50 Continuous 0 ~ +70 +150 -65 ~ +150 Unit V V V mA o o o C C C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. Note 1. The maximum output current may be as high as 20mA, independent of the magnitude of VCC Output short circuits to VCC can cause excessive heating and eventual destruction 1/7 Version: A09 TS339 Low Power Low Offset Quad Comparators Electrical Characteristics (VCC = 5V, Ta=25oC; unless otherwise specified.) Characteristics Input Offset Voltage (note 2) Input Offset Current (note 2) Input Bias Current (note 2, 3) (Output in linear range) Input Common-Mode Voltage Range (note 4) Voltage Gain RL≥15K, VCC=15V Large Signal Response Time Vin = TTL Logic Swing. Vref = 1.4V, VRL = 5V. RL= 5.1KΩ Response Time (note 4) VRL = 5V. RL= 5.1KΩ Output Sink Current Saturation Voltage VI(+)≥+1V, VI(-)=0, Vo=+5V Output Leakage Current VID=+1.0V,VCC=15V Supply Current RL = ∞ (For All Comparators) RL = ∞, VCC = 30V ICC --0.8 1.0 2.0 2.5 mA -ISINK VSAT IOL -6.0 --1.3 16 130 0.1 --400 -uS mA mV nA --300 -nS Symbol VIO IIO IIB VICR AVOL Min. --- Typ. ±2.0 ±5.0 25 Max. ±5.0 ±50 250 Vcc-1.5 -- Unit mV nA nA V V/mV 0 50 -200 Notes: 1. TS339: TLOW=0ºC, Thigh=+70ºC 2. At the output switch point, VO=1.4Vdc, RS ≤100Ω, 5.0Vdc≤ VCC ≤30Vdc, with the inputs over the full common-mode range (0Vdc to VCC -1.5Vdc). 3. The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state. 4. The response time specified is for a 100mV input step with 5mV overdrive For larger signals, 300ns is typical. 5. Positive excursions of input voltage may exceed the power supply level. As long as one of the inputs remain within the common-mode range, the comparator will provide the proper output state. 6. The comparator will inhibit proper output state if one of the inputs is become greater than VCC, the other input must remain within the common mode range. The low input state must not be less than -0.3volts of ground of minus supply. 2/7 Version: A09 TS339 Low Power Low Offset Quad Comparators Electrical Characteristics Curve Figure 1. Normalized Input Offset Voltage Figure 2. Input Bias Current Figure 3. Output Sink Current vs. Out Saturation Voltage 3/7 Version: A09 TS339 Low Power Low Offset Quad Comparators Application Description This quad comparator feature high gain, wide bandwidth characteristics. This gives the device oscillation tendencies if the outputs are capacitive coupled to the inputs via stray capacitance. This oscillation manifests itself during output transitions (VOL to VOH). To alleviate this situation input resistors