TSM1N60SCTB0

TSM1N60S N-Channel Power Enhancement Mode MOSFET Pin assignment: 1. Gate 2. Drain 3. Source VDS = 600V ID = 0.3A RDS (on), Vgs @ 10V, Ids @ 0.3A = 11Ω General Description The TSM1N60s is used an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced MOSFET is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain- to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies and converters, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and safety margin against unexpected voltage transients. Features Robust high voltage termination Avalanche energy specified Diode is characterized for use in bridge circuits Source to Drain diode recovery time comparable to a discrete fast recovery diode. IDSS and VDS(on) specified at elevated temperature Block Diagram Ordering Information Part No. TSM1N60SCT B0 TSM1N60SCT A3 Packing Bulk Pack Ammo Pack Package TO-92 TO-92 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Maximum Power Dissipation Operating Junction Temperature Operating Junction and Storage Temperature Range Single Pulse Drain to Source Avalanche Energy (VDD = 50V, VGS=10V, IAS=0.3A, L=115mH) Ta = 25 oC o Ta > 25 C Symbol VDS VGS ID IDM PD TJ TJ, TSTG EAS Limit 600V ± 30 0.3 1.2 3 0.025 +150 - 55 to +150 50 Unit V V A A W o W/ C o o C C mJ Thermal Performance Parameter Lead Temperature (1/8” from case) Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t