4051

UNISONIC TECHNOLOGIES CO., LTD 4051 8-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SOP-16 CMOS IC DESCRIPTION UTC 4051 is single 8-channel analog multiplexers/demultiplexers for application as digitally–controlled analog switches. The device has three binary control inputs and an inhibit input. It feature low ON impedance and very low OFF leakage current. Control of analog signals up to the complete supply voltage range can be achieved. DIP-16 FEATURES * Wide analog voltage range: VDD–VEE = 3V~18V. (Note: VEE must be≦VSS) * Break-Before-Make switching eliminates channel overlap. * Linearized transfer characteristics * Implement an SP8T solid state switch effectively. * Pin–to–Pin Replacement for CD4051 TSSOP-16 *Pb-free plating product number: 4051L ORDERING INFORMATION Ordering Number Normal Lead Free Plating 4051-D16-T 4051L-D16-T 4051-P16-R 4051L-P16-R 4051-P16-T 4051L-P16-T 4051-S16-R 4051L-S16-R 4051-S16-T 4051L-S16-T Package DIP-16 TSSOP-16 TSSOP-16 SOP-16 SOP-16 Packing Tube Tape Reel Tube Tape Reel Tube 4051L-D16-T (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) D16: DIP-16, P16: TSSOP-16, S16: SOP-16 (3) L: Lead Free Plating, Blank: Pb/Sn www.unisonic.com.tw Copyright © 2007 Unisonic Technologies Co., Ltd 1 of 7 QW-R502-054.B 4051 PIN CONFIGURATION CMOS IC PIN DESCRIPTION PIN No. 3 6 7 8 11,10,9 13,14,15,12,1,5,2,4 16 SYMBAL X INH VEE VSS A,B,C X0~X7 VDD I/O I/O I FUNCTIONS Common input/output Inhibit inputs Supply voltage Ground Binary control inputs Independent inputs/outputs Positive supply voltage I I/O UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 7 QW-R502-054.B 4051 ABSOLUTE MAXIMUM RATINGS PARAMETER DC Supply Voltage (Referenced to VEE, VSS≧VEE) Input or Output Voltage (DC or Transient) (Referenced to VSS for Control Inputs and VEE for Switch I/O) Input Current (DC or Transient), Per Control Pin Switch Through Current Power Dissipation Derating above 65℃ SYMBOL VDD VIN, VOUT IIN ISW RATINGS -0.5 ~ +18 -0.5 ~ VDD +0.5 CMOS IC UNIT V V ±10 mA ±25 mA 500 mW PD 7 mW/℃ Junction Temperature TJ +125 ℃ Operating Temperature TOPR -40 ~ +125 ℃ Storage Temperature TSTG -40 ~ +150 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (Ta=25℃, unless otherwise specified.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX SUPPLY REQUIREMENTS (Voltages Referenced to VEE) VDD – 3.0≧VSS≧VEE 3 18 Power Supply Voltage Range VDD VDD=5V 0.005 5 Control Inputs: VIN = VSS or VDD Quiescent Current Per Switch I/O: VEE ≦VI/O ≦VDD, IQ VDD=10V 0.010 10 Package and ∆Vsw≦500mV(Note 2) 0.015 20 VDD=15V Ta=25℃ only (The channel VDD=5V (0.07 µA/kHz) f + IQ Total Supply Current (Dynamic Plus Quiescent, VDD=10V ID(AV) component, (VIN-VOUT)/RON, is (0.20 µA/kHz) f + IQ not included.) Per Package) VDD=15V (0.36 µA/kHz) f + IQ SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE) Recommended Peak–to–Peak VI/O Channel On or Off 0 VDD Voltage Into or Out of the Switch Recommended Static or Dynamic ∆Vsw Channel On 0 600 Voltage Across the Switch Output Offset Voltage VO(OFF) VIN = 0V, No Load 10 ∆Vsw≦500mV VDD=5V 250 1050 ON Resistance VIN = VIL or VIH (Control), and RON VDD=10V 120 500 VIN = 0 to VDD (Switch) VDD=15V 80 280 ΔON Resistance Between VDD=5V 25 70 ∆RON Any Two Channels in the VDD=10V 10 50 Same Package 10 45 VDD=15V VIN = VIL or VIH (Control) Off-Channel Leakage Current ±0.05 ±100 IOFF Channel to Channel or Any One Channel, VDD=15V Capacitance, Switch I/O CI/O Inhibit = VDD 10 Capacitance, Common O/I CO/I Inhibit = VDD 17 Pins Not Adjacent 0.15 Capacitance, Feedthrough CI/O Pins Adjacent 0.47 (Channel Off) UNIT V µA µA VPP mV µV Ω Ω nA pF pF pF UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 7 QW-R502-054.B 4051 ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDITIONS CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS) VDD=5V Low Level Input Voltage VIL RON= per spec, IOFF = per spec VDD=10V VDD=15V VDD=5V High Level Input Voltage VIH RON= per spec, IOFF = per spec VDD=10V VDD=15V Input Leakage Current ILEAK VIN= 0 or VDD, VDD=15V Input Capacitance CIN MIN TYP 2.25 4.50 4.0 2.75 5.5 8.25 ±0.00001 5.0 CMOS IC MAX 1.5 3.0 UNIT V 6.75 3.5 7 11 V ±0.1 7.5 µA pF DYNAMIC ELECTRICAL CHARACTERISTICS (CL = 50pF, Ta=25℃, VEE≦VSS, unless otherwise specified) PARAMETER Propagation Delay Times Switch Input to Switch Output (RL = 10 kΩ) Inhibit to Output SYMBOL tPLH, tPHL tPHZ, tPLZ tPZH, tPZL tPLH, tPHL THD VDD–VEE Vdc 5 10 15 5 10 15 5 10 15 10 TEST CONDITIONS tPLH, tPHL =(0.17 ns/pF)CL + 26.5ns tPLH, tPHL =(0.08 ns/pF)CL + 11ns tPLH, tPHL =(0.06 ns/pF)CL + 9ns (RL=10kΩ, VEE=VSS) Output “1” or “0” to High Impedance, or High Impedance to “1” or “0” Level RL = 10 kΩ, VEE = VSS MIN TYP 35 15 12 350 170 140 360 160 120 0.07 MAX 90 40 30 700 340 280 720 320 240 UNIT ns ns Control Input to Output Total Harmonic Distortion ns RL = 10KΩ, f = 1 kHz, Vin = 5 VPP % RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p, Bandwidth BW 10 17 MHz CL = 50pF, 20 Log (VOUT/VIN) = -3dB) RL=1KΩ, VIN = 1/2 (VDD–VEE) p–p Off Channel Feedthrough 10 -50 dB Attenuation fIN = 4.5 MHz RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p Channel Separation 10 -50 dB fIN = 3MHz Crosstalk, Control Input to R1 = 1kΩ, RL = 10kΩ Control 10 75 mV Common O/I tTLH = tTHL = 20ns, Inhibit = VSS Note 1. Data of “TYP” is intended as an indication of the IC’s potential performance. 2. For voltage drops across the switch(∆Vsw)>600mV (>300mV at high temperature), excessive VDD current may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 7 QW-R502-054.B 4051 ESD PROTECTION CIRCUIT CMOS IC UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 7 QW-R502-054.B 4051 SWITCH CIRCUIT SCHEMATIC CMOS IC VDD IN/OUT VDD VDD OUT/IN VEE VDD LEVEL CONVERTED CONTROL IN/OUT OUT/IN VEE CONTROL TRUTH TABLE FUNCTIONAL DIAGRAM 16 VDD BINARY TO 1 - OF - 8 DECODER WITH INHIBIT INH 6 A 11 B 10 C9 Control Inputs INHIBIT C B 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 x A 0 1 0 1 0 1 0 1 x ON Switches X0 X1 X2 X3 X4 X5 X6 X7 None LEVEL CONVERTER 8 VSS 7 VEE X0 13 X1 14 X2 15 X3 12 X4 1 X5 5 X6 2 X7 4 3X 1 x x = Don’t Care UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 7 QW-R502-054.B 4051 TYPICAL CHARACTERISTICS CMOS IC 350 VDD = 2.5 V 300 VEE = - 2.5 V Ta =25℃ 250 200 150 100 50 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10 Input Voltage, VIN (V) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw " ON " Resistance, RON (Ω) "ON " Resistance, RON (Ω) 7 of 7 QW-R502-054.B