M1725

UNISONIC TECHNOLOGIES CO., LTD M1725 16-BIT,96KHZ STEREO AUDIO D/A CONVERTER DESCRIPTION The UTC M1725 is a complete stereo digital-to-analog output system including a 16-bit D/A conversion, a 5-level 3rd-order ∆Σ modulator, a digital interpolation filter, and an analog output amplifier in a small 14-pin package. The UTC M1725 can be operating with from a single 5V power supply and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players and A/V receivers, etc. CMOS IC FEATURES * Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering * 16-Bit Conversion * 95dB Dynamic Range * Single +5V Power Supply * 16kHz to 96kHz Multiple Sampling Frequencies * 8X Oversampling Digital Filter * 256 fS /384 fS System Clock * Normal or I2S Data Input Formats SOP-14 ORDERING INFORMATION Ordering Number M1725G-S14-R Package SOP-14 Packing Tape Reel www.unisonic.com.tw Copyright © 2010 Unisonic Technologies Co., Ltd 1 of 10 QW-R502-427.A M1725 PIN CONFIGURATIONS LRCIN DIN BCKIN NC CAP VOUTR GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SCKI FORMAT DM NC NC VOUTL VCC CMOS IC PIN DESCRIPTION PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 PIN NAME LRCIN DIN BCKIN NC CAP VOUTR GND VCC VOUTL NC NC DM PIN TYPE I I I -I/O O I/O I/O O --I PIN DESCRIPTION Left/Right Clock Input Serial Audio Data Input Bit Clock Input for Audio Data No Connection Common Pin of Analog Output Amp Right-Channel Analog Output Ground Power Supply Left-Channel Analog Output No Connection No Connection De-emphasis Control High: De-emphasis OFF Low: De-emphasis ON(44.1kHz) Audio Data Format Select High: I2S Data Format Low: Standard Data Format System Clock Input (256 fS or 384 fS) 13 14 FORMAT SCKI I I UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 10 QW-R502-427.A M1725 BLOCK DIAGRAM SCKI VCC GND CMOS IC 256fS/384fS Power Supply BCKIN LRCIN DIN DM Deemphasis Normal or I2S Data Input Format Serial Input Interface 8X Oversampling Digital Filter 5-Level 3rd-order ∆Σ Modulator DAC Analog Low-Pass Filter VOUTL CAP FORMAT 5-Level 3rd-order ∆Σ Modulator DAC Analog Low-Pass Filter VOUTR UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 10 QW-R502-427.A M1725 ABSOLUTE MAXIMUM RATING (Ta=25°C, unless otherwise specified) CMOS IC PARAMETER SYMBOL RATINGS UNIT Power Supply Voltage VCC +6.5 V + VCC to+ VDD Difference VD ±0.1 V Input Logic Voltage VLGC -0.3V to (VDD +0.3V) W Power Dissipation PD 300 mW Operating Temperature Range TOPR -25 ~ +85 °C Storage Temperature TSTG -55 ~ +125 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS PARAMETER Power Supply Voltage Junction Temperature Storage Temperature SYMBOL VCC TJ TSTG SYMBOL θJA RATINGS 4.5 ~ 5.5 -25 ~ +85 -55 ~ +100 RATINGS 70 UNIT V °C °C UNIT °C/W THERMAL DATA PARAMETER Junction to Ambient ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=+5V, fS=44.1kHz, CAP=10uF, 16-Bit Input Data, SCKI=384 fS, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DATA FORMAT Data Bit Length 16 Bits Input sample Rate fS 16 96 kHz Internal System Clock Frequency SCKI 256/384 fS DIGITAL INPUT/OUTPUT Logic Level TTL VIH 2 V Input Logic Level (Note1) VIL 0.8 V Input Logic Current (Note1) IIN ±0.8 uA DYNAMIC PERFORMANCE (Note2) THD+N at FS (0dB) f=991kHz -83 -78 dB THD+N at -60dB f=991kHz -32 dB Dynamic Range DR f=991kHz,A-weighted 90 95 dB Signal-to-Noise Ratio SNR f=991kHz,A-weighted 90 97 dB Channel Separation CS f=991kHz 88 95 dB DC ACCURACY Gain Arror ±1.0 ±5.0 % of FSR Gain Mis-match(Channel-to-Channel) ±1.0 ±5.0 % of FSR Bipolar Zero Error BZE VOUT=VCC/2 at BPZ ±20 ±50 mV ANALOG OUTPUT Output Voltage VO Full Scale(0dB) VP-P 0.62*VCC Center Voltage VC VCC/2 V Load Impedance RL AC Load 10 kΩ Note: 1. Pins 1, 2, 3, 12, 13: LRCIN, DIN, BCKIN, DM, FORMAT (Schmitt Trigger Input); Pin 14: SCKI. 2. Dynamic performance specs are tested with 20kHz low pass filter and THD+N specs are tested with 30kHz LPF, 400Hz HPF, Average-Mode. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 10 QW-R502-427.A M1725 ELECTRICAL CHARACTERISTICS (Cont.) PARAMETER DIGITAL FILTER PERFORMANCE Passband Stopband Passband Ripple Stopband Attenuation Delay Time INTERNAL ANALOG FILTER -3dB Bandwidth Passband Response POWER SUPPLY REQUIREMENTS Voltage Range Supply Current Power Dissipation SYMBOL TEST CONDITIONS MIN TYP CMOS IC MAX 0.445 UNIT fS fS dB dB Sec kHz dB 0.555 ±0.17 -35 TD 11.125/ fS f=20kHz VCC IQ PD 4.5 100 -0.16 5 13 65 5.5 18 90 V mA mW UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 10 QW-R502-427.A M1725 TYPICAL APPLICATIONS CIRCUIT CMOS IC UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 10 QW-R502-427.A M1725 TIMING DIAGRAMS CMOS IC LRCKIN 1.4V tBCKH BCKIN tBCKL tCY tBL tLB 1.4V DIN 1.4V tDH tDS tCY tBCKH tBCKL tBL tLB tDS tDH BCKIN Pulse Cycle Time BCKIN Pulse Width High BCKIN Pulse Width Low BCKIN Rising Edge to LRCIN Edge LRCIN Edge to BCKIN Rising Edge DIN Set Up Time DIN Hold Time Figure 1.Audio Data Input Timing ≥100ns ≥50ns ≥50ns ≥30ns ≥30ns ≥30ns ≥30ns Figure 2.Normal Data Input Timing UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 10 QW-R502-427.A M1725 TIMING DIAGRAMS (Cont.) 1/fS LRCIN LEFT RIGHT CMOS IC BCKIN 15 14 13 DIN MSB 2 1 0 LSB 15 14 13 MSB 2 1 0 LSB 15 14 2 Figure 3. I S Data Input Timing tSCKIH 2.0V SCKI 0.8V tSCKIL tSCKIH tSCKIL System Clock Pulse Width High System Clock Pulse Width Low Figure 4. System Clock Timing ≥13ns ≥13ns UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 10 QW-R502-427.A M1725 FUNCTIONAL DESCRIPTION CMOS IC SYSTEM CLOCK The system clock (SCKI) must be either 256 fS or 384 fS, where fS is the audio sampling frequency (LRCIN),typically 32kHz, 44.1kHz or 48kHz. The system clock is used to operate the digital filter and the noise shaper. Timing conditions for SCKI are shown in Figure4. M1725 includes a system clock detection circuit which auto-matically detects the frequency, either 256 fS or 384 fS. The system clock should be synchronized with LRCIN,but M1725 can compensate for phase differences. If the phase difference between LRCIN and system clock is greater than ±6 bit clocks (BCKIN), the synchronization is performed automatically. The analog outputs are forced to a bipolar zero state (VCC/2) during the synchronization function. The typical system clock frequency inputs vs sampling rate for the M1725 is shown below. SAMPLING RATE(LRCIN)(kHz) 32 44.1 48 SYSTEM CLOCK FREQUENCY(MHz) 256 fS 384 fS 8.192 12.288 11.2896 16.934 12.288 18.432 INPUT DATA FORMAT M1725 can accept input data in either normal (MSB-first, right-justified) or I2S format by applying LOW or HIGH voltage level on FORMAT-pin. FORMAT Low High DE-EMPHASIS CONTROL DM-pin enables M1725’s de-emphasis function. De-emphasis operates only at 44.1kHz. DM DE-EMPHASIS FUNCTION SELECTED Low De-emphasis ON (44.1kHz) High De-emphasis OFF RESET M1725 includes an internal power-on reset circuit. The power-on reset initializes and has an initialization period equal to 1024 system clock periods after VCC>2.2V. During the initialization period, the DAC outputs are invalid, and the analog outputs are forced to VCC/2. INPUT DATA FORMAT SELECTED Normal Format (MSB-first, right-justified) I2S Format (Philips serial data protocol) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 10 QW-R502-427.A M1725 CMOS IC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 10 of 10 QW-R502-427.A