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1588

1588

  • 厂商:

    VECTRON

  • 封装:

  • 描述:

    1588 - Enhanced Clock Stability for the 1588 enabled network. - Vectron International, Inc

  • 数据手册
  • 价格&库存
1588 数据手册
Helping Customers Innovate, Improve & Grow FACT SHEET 1588 Optimized Oscillators Enhanced Clock Stability for the 1588 enabled network. In Packet based timing, the prediction, monitoring and management of Packet Delay Variation (PDV) is complex, challenging, potentially costly and still open to random ‘network noise’ events. Placing a predictable, stable and cost effective local clock at the client node can greatly improve the odds in dealing with network noise – increased client robustness allows a timing to be deployed across larger and less managed networks, reducing the overall cost of a timing solution. Industry Need • An all IP/Ethernet network to increase bandwidth while reducing costs. The Challenge • • • • Communications applications require synchronization. Delivering synchronization over IP networks is a challenge. PTP (Precision Timing Protocol, or IEEE-1588-2008) is a promising approach to this. Traditional oscillator performance limits the effectiveness of PTP. The Solution • • Oscillators optimized for performance in PTP applications. The only oscillators specifically designed and tested for use in PTP clock applications. Page 1 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com FACT SHEET 1588 derived frequency reference challenges. Packet based timing technologies work on the two way exchange of timing information between a Master Clock and Slave (or Client) Clock. The 1588 protocol works on the assumption that this two way exchange is symmetric (i.e. it expects that the Packet Delay from Master to Slave and Slave to Master is the same). However, in the majority of wide area networks this is not the case and the phenomena of Packet Delay Variation (PDV) introduces noise into the Client clock. Without severely limiting the scale of the network or introducing complex management schemes, deriving accurate frequency and phase information from the packet network is a challenge. Timing Requirements Application CDMA2000 (3GPP2 C.S0010-B, 3GPP2 C.S0002-C) W-CDMA (TDD mode) (3GPP TS 25.402) TD-SCDMA (TDD mode) (3GPP TR 25.836) LTE (TDD) (3GPP TS 36.133) MBSFN (e.g. over LTE) WiMAX (TDD mode) (IEEE 802.16) 1588 Timing Solutions There are a number of approaches described in the 1588 protocol that can be taken to delivering timing over a packet network. In broad terms these approached can be divided into the Ordinary Clock approach and the Transparent Clock approach. Ordinary Clock approach: In the Ordinary Clock approach the timing information is sent from the Master clock to the Slave clock without adjustment being made to the time stamp information by intervening nodes – routers in the path between the master and slave do not tell the slave anything about their behavior. The advantage of this approach is that the disruption to the existing network is minimal and service providers can deploy 1588 over an existing network – A possible disadvantage is that the Slave needs to be robust in the presence of PDV. Transparent Clock approach: In the Transparent Clock approach the timing information is updated as it travels from the master to the slave – routers in the path between the master and slave can make adjustments to the packet to tell the slave about their behavior. The advantage of the Transparent Clock is that the deployment can self-correct network disruptions far more easily – a disadvantage is that service providers are faced with the possibility of expensive ‘forklift upgrades’ of existing networks. Time/Phase synchronization accuracy +/- 3μs with respect to UTC* (during normal conditions) +/- 10μs of UTC (when the time sync reference is disconnected) 2.5μs phase difference between Base Stations 3μs phase difference between Base Stations 3μs time diffference between Base Stations (small cell). 10μs time difference between Base Stations (large cell) < +/- 1μs with respect to a common time reference (continuous timescale) Depends on several parameters. Ranges from +/-0.5μs to +/-5μs *See definitions at end of document Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page 2 FACT SHEET Vectron Oscillators for 1588 Vectron matches the stability characteristics of its oscillators with the requirements of 1588 client clocks – this is done by design, but also through a system level verification of the oscillators’ suitability in the target application. Choosing oscillators for 1588 applications is in many ways similar to selecting devices to support SONET/SDH ‘stratum’ level applications. However the role of PDV and any corresponding packet filtering used in a Packet Equipment Clock (PEC) needs to be considered also, since the system loop filter bandwidth is not necessarily pre-defined in the same way as SONET/SDH. Vectron Oscillators optimized for 1588 Parameter Frequencies Package Holdover Stability Drift Wander Generation MTIE 1s 10s 100s 1000s Wander Generation TDEV 1s 10s 100s 1000s 1 1 OX-402 10MHz, 12.8MHz, 20MHz 13 x 20mm Through-hole

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2SK1588
  •  国内价格
  • 1+1.2208
  • 10+1.1445
  • 50+1.03005
  • 150+0.95375
  • 300+0.90034
  • 500+0.87745

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