B048F080M24A

Not Recommended for New Designs BCM® Bus Converter B048x080y24A S C NRTL US Unregulated DC-DC Converter FEATURES DESCRIPTION The VI Chip® bus converter is a high efficiency (>95%) Sine Amplitude Converter™ (SAC™) operating from a 38 to 55 Vdc primary bus to deliver an isolated, unregulated 6.3 to 9.2 output. The Sine Amplitude Converter offers a low AC impedance beyond the bandwidth of most downstream regulators; therefore capacitance normally at the load can be located at the input to the Sine Amplitude Converter. Since the transformation ratio of the B048x080y24A is 1/6, the capacitance value can be reduced by a factor of 36x, resulting in savings of board area, materials and total system cost. The B048x080y24A is provided in a VI Chip package compatible with standard pick-and-place and surface mount assembly processes. The co-molded VI Chip package provides enhanced thermal management due to a large thermal interface area and superior thermal conductivity. The high conversion efficiency of the B048x080y24A increases overall system efficiency and lowers operating costs compared to conventional approaches. • 48 Vdc – 8 Vdc 240 W Bus Converter • High efficiency (>95%) reduces system power consumption • High power density (>817 W/in3) reduces power system footprint by >40% • Contains built-in protection features: - Undervoltage Overvoltage Lockout Overcurrent Protection Short circuit Protection Overtemperature Protection • Provides enable/disable control, internal temperature monitoring • Can be paralleled to create multi-kW arrays TYPICAL APPLICATIONS PART NUMBERING • High End Computing Systems • Automated Test Equipment • High Density Power Supplies • Communications Systems PART NUMBER B048 x 080 y 24A PACKAGE STYLE F = J-Lead T = Through hole L O A D PC TM SW1 T = -40° to 125°C M = -55° to 125°C For Storage and Operating Temperatures see Section 6.0 General Characteristics TYPICAL APPLICATION enable / disable switch PRODUCT GRADE BCM® Bus Converter F1 +In +Out -In -Out VIN BCM® Bus Converter Rev 1.1 vicorpower.com Page 1 of 18 08/2014 800 927.9474 B048x080y24A Not Recommended for New Designs 1.0 ABSOLUTE MAXIMUM RATINGS The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. MIN MAX +IN to –IN . . . . . . . . . . . . . . . . . . . . . . . -1 60 V VIN slew rate (operational) . . . . . . . . . -1 1 V/µs V Isolation voltage, input to output . . . . 2250 +OUT to –OUT . . . . . . . . . . . . . . . . . . . -1 16 UNIT V Output current transient (< = 10 ms, < = 10% DC) . . . . . . . . . . . . MIN MAX UNIT -3 45 A Output current average . . . . . . . . . . . . -2 36 A PC to –IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3 20 V TM to –IN . . . . . . . . . . . . . . . . . . . . . . . -0.3 7 V 2.0 ELECTRICAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TC < 125°C (T-Grade); All other specifications are at TC = 25ºC unless otherwise noted. ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT 38 55 V 38 55 V 1.9 2.8 mA 500 650 ms POWERTRAIN Input voltage range, continuous Input voltage range, transient Quiescent current VIN to VOUT time VIN_DC VIN_TRANS IQ TON1 Full current or power supported, 50 ms max, 10% duty cycle max Disabled, PC Low VIN = 48 V, PC floating 350 VIN = 48 V, TC = 25ºC No load power dissipation PNL 4.0 VIN = 48 V 3.0 VIN = 38 V to 55 V, TC = 25ºC 7.0 VIN = 38 V to 55 V 11.0 Inrush current peak IINR_P Worse case of: VIN = 55 V, COUT = 2300 µF, RLOAD = 215 mΩ DC input current IIN_DC At POUT = 240 W Transformation ratio Output power (average) K POUT_PK Output current (average) IOUT_AVG Output current (peak) Efficiency (ambient) Efficiency (hot) Efficiency (over load range) Output resistance Switching frequency IOUT_PK hAMB hHOT h20% 20 0 K = VOUT / VIN, at no load 1/6 W A A V/V 240 W 10 ms max, POUT_AVG ≤ 240 W 360 W 36 A 10 ms max, IOUT_AVG ≤ 36 A 45 A VIN = 48 V, IOUT = 30 A; Tc = 25°C 94.2 VIN = 38 V to 55 V, IOUT = 30 A; Tc = 25°C 92.0 95.4 VIN = 48 V, IOUT = 15 A; Tc = 25°C 94.0 95.3 VIN = 48 V, IOUT = 30 A; Tc = 125°C 94.8 95.2 % % 6 A < IOUT < 30 A 91.0 ROUT_COLD IOUT = 30 A, Tc = -40°C 3.0 5.6 8.0 mΩ ROUT_AMB IOUT = 30 A, Tc = 25°C 5.0 7.4 10.0 mΩ ROUT_HOT IOUT = 30 A, TC = 125°C 5.0 8.2 12.0 mΩ 1.49 1.52 1.57 MHz 160 230 mV FSW Output voltage ripple VOUT_PP Output inductance (parasitic) LOUT_PAR Output capacitance (internal) COUT_INT COUT_EXT Output capacitance (external) 13.3 POUT_AVG Output power (peak) 5.5 10.0 COUT = 0 F, IOUT = 30 A, VIN = 48 V, 20 MHz BW, Section 10 Frequency up to 30 MHz, Simulated J-lead model % 600 Effective value at 8 VOUT pH 45 0 BCM® Bus Converter Rev 1.1 vicorpower.com Page 2 of 18 08/2014 800 927.9474 µF 2300 µF B048x080y24A Not Recommended for New Designs 2.0 ELECTRICAL CHARACTERISTICS (CONT.) ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT VIN_OVLO+ 55.1 58.5 60 V Input overvoltage recovery threshold VIN_OVLO- 55.1 57.2 58 Input overvoltage lockout hysteresis VIN_OVLO_HYST PROTECTION Input overvoltage lockout threshold Overvoltage lockout response time Fault recovery time V 1.2 TOVLO V 8 µs TAUTO_RESTART 240 300 380 ms VIN_UVLOVIN_UVLO+ 28.5 31.1 37.4 V Input undervoltage recovery threshold 28.5 33.7 37.4 V Input undervoltage lockout hysteresis VIN_UVLO_HYST 1.6 V Undervoltage lockout response time TUVLO 8 µs Input undervoltage lockout threshold Output overcurrent trip threshold IOCP Output overcurrent response time constant TOCP Short circuit protection trip threshold ISCP Short circuit protection response time TSCP Thermal shutdown threshold 42 50 Effective internal RC filter 64 A 3.8 ms 1 µs 70 TJ_OTP A ºC 125 Safe Operating Area Average & Peak 400 120 350 100 80 250 60 200 40 150 20 100 50 0 6.0 6.5 7.0 7.5 8.0 8.5 9.0 Output Voltage (V) P (ave) P (pk), < 10 ms I (ave) Figure 1 — Safe operating area BCM® Bus Converter Rev 1.1 vicorpower.com Page 3 of 18 08/2014 800 927.9474 I (pk), < 10 ms 9.5 Output Current (A) Output Power (W) 300 Not Recommended for New Designs B048x080y24A 3.0 SIGNAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TC < 125°C (T-Grade); All other specifications are at TC = 25°C unless otherwise noted. PRIMARY CONTROL : PC • The PC pin enables and disables the BCM. When held low, • PC pin outputs 5 V during normal operation. PC pin internal bias the BCM is disabled. level drops to 2.5 V during fault mode, provided VIN remains in the valid range. • In an array of BCM modules, PC pins should be interconnected to synchronize start up and permit start up into full load conditions. SIGNAL TYPE STATE Regular Operation ANALOG OUTPUT Standby Transition DIGITAL INPUT / OUPUT ATTRIBUTE MIN TYP VPC 4.7 5.0 5.3 V PC available current IPC_OP 2.0 3.5 5.0 mA PC source (current) IPC_EN 50 100 50 150 PC voltage PC resistance (internal) PC capacitance (internal) SYMBOL CONDITIONS / NOTES RPC_INT CPC_INT Internal pull down resistor To permit regular operation Section 7 MAX UNIT µA 400 kΩ 1000 pF Start Up PC load resistance RPC_S Start Up PC time to start TON1 330 450 630 ms VPC_EN 2.0 2.5 3.0 V Regular Operation PC enable threshold Standby PC disable duration PC threshold hysteresis Transition PC enable to VOUT time TPC_DIS_T Minimum time before attempting re-enable VPC_HYSTER TON2 PC disable to standby time TPC-DIS PC fault response time TFR_PC VIN = 48 V for at least TON1 ms 60 kΩ 1 s 50 50 From fault to PC = 2 V mV 100 150 µs 4 10 µs 100 µs TEMPERATURE MONITOR : TM • The TM pin monitors the internal temperature of the controller IC • Can be used as a "Power Good" flag to verify that within an accuracy of ±5°C. the BCM module is operating. • Is used to drive the internal comparator for Overtemperature Shutdown. SIGNAL TYPE STATE ATTRIBUTE TM voltage range ANALOG OUTPUT Regular Operation Transition Standby CONDITIONS / NOTES VTM TM voltage reference VTM_AMB TM available current ITM TM gain DIGITAL OUTPUT (FAULT FLAG) SYMBOL MIN TJ controller = 27°C 2.95 VTM_PP TM capacitance (external) CTM_EXT TM fault response time TFR_TM TM voltage VTM_DIS TM pull down (internal) RTM_INT MAX UNIT 4.04 3.00 3.05 100 ATM TM voltage ripple TYP 2.12 10 120 From fault to TM = 1.5 V 10 mV/°C 200 mV 50 pF µs 0 RESERVED : RSV Reserved for factory use. No connection should be made to this pin. BCM® Bus Converter Rev 1.1 vicorpower.com Page 4 of 18 08/2014 800 927.9474 25 V µA CTM = 0 pF, VIN = 48 V, IOUT = 30 A Internal pull down resistor V 40 V 50 kΩ NL 5V 2.5 V 5V 3V PC VUVLO+ VUVLO– BCM® Bus Converter Rev 1.1 vicorpower.com Page 5 of 18 08/2014 800 927.9474 1 A E: TON2 F: TOCP G: TPC–DIS H: TSCP** B D 1: Controller start 2: Controller turn off 3: PC release C *Min value switching off **From detection of error to power train shut down A: TON1 B: TOVLO* C: TAUTO_RESTART D:TUVLO 0.4 V 3 V @ 27°C TM LL • K Vout C 500mS before retrial 3V VIN VOVLO+ VOVLO– 2 F 4: PC pulled low 5: PC released on output SC 6: SC removed IOCP ISSP IOUT E 3 G 4 Notes: H 5 – Timing and signal amplitudes are not to scale – Error pulse width is load dependent 6 Not Recommended for New Designs B048x080y24A 4.0 TIMING DIAGRAM B048x080y24A Not Recommended for New Designs 5.0 APPLICATION CHARACTERISTICS The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data. Full Load Efficiency vs. TCASE No Load Power Dissipation vs. Line 96 Full Load Efficiency (%) 10 8 6 4 2 95 94 93 0 38 40 42 44 46 47 49 51 53 -40 55 -20 25 °C -40 °C TCASE: 100 °C Efficiency & Power Dissipation -40 °C Case 87 20 82 15 77 10 PD 5 67 20 38 V VIN: 48 V 55 V 25 30 0 25 91 20 89 15 87 85 10 83 81 PD 79 0 0 5 10 48 V 55 V 38 V 48 V Efficiency (%) 91 20 89 15 87 85 10 83 81 PD 79 5 0 77 20 25 55 V 55 V 38 V 30 48 V 55 V 6.0 5.0 -40 -20 0 20 40 60 Case Temperature (°C) 38 V 48 V 7.0 Load Current (A) 48 V 30 8.0 ROUT (mΩ) 25 93 Power Dissipation (W) 95 38 V 25 ROUT vs. TCASE at VIN = 48 V 9.0 30 VIN: 20 Figure 5 — Efficiency and power dissipation at TC = 25°C Efficiency & Power Dissipation 100 °C Case 15 15 Load Current (A) 38 V 97 10 5 77 Figure 4 — Efficiency and power dissipation at TC = -40°C 5 55 V 93 VIN: 0 48 V 30 Load Current (A) 38 V 100 95 Efficiency (%) 25 15 80 97 Power Dissipation (W) Efficiency (%) 92 10 60 Efficiency & Power Dissipation 25 °C Case 30 5 40 Figure 3 — Full load efficiency vs. temperature; VIN 97 0 20 VIN : Figure 2 — No load power dissipation vs. VIN 72 0 Case Temperature (°C) Input Voltage (V) Power Dissipation (W) Power Dissipation (W) 12 55 V I OUT : Figure 6 — Efficiency and power dissipation at TC = 125°C Figure 7 — ROUT vs. temperature BCM® Bus Converter Rev 1.1 vicorpower.com Page 6 of 18 08/2014 800 927.9474 36 A 80 100 Not Recommended for New Designs B048x080y24A Output Voltage Ripple vs. Load VIN = 48 V 250 Voltage (mVPK-PK) 225 200 175 150 125 100 75 50 25 0 0 5 10 15 20 25 30 Load Current (A) Figure 8 — VRIPPLE vs. IOUT ; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 9 — Full load ripple, 330 µF CIN; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 10 — Start up from application of PC; VIN pre-applied COUT = 2300 µF Figure 11 — 0 A– 30 A transient response: CIN = 330 µF, IIN measured prior to CIN , no external COUT Figure 12 — 30 A – 0 A transient response: CIN = 330 µF, IIN measured prior to CIN , no external COUT BCM® Bus Converter Rev 1.1 vicorpower.com Page 7 of 18 08/2014 800 927.9474 B048x080y24A Not Recommended for New Designs 6.0 GENERAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40ºC < TJ < 125ºC (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted. ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT MECHANICAL Length L 32.25 / [1.270] 32.50 / [1.280] 32.75 / [1.289] mm/[in] Width W 21.75 / [0.856] 22.00 / [0.866] 22.25 / [0.876] mm/[in] Height H 6.48 / [0.255] 6.73 / [0.265] 6.98 / [0.275] mm/[in] Volume Vol Weight W Lead finish No heat sink 4.81 / [0.294] cm3/[in3] 14.5 / [0.512] g/[oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 B048x080y24A (T-Grade) -40 125 °C BCM48BF080M240A00 (M-Grade) Isothermal heatsink and isothermal internal PCB -55 125 °C µm THERMAL Operating temperature Thermal resistance TJ fJC Thermal capacity 1 °C/W 5 Ws/°C ASSEMBLY Peak compressive force applied to case (Z-axis) Supported by J-lead only Storage temperature TST Moisture sensitivity level MSL lbs lbs / in2 B048x080y24A (T-Grade) -40 125 °C BCM48BF080M240A00 (M-Grade) -65 125 °C MSL 6, 4 hours out of bag maximum ESDHBM MSL 5 Human Body Model, "JEDEC JESD 22-A114D.01"Class 1D ESDCDM Charge Device Model, "JEDEC JESD 22-C101-D" ESD withstand 6 5.41 1000 V 400 SOLDERING Peak temperature during reflow MSL 6, 4 hours out of bag maximum 245 °C MSL 5 225 °C Peak time above 217°C 60 90 s Peak heating rate during reflow 1.5 3 °C/s Peak cooling rate post reflow 1.5 6 °C/s 60 VDC SAFETY Working voltage (IN – OUT) Isolation voltage (hipot) VIN_OUT VHIPOT 2,250 Isolation capacitance CIN_OUT Unpowered unit Isolation resistance RIN_OUT At 500 Vdc 2500 3200 10 MIL-HDBK-217Plus Parts Count - 25°C Ground Benign, Stationary, Indoors / Computer Profile Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled MTBF VDC BCM® Bus Converter Rev 1.1 vicorpower.com Page 8 of 18 08/2014 800 927.9474 pF MΩ 4.3 MHrs 9.5 MHrs cTUVus cURus CE Marked for Low Voltage Directive and ROHS recast directive, as applicable. Agency approvals / standards 3800 Not Recommended for New Designs 7.0 USING THE CONTROL SIGNALS PC, TM Primary Control (PC) pin can be used to accomplish the following functions: • Logic enable and disable for module: Once Ton1 time has been satisfied, a PC voltage greater than Vpc_en will cause the module to start. Bringing PC lower than Vpc_dis will cause the module to enter standby. • Auxiliary voltage source: Once enabled in regular operational conditions (no fault), each BCM module PC provides a regulated 5 V, 3.5 mA voltage source. • Synchronized start up: In an array of parallel modules, PC pins should be connected to synchronize start up across units. This permits the maximum load and capacitance to scale by the number of paralleled modules. • Output disable: PC pin can be actively pulled down in order to disable the module. Pull down impedance shall be lower than 60 Ω. • Fault detection flag: The PC 5 V voltage source is internally turned off as soon as a fault is detected. • Note that PC can not sink significant current during a fault condition. The PC pin of a faulted module will not cause interconnected PC pins of other modules to be disabled. Temperature Monitor (TM) pin provides a voltage proportional to the absolute temperature of the converter control IC. It can be used to accomplish the following functions: • Monitor the control IC temperature: The temperature in Kelvin is equal to the voltage on the TM pin scaled by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied, TM can be used to protect the system thermally. • Fault detection flag: The TM voltage source is internally turned off as soon as a fault is detected. For system monitoring purposes microcontroller interface faults are detected on falling edges of TM signal. BCM® Bus Converter Rev 1.1 vicorpower.com Page 9 of 18 08/2014 800 927.9474 B048x080y24A PC -Vin +Vin BCM® Bus Converter Rev 1.1 vicorpower.com Page 10 of 18 08/2014 800 927.9474 1000 pF 3.1 V Vcc 100 uA 150 K 2.5 V PC Pull-Up & Source One shot delay Ton1 5 V, 2 mA min 18.5 V “Wake-Up” Power And Logic Vin Gate Drive supply UVLO OVLO Adaptive Soft Start Vcc Start up & Fault logic Enable Modulator V2 Primary current sensing Q2 Overtemperature Protection Primary Gate Drive Q1 Temp_Vref Lr Q4 Vref Temperature dependent voltage source Cr Primary Stage & Resonant Tank Q3 Slow current limit ∫ Fast current Limit Q6 40 K Overcurrent Protection Secondary Gate Drive Power Transformer 1K Q5 0.01 F Synchronous Rectification TM -Vout COUT +Vout Not Recommended for New Designs B048x080y24A 8.0 B048X080Y24A BLOCK DIAGRAM B048x080y24A Not Recommended for New Designs 9.0 SINE AMPLITUDE CONVERTER™ POINT OF LOAD CONVERSION 470 pH IOUT IOUT LIN = 5.7 nH OUT RROUT + 7.4 mΩ + R RCIN CIN 0.57 mΩ CCININ 2 µF RRCOUT COUT 0.5 Ω V•I 1/6 • IOUT VIN V IN LOUT = 600 pH + + – – 400 µΩ 1/6 • VIN COUT COUT IIQQ 88 mA 45 µF OUT VVOUT K – – Figure 13 — VI Chip® module AC model The Sine Amplitude Converter (SAC™) uses a high frequency resonant tank to move energy from input to output. (The resonant tank is formed by Cr and leakage inductance Lr in the power transformer windings as shown in the BCM module Block Diagram. See Section 8). The resonant LC tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. The B048x080y24A SAC can be simplified into the preceeding model. ROUT represents the impedance of the SAC, and is a function of the RDSON of the input and output MOSFETs and the winding resistance of the power transformer. IQ represents the quiescent current of the SAC control, gate drive circuitry, and core losses. The use of DC voltage transformation provides additional interesting attributes. Assuming that ROUT = 0 Ω and IQ = 0 A, Eq. (3) now becomes Eq. (1) and is essentially load independent, resistor R is now placed in series with VIN. At no load: R R VOUT = VIN • K (1) VVin IN + – SAC™ SAC 1/6 KK==1/32 Vout V OUT K represents the “turns ratio” of the SAC. Rearranging Eq (1): V K = OUT VIN (2) The relationship between VIN and VOUT becomes: VOUT = (VIN – IIN • R) • K In the presence of load, VOUT is represented by: VOUT = VIN • K – IOUT • ROUT (3) and IOUT is represented by: IOUT = Figure 14 — K = 1/6 Sine Amplitude Converter™ with series input resistor Substituting the simplified version of Eq. (4) (IQ is assumed = 0 A) into Eq. (5) yields: VOUT = VIN • K – IOUT • R • K2 IIN – IQ K (5) (4) BCM® Bus Converter Rev 1.1 vicorpower.com Page 11 of 18 08/2014 800 927.9474 (6) B048x080y24A Not Recommended for New Designs This is similar in form to Eq. (3), where ROUT is used to represent the characteristic impedance of the SAC™. However, in this case a real R on the input side of the SAC is effectively scaled by K2 with respect to the output. Assuming that R = 1 Ω, the effective R as seen from the secondary side is 28 mΩ, with K = 1/6 . A similar exercise should be performed with the additon of a capacitor or shunt impedance at the input to the SAC. A switch in series with VIN is added to the circuit. This is depicted in Figure 15. S VVin IN + – C SAC™ SAC K = 1/6 K = 1/32 VVout OUT Figure 15 — Sine Amplitude Converter™ with input capacitor A change in VIN with the switch closed would result in a change in capacitor current according to the following equation: IC(t) = C dVIN dt PDISSIPATED = PNL + PROUT Assume that with the capacitor charged to VIN, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, (8) POUT = PIN – PDISSIPATED = PIN – PNL – PROUT C K2 • h = = dVOUT dt (9) The equation in terms of the output has yielded a K2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. With a K = 1/6 as shown in Figure 15, C=1 µF would appear as C=36 µF when viewed from the output. (11) The above relations can be combined to calculate the overall module efficiency: substituting Eq. (1) and (8) into Eq. (7) reveals: IOUT = (10) Therefore, (7) IC = IOUT • K Low impedance is a key requirement for powering a highcurrent, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, the benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low, i.e. well beyond the crossover frequency of the system. A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies also reduces core losses. The two main terms of power loss in the BCM module are: - No load power dissipation (PNL): defined as the power used to power up the module with an enabled powertrain at no load. - Resistive loss (ROUT): refers to the power loss across the BCM module modeled as pure resistive impedance. POUT = PIN – PNL – PROUT PIN PIN VIN • IIN – PNL – (IOUT)2 • ROUT VIN • IIN = 1– ( ) PNL + (IOUT)2 • ROUT VIN • IIN BCM® Bus Converter Rev 1.1 vicorpower.com Page 12 of 18 08/2014 800 927.9474 (12) B048x080y24A Not Recommended for New Designs 10.0 INPUT AND OUTPUT FILTER DESIGN A major advantage of SAC™ systems versus conventional PWM converters is that the transformers do not require large functional filters. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieve power density. This paradigm shift requires system design to carefully evaluate external filters in order to: 1.Guarantee low source impedance: To take full advantage of the BCM module’s dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5 MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100 nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200 nH, the RC damper may be as high as 1 µF in series with 0.3 Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. 2.Further reduce input and/or output voltage ripple without sacrificing dynamic response: Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the module multiplied by its K factor. This is illustrated in Figures 11 and 12. storage may be more densely and efficiently provided by adding capacitance at the input of the module. At frequencies