End of Life
ZVS Regulators
PI33xx-x1
8 – 36VIN, 15A ZVS Buck Regulator
Product Description
Features & Benefits
The PI33xx‑x1 is a family of high-efficiency, wide-input-range
DC‑DC ZVS Buck regulators integrating controller, power
switches and support components all within a high-density
System‑in‑Package (SiP). The integration of a high performance
Zero‑Voltage Switching (ZVS) topology, within the PI33xx‑x1 series
increases point of load performance providing best-in-class power
efficiency. The PI33xx‑x1 requires only an external inductor and
minimal capacitors to form a complete DC-DC switching mode
Buck Regulator.
• High-efficiency ZVS Buck topology
Device
Output Voltage
• Wide input voltage range of 8 – 36V
• Very fast transient response
• High-accuracy pre-trimmed output voltage
• User-adjustable soft start & tracking
• Power-up into pre-biased load (select versions)
• Parallel capable with single wire current sharing
IOUT Max
• Input Over / Undervoltage Lockout (OVLO/UVLO)
Set
Range
PI3311-x1-LGIZ
1.0V
1.0 – 1.4V
15A
• Output Overvoltage Protection (OVP)
PI3318-x1-LGIZ
1.8V
1.4 – 2.0V
15A
• Overtemperature Protection (OTP)
PI3312-x1-LGIZ
2.5V
2.0 – 3.1V
15A
• Fast and slow current limits
PI3301-21-LGIZ [a]
3.3V
2.3 – 4.1V
15A
• –40°C to 125°C operating range (TJ)
Table 1 – PI33xx‑x1 portfolio
The ZVS architecture also enables high-frequency operation
while minimizing switching losses and maximizing efficiency.
The high switching frequency operation reduces the size of the
external filtering components, improves power density, and
enables very fast dynamic response to line and load transients.
The PI33xx‑x1 series sustains high switching frequency all the
way up to the rated input voltage without sacrificing efficiency
and, with its 20ns minimum on-time, supports large step-down
conversions up to 36VIN.
• Optional I2C™ functionality & programmability [a]
VOUT margining
Fault reporting
Enable and SYNCI pin polarity
Phase delay (interleaving multiple regulators)
Applications
• High-Efficiency Systems
• Computing, Communications, Industrial,
Automotive Equipment
• High-Voltage Battery Operation
Package Information
• 10 x 14 x 2.6mm LGA SiP
[a] I2C
functionality is now standard when purchased as PI3301-00-LGIZ. See PI33xx-0x data sheet.
ZVS Regulators
Page 1 of 28
Rev 1.7
12/2020
End of Life
PI33xx-x1
Contents
Order Information
3
Absolute Maximum Ratings
4
Output Voltage Trim
21
Functional Block Diagram
4
Soft Start Adjust and Tracking
22
Pin Description
5
Inductor Pairing
22
Package Pin-Out
5
Layout Guidelines
23
PI3311-x1-LGIZ (1.0VOUT ) Electrical Characteristics
6
Recommended PCB Footprint and Stencil
24
PI3318-x1-LGIZ (1.8VOUT ) Electrical Characteristics
9
LGIZ Package Drawing
25
PI3312-x1-LGIZ (2.5VOUT ) Electrical Characteristics
12
Revision History
26
PI3301-21-LGIZ (3.3VOUT ) Electrical Characteristics
15
Product Warranty
27
Functional Description
18
ENABLE (EN)
18
Remote Sensing
18
Switching Frequency Synchronization
18
Soft Start
18
Output Voltage Trim
18
Output Current Limit Protection
19
Input Undervoltage Lockout
19
Input Overvoltage Lockout
19
Output Overvoltage Protection
19
Overtemperature Protection
19
Pulse Skip Mode (PSM)
19
Variable Frequency Operation
19
Parallel Operation
20
I2C Interface Operation
20
ZVS Regulators
Page 2 of 28
Application Description
Rev 1.7
12/2020
21
PI33xx-x1
End of Life
Order Information
Part Number
Output Range
IOUT Max
Package
Transport
Media
1.0 – 1.4V
15A
10 x 14mm 123-pin LGA
TRAY
1.8V
1.4 – 2.0V
15A
10 x 14mm 123-pin LGA
TRAY
2.5V
2.0 – 3.1V
15A
10 x 14mm 123-pin LGA
TRAY
IOUT Max
Package
Transport
Media
Set
Range
PI3311-01-LGIZ
1.0V
PI3318-01-LGIZ
PI3312-01-LGIZ
I2C™ Functionality & Programmability
Part Number
Output Range
Set
Range
PI3311-21-LGIZ
1.0V
1.0 – 1.4V
15A
10 x 14mm 123-pin LGA
TRAY
PI3318-21-LGIZ
1.8V
1.4 – 2.0V
15A
10 x 14mm 123-pin LGA
TRAY
PI3312-21-LGIZ
2.5V
2.0 – 3.1V
15A
10 x 14mm 123-pin LGA
TRAY
PI3301-21-LGIZ
3.3V
2.3 – 4.1V
15A
10 x 14mm 123-pin LGA
TRAY
Absolute Maximum Ratings
Name
Rating
VIN
–0.7 to 36V
VS1
–0.7 to 36VDC
SGND
100mA
PGD, SYNCO, SYNCI, EN, EAO, ADJ, TRK, ADR1, ADR2, SCL, SDA
–0.3 to 5.5V / 5mA
VOUT , REM
PI3311-x1-LGIZ
–0.3 to 5.5V
PI3318-x1-LGIZ
–0.5 to 9V
PI3312-x1-LGIZ
–0.8 to 13V
PI3301-21-LGIZ
–1.0 to 18V
Storage Temperature
–65 to 150°C
Operating Junction Temperature
–40 to 125°C
Soldering Temperature for 20 seconds
245°C
ESD Rating
2kV HBM
Notes: At 25°C ambient temperature. Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions
beyond those listed in the Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted.
Test conditions are per the specifications within the individual product electrical characteristics.
ZVS Regulators
Page 3 of 28
Rev 1.7
12/2020
PI33xx-x1
End of Life
Functional Block Diagram
VIN
VS1
VIN
Q2
Q1
VOUT
R4
REM
Power
Control
R1
VCC
SYNCO
SYNCI
PGD
EN
PGND
Memory
ADJ
-
ZVS Control
+
1V R2
Interface
0Ω
ADR1
SDA
ADR0
SCL
SGND
Simplified block diagram (I2C™ pins SCL, SDA, ADR0, and ADR1 only active for PI33xx-21 device versions)
ZVS Regulators
Page 4 of 28
Rev 1.7
12/2020
EAO
TRK
VOUT
PI33xx-x1
End of Life
Pin Description
Pin Name
Number
SGND
Block 1
Signal Ground: Internal logic ground for EA, TRK, SYNCI, SYNCO, ADJ and I2C™ (options)
communication returns. SGND and PGND are star connected within the regulator package.
PGND
Block 2
Power Ground: VIN and VOUT power returns.
VIN
Block 3
Input Voltage: and sense for UVLO, OVLO and feed forward ramp.
VOUT
Block 5
Output Voltage: and sense for power switches and feed-forward ramp.
VS1
Block 4
Switching Node: and ZVS sense for power switches.
PWRGD
A1
Parallel Good: Used for parallel timing management intended for lead regulator.
EAO
A2
Error Amp Output: External connection for additional compensation and current sharing.
EN
A3
Enable Input: Regulator enable control. Asserted high or left floating – regulator enabled;
Asserted low, regulator output disabled. Polarity is programmable via I2C interface.
REM
A5
Remote Sense: High-side connection. Connect to output regulation point.
ADJ
B1
Adjust Input: An external resistor may be connected between ADJ pin and SGND or VOUT
to trim the output voltage up or down.
TRK
C1
Soft Start and Track Input: An external capacitor may be connected between TRK pin and
SGND to decrease the rate of rise during soft start.
NC
A4
No Connect: Leave pins floating.
VDR
K3
VDR can only be used for ADR0 and ADR1 pull up reference voltage.
No other external loading is permitted.
SYNCO
K4
Synchronization Output: Outputs a low signal for ½ of the minimum period for synchronization of
other converters.
SYNCI
K5
Synchronization Input: Synchronize to the falling edge of external clock frequency. SYNCI is a high-impedance
digital input node and should always be connected to SGND when not in use.
SDA
D1
Data Line: Connect to SGND for PI33xx-01 and PI33xx-11. For use with PI33xx-21 only.
SCL
E1
Clock Line: Connect to SGND for PI33xx-01. For use with PI33xx-21 only.
ADR1
H1
Tri-state Address: No connect for PI33xx-01. For use with PI33xx-21 only.
ADR0
G1
Tri-state Address: No connect for PI33xx-01. For use with PI33xx-21 only.
ZVS Regulators
Page 5 of 28
Description
Rev 1.7
12/2020
PI33xx-x1
End of Life
Package Pinout
A
D
E
G
K
PGD/
PWRGD
ADJ
TRK
SDA
SCL
SGND
ADR0
ADR1
SGND
SGND
EAO
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
EN
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
VDR
NC
SGND
SGND
PGND
PGND
PGND
PGND
PGND
SYNCO
PGND
PGND
PGND
PGND
PGND
SYNCI
REM
VOUT
VOUT
VOUT
VOUT
PGND
PGND
PGND
PGND
PGND
PGND
VOUT
VOUT
VOUT
VOUT
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
VS1
VS1
VS1
VS1
VS1
VIN
VIN
VIN
VIN
VS1
VS1
VS1
VS1
VS1
VIN
VIN
VIN
VIN
VS1
VS1
VS1
VS1
VS1
VIN
VIN
VIN
VIN
PI34xx-00
Pin Block Name
Group of pins
SGND
B2-4, C2-4, D2-3, E2-3, F1-3, G2-3, H2-3, J1-3, K1-2
PGND
A8-10, B8-10, C8-10, D8-10, E4-10, F4-10, G4-10, H4-10, J4-10, K6-10
VIN
G12-14, H12-14, J12-14, K12-14
VS1
A12-14, B12-14, C12-14, D12-14, E12-14
VOUT
A6-7, B6-7, C6-7, D6-7
ZVS Regulators
Page 6 of 28
Rev 1.7
12/2020
PI33xx-x1
End of Life
PI3311-x1-LGIZ (1.0VOUT) Electrical Characteristics
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 85nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
8
24
36
V
Input Specifications
Input Voltage
VIN_DC
Minimum 1mA load required
Input Current
IIN_DC
VIN = 24V, TC = 25°C, IOUT =15A
Input Current At Output Short (fault
condition duty cycle)
IIN_Short
Input Quiescent Current
IQ_VIN
Input Voltage Slew Rate
VIN_SR
740
[c]
mA
25
mA
Disabled
2.0
mA
Enabled (no load)
2.5
mA
1
V/μs
1.013
V
1.4
V
Output Specifications
Output Voltage Total Regulation
Output Voltage Trim Range
VOUT_DC
[c]
0.987
VOUT_DC
[d]
1.0
Line Regulation
∆VOUT (∆VIN)
@25°C, 8V < VIN < 36V
Load Regulation
∆VOUT (∆IOUT)
@25°C, 0.5A < IOUT < 15A
Output Voltage Ripple
VOUT_AC
IOUT = 5A, COUT = 8 x 100μF, 20MHz BW
Continuous Output
Current Range
IOUT_DC
[f]
Current Limit
IOUT_CL
[e]
1.0
0.10
%
0.10
%
45
mVP-P
0.001
15
18.0
A
A
Protection
VIN UVLO Start Threshold
VUVLO_START
7.10
7.60
8.00
V
VIN UVLO Stop Threshold
VUVLO_STOP
6.80
7.25
7.60
V
VIN UVLO Hysteresis
VUVLO_HYS
0.35
V
VIN OVLO Start Threshold
VOVLO_START
36.1
37.6
V
VIN OVLO Stop Threshold
VOVLO_STOP
37.0
38.4
V
VIN OVLO Hysteresis
VOVLO_HYS
0.8
V
VIN UVLO/OVLO Fault Delay Time
tf_DLY
Number of the switching frequency cycles
VIN UVLO/OVLO Response Time
tf
Output Overvoltage Protection
VOVP
Above VOUT
Overtemperature
Fault Threshold
TOTP
[c]
Overtemperature
Restart Hysteresis
TOTP_HYS
128
130
ns
20
%
135
30
[b]
Cycles
500
140
°C
°C
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
ZVS Regulators
Page 7 of 28
Rev 1.7
12/2020
PI33xx-x1
End of Life
PI3311-x1-LGIZ (1.0VOUT) Electrical Characteristics (Cont.)
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 85nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Timing
Switching Frequency
Fault Restart Delay
fS
[g]
tFR_DLY
500
kHz
30
ms
Sync In (SYNCI)
Synchronization Frequency Range
∆fSYNCI
SYNCI Threshold
VSYNCI
Relative to set switching frequency [d]
50
110
2.5
%
V
Sync Out (SYNCO)
SYNCO High
VSYNCO_HI
Source 1mA
4.5
V
SYNCO Low
VSYNCO_LO
Sink 1mA
SYNCO Rise Time
tSYNCO_RT
20pF load
10
ns
SYNCO Fall Time
tSYNCO_FT
20pF load
10
ns
0.5
V
Soft Start And Tracking
TRK Active Input Range
VTRK
Internal reference tracking range
0
1.04
VTRK_MAX
TRK Disable Threshold
VTRK_OV
20
40
60
mV
ITRK
–70
–50
–30
μA
Charge Current (Soft Start)
Discharge Current (Fault)
Soft-Start Time
1.2
V
TRK Max Output Voltage
ITRK_DIS
tSS
CTRK = 0µF
V
6.8
mA
2.2
ms
Enable
High Threshold
VEN_HI
0.9
1
1.1
V
Low Threshold
VEN_LO
0.7
0.8
0.9
V
Threshold Hysteresis
VEN_HYS
100
200
300
mV
Enable Pull-Up Voltage
(floating, unfaulted)
VEN_PU
With positive logic EN polarity
2
V
Enable Pull-Down Voltage
(floating, faulted)
VEN_PD
With negative logic EN polarity
0
V
Source Current
IEN_SO
With positive logic EN polarity
–50
μA
Sink Current
IEN_SK
With negative logic EN polarity
50
μA
[b]
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
ZVS Regulators
Page 8 of 28
Rev 1.7
12/2020
PI33xx-x1
End of Life
PI3311-x1-LGIZ (1.0VOUT) Electrical Characteristics (Cont.)
100
95
Efficiency (%)
90
85
80
75
70
65
60
55
50
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
VIN = 36V
Figure 1 — Efficiency at 25°C
Figure 4 — Transient response 7.5A to 15A, at 5A/µs;
Figure 2 — Short circuit test
Figure 5 — Output ripple 24VIN, 1.0VOUT at 15A;
COUT = 8 x 100µF ceramic
24VIN to 1.0VOUT, COUT = 8 x 100µF ceramic
600
Frequency (kHz)
500
400
300
200
100
0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
Figure 3 — Switching frequency vs. load current
ZVS Regulators
Page 9 of 28
VIN = 36V
Figure 6 — Output ripple 24VIN, 1.0VOUT at 7A;
COUT = 8 x 100µF ceramic
Rev 1.7
12/2020
PI33xx-x1
End of Life
PI3318-x1-LGIZ (1.8VOUT) Electrical Characteristics
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 125nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
8
24
36
V
Input Specifications
Input Voltage
VIN_DC
Input Current
IIN_DC
Input Current At Output Short (fault
condition duty cycle)
IIN_Short
VIN = 24V, TC = 25°C, IOUT =10A
835
[c]
A
20
Disabled
2.0
Enabled (no load)
2.5
Input Quiescent Current
IQ_VIN
Input Voltage Slew Rate
VIN_SR
[c]
VOUT_DC
[c]
1.773
VOUT_DC
[d]
1.4
mA
mA
1
V / μs
1.827
V
2.0
V
Output Specifications
Output Voltage Total Regulation
Output Voltage Trim Range
Line Regulation
∆VOUT (∆VIN)
@25°C, 8V < VIN < 36V
Load Regulation
∆VOUT (∆IOUT)
@25°C, 0.5A < IOUT < 15A
Output Voltage Ripple
VOUT_AC
IOUT = 5A, COUT = 6 x 100μF, 20MHz BW
Continuous Output
Current Range
IOUT_DC
[f]
Current Limit
IOUT_CL
[e]
1.8
0.10
%
0.10
%
30
mVP-P
0
15
18.0
A
A
Protection
VIN UVLO Start Threshold
VUVLO_START
7.10
7.60
8.00
V
VIN UVLO Stop Threshold
VUVLO_STOP
6.80
7.25
7.60
V
VIN UVLO Hysteresis
VUVLO_HYS
0.35
V
VIN OVLO Start Threshold
VOVLO_START
36.1
37.6
V
VIN OVLO Stop Threshold
VOVLO_STOP
37.0
38.4
V
VIN OVLO Hysteresis
VOVLO_HYS
0.8
V
VIN UVLO/OVLO Fault Delay Time
tf_DLY
Number of the switching frequency cycles
VIN UVLO/OVLO Response Time
tf
Output Overvoltage Protection
VOVP
Above VOUT
Overtemperature
Fault Threshold
TOTP
[c]
Overtemperature
Restart Hysteresis
TOTP_HYS
[b]
128
130
Cycles
500
ns
20
%
135
30
140
°C
°C
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
ZVS Regulators
Rev 1.7
Page 10 of 28 12/2020
PI33xx-x1
End of Life
PI3318-x1-LGIZ (1.8VOUT) Electrical Characteristics (Cont.)
Unless otherwise specified: –40°C < TJ < 125°C, VIN =24V, L1 = 125nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Timing
Switching Frequency
Fault Restart Delay
fS
[g]
tFR_DLY
550
kHz
30
ms
Sync In (SYNCI)
Synchronization Frequency Range
∆fSYNCI
SYNCI Threshold
VSYNCI
Relative to set switching frequency [d]
50
110
2.5
%
V
Sync Out (SYNCO)
SYNCO High
VSYNCO_HI
Source 1mA
4.5
V
SYNCO Low
VSYNCO_LO
Sink 1mA
SYNCO Rise Time
tSYNCO_RT
20pF load
10
ns
SYNCO Fall Time
tSYNCO_FT
20pF load
10
ns
0.5
V
Soft Start And Tracking
TRK Active Input Range
VTRK
Internal reference tracking range
0
1.04
VTRK_MAX
TRK Disable Threshold
VTRK_OV
20
40
60
mV
ITRK
–70
–50
–30
μA
Charge Current (Soft Start)
Discharge Current (Fault)
Soft-Start Time
1.2
V
TRK Max Output Voltage
ITRK_DIS
tSS
CTRK = 0µF
V
6.8
mA
2.2
ms
Enable
High Threshold
VEN_HI
0.9
1
1.1
V
Low Threshold
VEN_LO
0.7
0.8
0.9
V
Threshold Hysteresis
VEN_HYS
100
200
300
mV
Enable Pull-Up Voltage
(floating, unfaulted)
VEN_PU
2
V
Enable Pull-Down Voltage
(floating, faulted)
VEN_PD
0
V
Source Current
IEN_SO
–50
μA
Sink Current
IEN_SK
50
μA
[b]
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
ZVS Regulators
Rev 1.7
Page 11 of 28 12/2020
End of Life
PI33xx-x1
PI3318-x1-LGIZ (1.8VOUT) Electrical Characteristics (Cont.)
100
95
Efficiency (%)
90
85
80
75
70
65
60
55
50
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
VIN = 36V
Figure 7 — Efficiency at 25°C
Figure 10 — Transient response 7A to 15A, at 5A/µs;
24VIN to 1.8VOUT, COUT = 8 x 100µF ceramic
Figure 8 — Short circuit test
Figure 11 — Output ripple 24VIN, 1.8VOUT at 15A;
COUT = 8 x 100µF ceramic
600
Frequency (kHz)
500
400
300
200
100
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
Figure 9 — Switching frequency vs. load current
VIN = 36V
Figure 12 — Output ripple 24VIN, 1.8VOUT at 7.5A;
COUT = 8 x 100µF ceramic
ZVS Regulators
Rev 1.7
Page 12 of 28 12/2020
PI33xx-x1
End of Life
PI3312-x1-LGIZ (2.5VOUT) Electrical Characteristics
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 125nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
8
24
36
V
Input Specifications
Input Voltage
VIN_DC
[h]
Input Current
IIN_DC
VIN = 24V, TC = 25°C, IOUT = 15A
Input Current At Output Short (fault
condition duty cycle)
IIN_Short
Input Quiescent Current
IQ_VIN
Input Voltage Slew Rate
VIN_SR
1.7
[c]
A
60
Disabled
2.0
Enabled (no load)
2.5
mA
mA
1
V / μs
Output Specifications
Output Voltage Total Regulation
Output Voltage Trim Range
VOUT_DC
[c]
VOUT_DC
[d] [h]
Line Regulation
∆VOUT (∆VIN)
@25°C, 8V < VIN < 36V
Load Regulation
∆VOUT (∆IOUT)
@25°C, 0.5A < IOUT < 15A
Output Voltage Ripple
VOUT_AC
IOUT = 5A, COUT = 4 x 100μF, 20MHz BW
Continuous Output
Current Range
IOUT_DC
[f] [h]
Current Limit
IOUT_CL
2.465
2.500
2.535
V
2.0
2.5
3.1
V
[e]
0.10
%
0.10
%
28
mVP-P
0
15
18.0
A
A
Protection
VIN UVLO Start Threshold
VUVLO_START
7.10
7.60
8.00
V
VIN UVLO Stop Threshold
VUVLO_STOP
6.80
7.25
7.60
V
VIN UVLO Hysteresis
VUVLO_HYS
0.35
V
VIN OVLO Start Threshold
VOVLO_START
36.1
37.6
V
VIN OVLO Stop Threshold
VOVLO_STOP
37.0
38.4
V
VIN OVLO Hysteresis
VOVLO_HYS
0.8
V
VIN UVLO/OVLO Fault Delay Time
tf_DLY
Number of the switching frequency cycles
VIN UVLO/OVLO Response Time
tf
Output Overvoltage Protection
VOVP
Above VOUT
Overtemperature
Fault Threshold
TOTP
[c]
Overtemperature
Restart Hysteresis
TOTP_HYS
[b]
128
130
Cycles
500
ns
20
%
135
30
140
°C
°C
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
[h] Minimum 5V between V – V
IN
OUT must be maintained or a minimum load of 1mA required.
ZVS Regulators
Rev 1.7
Page 13 of 28 12/2020
PI33xx-x1
End of Life
PI3312-x1-LGIZ (2.5VOUT) Electrical Characteristics (Cont.)
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 125nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Timing
Switching Frequency
Fault Restart Delay
fS
[g]
tFR_DLY
650
kHz
30
ms
Sync In (SYNCI)
Synchronization Frequency Range
∆fSYNCI
SYNCI Threshold
VSYNCI
Relative to set switching frequency [d]
50
110
2.5
%
V
Sync Out (SYNCO)
SYNCO High
VSYNCO_HI
Source 1mA
4.5
V
SYNCO Low
VSYNCO_LO
Sink 1mA
SYNCO Rise Time
tSYNCO_RT
20pF load
10
ns
SYNCO Fall Time
tSYNCO_FT
20pF load
10
ns
0.5
V
Soft Start And Tracking
TRK Active Input Range
VTRK
Internal reference tracking range
0
1.04
VTRK_MAX
TRK Disable Threshold
VTRK_OV
20
40
60
mV
ITRK
–70
–50
–30
μA
Charge Current (Soft Start)
Discharge Current (Fault)
Soft-Start Time
1.2
V
TRK Max Output Voltage
ITRK_DIS
tSS
CTRK = 0µF
V
6.8
mA
2.2
ms
Enable
High Threshold
VEN_HI
0.9
1
1.1
V
Low Threshold
VEN_LO
0.7
0.8
0.9
V
Threshold Hysteresis
VEN_HYS
100
200
300
mV
Enable Pull-Up Voltage
(floating, unfaulted)
VEN_PU
2
V
Enable Pull-Down Voltage
(floating, faulted)
VEN_PD
0
V
Source Current
IEN_SO
–50
μA
Sink Current
IEN_SK
50
μA
[b]
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
[h] Minimum 5V between V – V
IN
OUT must be maintained or a minimum load of 1mA required.
ZVS Regulators
Rev 1.7
Page 14 of 28 12/2020
End of Life
PI33xx-x1
PI3312-x1-LGIZ (2.5VOUT) Electrical Characteristics (Cont.)
100
95
Efficiency (%)
90
85
80
75
70
65
60
55
50
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Load Curent (A)
VIN = 8V
VIN = 12V
VIN = 24V
VIN = 36V
Figure 13 — Efficiency at 25°C
Figure 16 — Transient response 7.5A to 15A, at 5A/µs;
24VIN to 2.5VOUT, COUT = 8 x 100µF ceramic
Figure 14 — Short circuit test
Figure 17 — Output ripple 24VIN, 2.5VOUT at 15A
COUT = 8 x 100µF ceramic
700
Frequency (kHz)
600
500
400
300
200
100
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
Figure 15 — Switching frequency vs. load current
VIN = 36V
Figure 18 — Output ripple 24VIN, 2.5VOUT at 7.5A
COUT = 8 x 100µF ceramic
ZVS Regulators
Rev 1.7
Page 15 of 28 12/2020
PI33xx-x1
End of Life
PI3301-21-LGIZ (3.3VOUT) Electrical Characteristics
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 155nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
8
24
36
V
Input Specifications
Input Voltage
VIN_DC
[h]
Input Current
IIN_DC
VIN = 24V, TC = 25°C, IOUT =15A
Input Current At Output Short (fault
condition duty cycle)
IIN_Short
Input Quiescent Current
IQ_VIN
Input Voltage Slew Rate
VIN_SR
2.25
[c]
A
75
Disabled
2.0
Enabled (no load)
2.5
mA
mA
1
V / μs
Output Specifications
Output Voltage Total Regulation
Output Voltage Trim Range
VOUT_DC
[c]
VOUT_DC
[d] [h]
Line Regulation
∆VOUT (∆VIN)
@25°C, 8V < VIN < 36V
Load Regulation
∆VOUT (∆IOUT)
@25°C, 0.5A < IOUT < 15A
Output Voltage Ripple
VOUT_AC
IOUT = 5A, COUT = 4 x 100μF, 20MHz BW
Continuous Output
Current Range
IOUT_DC
[f] [h]
Current Limit
IOUT_CL
3.25
3.30
3.36
V
2.3
3.3
4.1
V
[e]
0.10
%
0.10
%
37.5
mVP-P
0
15
18.0
A
A
Protection
VIN UVLO Start Threshold
VUVLO_START
7.10
7.60
8.00
V
VIN UVLO Stop Threshold
VUVLO_STOP
6.80
7.25
7.60
V
VIN UVLO Hysteresis
VUVLO_HYS
0.35
V
VIN OVLO Start Threshold
VOVLO_START
36.1
37.6
V
VIN OVLO Stop Threshold
VOVLO_STOP
37.0
38.4
V
VIN OVLO Hysteresis
VOVLO_HYS
0.8
V
VIN UVLO/OVLO Fault Delay Time
tf_DLY
Number of the switching frequency cycles
VIN UVLO/OVLO Response Time
tf
Output Overvoltage Protection
VOVP
Above VOUT
Overtemperature
Fault Threshold
TOTP
[c]
Overtemperature
Restart Hysteresis
TOTP_HYS
[b]
128
130
Cycles
500
ns
20
%
135
30
140
°C
°C
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
[h] Minimum 5V between V – V
IN
OUT must be maintained or a minimum load of 1mA required.
ZVS Regulators
Rev 1.7
Page 16 of 28 12/2020
PI33xx-x1
End of Life
PI3301-21-LGIZ (3.3VOUT) Electrical Characteristics (Cont.)
Unless otherwise specified: –40°C < TJ < 125°C, VIN = 24V, L1 = 155nH [b]
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Timing
Switching Frequency
Fault Restart Delay
fS
[g]
tFR_DLY
650
kHz
30
ms
Sync In (SYNCI)
Synchronization Frequency Range
∆fSYNCI
SYNCI Threshold
VSYNCI
Relative to set switching frequency [d]
50
110
2.5
%
V
Sync Out (SYNCO)
SYNCO High
VSYNCO_HI
Source 1mA
4.5
V
SYNCO Low
VSYNCO_LO
Sink 1mA
SYNCO Rise Time
tSYNCO_RT
20pF load
10
ns
SYNCO Fall Time
tSYNCO_FT
20pF load
10
ns
0.5
V
Soft Start And Tracking
TRK Active Input Range
VTRK
Internal reference tracking range
0
1.04
VTRK_MAX
TRK Disable Threshold
VTRK_OV
20
40
60
mV
ITRK
–70
–50
–30
μA
Charge Current (Soft Start)
Discharge Current (Fault)
Soft-Start Time
1.2
V
TRK Max Output Voltage
ITRK_DIS
tSS
CTRK = 0µF
V
6.8
mA
2.2
ms
Enable
High Threshold
VEN_HI
0.9
1
1.1
V
Low Threshold
VEN_LO
0.7
0.8
0.9
V
Threshold Hysteresis
VEN_HYS
100
200
300
mV
Enable Pull-Up Voltage
(floating, unfaulted)
VEN_PU
2
V
Enable Pull-Down Voltage
(floating, faulted)
VEN_PD
0
V
Source Current
IEN_SO
–50
μA
Sink Current
IEN_SK
50
μA
[b]
All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI33xx evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[c] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[d] Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or V
OUT is modified.
[e] Refer to Output Ripple plots.
[f] Refer to Load Current vs. Ambient Temperature curves.
[g] Refer to Switching Frequency vs. Load current curves.
[h] Minimum 5V between V – V
IN
OUT must be maintained or a minimum load of 1mA required.
ZVS Regulators
Rev 1.7
Page 17 of 28 12/2020
End of Life
PI33xx-x1
PI3301-x0-LGIZ (3.3VOUT) Electrical Characteristics (Cont.)
100
Efficiency (%)
95
90
85
80
75
70
65
60
55
50
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
VIN = 36V
Figure 19 — Efficiency at 25°C
Figure 22 — Transient response 7.5A to 15A, at 5A/µs
24VIN to 3.3VOUT, COUT = 8 x 100µF ceramic
Figure 20 — Short circuit test
Figure 23 — Output ripple 24VIN, 3.3VOUT at 15A
COUT = 8 x 100µF ceramic
800
Frequency (kHz)
700
600
500
400
300
200
100
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Load Current (A)
VIN = 8V
VIN = 12V
VIN = 24V
Figure 21 — Switching frequency vs. load current
VIN = 36V
Figure 24 — Output ripple 24VIN, 3.3VOUT at 7.5A
COUT = 8 x 100µF ceramic
ZVS Regulators
Rev 1.7
Page 18 of 28 12/2020
PI33xx-x1
End of Life
Functional Description
Switching Frequency Synchronization
The PI33xx‑x1 is a family of highly integrated ZVS Buck regulators.
The PI33xx‑x1 has a set output voltage that is trimmable within a
prescribed range shown in Table 2. Performance and maximum
output current are characterized with a specific external power
inductor (see Table 5).
The SYNCI input allows the user to synchronize the controller
switching frequency by an external clock referenced to SGND. The
external clock can synchronize the unit between 50% and 110%
of the preset switching frequency (fS). For PI33xx-21 device versions
only, the phase delay can be programmed via I2C bus with respect
to the clock applied at SYNCI pin. Phase delay allows PI33xx-21
regulators to be paralleled and operate in an interleaving mode.
L1
VIN
VIN
CIN
PGND
PI33xx
VS1
VOUT
VOUT
COUT
REM
SYNCI
TRK
ADJ
EN
EAO
SGND
SYNCO
The PI33xx‑x1 default for SYNCI is to sync with respect to the
falling edge of the applied clock providing 180° phase shift from
SYNCO. This allows for the paralleling of two PI33xx‑x1 devices
without the need for further user programming or external sync
clock circuitry. The user can change the SYNCI polarity to sync with
the external clock rising edge via the I2C data bus (PI33xx-21 device
versions only).
When using the internal oscillator, the SYNCO pin provides a
5V clock that can be used to sync other regulators. Therefore,
one PI33xx‑x1 can act as the lead regulator and have additional
PI33xx‑x1s running in parallel and interleaved.
Soft Start
Figure 25 — ZVS Buck with required components
For basic operation, Figure 25 shows the connections and
components required. No additional design or settings are required.
ENABLE (EN)
EN is the enable pin of the converter. The EN Pin is referenced to
SGND and permits the user to turn the regulator on or off. The
EN default polarity is a positive logic assertion. If the EN pin is
left floating or asserted high, the converter output is enabled.
Pulling EN pin below 0.8VDC with respect to SGND will disable the
regulator output.
The PI33xx‑x1 includes an internal soft-start capacitor to ramp the
output voltage in 2ms from 0V to full output voltage. Connecting
an external capacitor from the TRK pin to SGND will increase the
start-up ramp period. See “Soft Start Adjustment and Track,” in the
Applications Description section for more details.
Output Voltage Trim
The PI33xx‑x1 output voltage can be trimmed up from the preset
output by connecting a resistor from ADJ pin to SGND and can
be trimmed down by connecting a resistor from ADJ pin to VOUT.
Table 2 defines the voltage ranges for the PI33xx‑x1 family.
Device
The EN input polarity can be programmed (PI33xx-21 device
versions only) via the I2C™ data bus. When the EN pin polarity is
programmed for negative logic assertion; and if the EN pin is left
floating, the regulator output is enabled. Pulling the EN pin above
1.0VDC with respect to SGND will disable the regulator output.
Remote Sensing
Output Voltage
Set
Range
PI3311-x1-LGIZ
1.0V
1.0 – 1.4V
PI3318-x1-LGIZ
1.8V
1.4 – 2.0V
PI3312-x1-LGIZ
2.5V
2.0 – 3.1V
PI3301-21-LGIZ
3.3V
2.3 – 4.1V
Table 2 — PI33xx‑x1 family output voltage range
An internal 100Ω resistor is connected between REM pin and
VOUT pin to provide regulation when the REM connection is
broken. Referring to Figure 25, it is important to note that L1 and
COUT are the output filter and the local sense point for the power
supply output. As such, the REM pin should be connected at COUT
as the default local sense connection unless remote sensing to
compensate additional distribution losses in the system. The REM
pin should not be left floating.
ZVS Regulators
Rev 1.7
Page 19 of 28 12/2020
End of Life
PI33xx-x1
Output Current Limit Protection
Overtemperature Protection
PI33xx‑x1 has two methods implemented to protect from output
short or overcurrent condition.
The internal package temperature is monitored to prevent
internal components from reaching their thermal maximum. If the
Overtemperature Protection Threshold (OTP) is exceeded (TOTP),
the regulator will complete the current switching cycle, enter a low
power mode, set a fault flag, and will soft start when the internal
temperature falls below Overtemperature Restart Hysteresis
(TOTP_HYS). The OTP fault is stored in a Fault Register and can be
read and cleared (PI33xx-21 device versions only) via I2C data bus.
Slow Current Limit protection: prevents the output load from
sourcing current higher than the regulator’s maximum rated
current. If the output current exceeds the Current Limit (IOUT_CL) for
1024µs, a slow current limit fault is initiated and the regulator is
shut down which eliminates output current flow. After Fault Restart
Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be
repeated indefinitely until the excessive load is removed.
Fast Current Limit protection: PI33xx‑x1 monitors the regulator
inductor current pulse-by-pulse to prevent the output from
supplying very high current due to sudden low impedance short.
If the regulator senses a high inductor current pulse, it will initiate
a fault and stop switching until Fault Restart Delay ends and then
initiate a soft-start cycle.
Both the Fast and Slow current limit faults are stored in a Fault
Register and can be read and cleared (PI33xx-21 device versions
only) via I2C™ data bus.
Input Undervoltage Lockout
If VIN falls below the input Undervoltage Lockout (UVLO) threshold,
the regulator will enter a low power state and initiate a fault. The
system will restart once the input voltage is reestablished and after
the Fault Restart Delay. A UVLO fault is stored in a Fault Register
and can be read and cleared (PI33xx-21 device versions only)
via I2C data bus.
Pulse Skip Mode (PSM)
PI33xx‑x1 features a PSM to achieve high efficiency at light loads.
The regulators are setup to skip pulses if EAO falls below a PSM
threshold. Depending on conditions and component values, this
may result in single pulses or several consecutive pulses followed
by skipped pulses. Skipping cycles significantly reduces gate drive
power and improves light load efficiency. The regulator will leave
PSM once the EAO rises above the Skip Mode threshold.
Variable Frequency Operation
Each PI33xx‑x1 is preprogrammed to a base operating frequency,
with respect to the power stage inductor (see Table 5), to operate
at peak efficiency across line and load variations. At low-line
and high-load applications, the base frequency will decrease to
accommodate these extreme operating ranges. By stretching the
frequency, the ZVS operation is preserved throughout the total
input line voltage range therefore maintaining optimum efficiency.
Input Overvoltage Lockout
If VIN exceeds the input Overvoltage Lockout (OVLO) threshold
(VOVLO), while the regulator is running, the PI33xx‑x1 will complete
the current cycle and stop switching. The system will resume
operation after the Fault Restart Delay. The OVLO fault is stored
in a Fault Register and can be read and cleared (PI33xx-21 device
versions only) via I2C data bus.
Output Overvoltage Protection
The PI33xx‑x1 family is equipped with output Overvoltage
Protection (OVP) to prevent damage to input voltage sensitive
devices. If the output voltage exceeds 20% of its set regulated
value, the regulator will complete the current cycle, stop switching
and issue an OVP fault. The system will resume operation once
the output voltage falls below the OVP threshold and after Fault
Restart Delay. The OVP fault is stored in a Fault Register and can be
read and cleared (PI33xx-21 device versions only) via I2C data bus.
ZVS Regulators
Rev 1.7
Page 20 of 28 12/2020
End of Life
PI33xx-x1
Parallel Operation
I2C Interface Operation
Paralleling modules can be used to increase the output current
capability of a single power rail and reduce output voltage ripple.
PI33xx-21 devices provide an I2C™ digital interface that enables the
user to program the EN pin polarity (from high to low assertion)
and switching frequency synchronization phase/delay. These are
one time programmable options to the device.
VIN
VIN
CIN
SYNCO(#2)
R1
SYNCI (#2)
EN (#2)
PGND
PGD
SYNCI
VS1
L1
VOUT
PI33xx
(#1)
VOUT
COUT
REM
Also, the PI33xx-21 devices allow for dynamic VOUT margining via
I2C that is useful during development (settings stored in volatile
memory only and not retained by the device). The PI33xx-21 also
have the option for fault telemetry including:
Overtemperature protection
Fast / Slow current limit
Output voltage high
Input overvoltage
Input undervoltage
SYNCO
EN
EAO (#2)
EAO
TRK (#2)
TRK
SGND
L1
VIN
VIN
CIN
VOUT
PGND
PGD
SYNCO (#1)
SYNCI (#1)
EN (#1)
VS1
SYNCI
PI33xx
(#2)
COUT
For more information about how to utilize the I2C interface please
refer to application note PI33xx-2x I2C Digital Interface Guide.
REM
SYNCO
EN
EAO (#1)
EAO
TRK (#1)
TRK
SGND
Figure 26 — PI33xx‑x1 parallel operation
By connecting the EAO pins and SGND pins of each module
together the units will share the current equally. When the TRK
pins of each unit are connected together, the units will track each
other during soft start and all unit EN pins have to be released to
allow the units to start (see Figure 26). Also, any fault event in any
regulator will disable the other regulators. The two regulators will
be out of phase with each other reducing output ripple (refer to
Switching Frequency Synchronization).
To provide synchronization between regulators over the entire
operational frequency range, the Parallel Good (PGD) pin must
be connected to the lead regulator’s (#1) SYNCI pin and a 2.5kΩ
resistor, R1, must be placed between SYNCO (#2) return and the
lead regulator’s SYNCI (#1) pin, as shown in Figure 26. In this
configuration, at system soft start, the PGD pin pulls SYNCI low
forcing the lead regulator to initialize the open-loop start-up
synchronization. Once the regulators reach regulation, SYNCI is
released and the system is now synchronized in a closed-loop
configuration which allows the system to adjust on the fly, when
any of the individual regulators begin to enter variable frequency
mode in the loop.
Multi-phasing three regulators is possible (PI33xx-21 only) with
no change to the basic single-phase design. For more information
about how to program phase delays within the regulator, please
refer to application note PI33xx-2x Multi-Phase Design Guide.
ZVS Regulators
Rev 1.7
Page 21 of 28 12/2020
PI33xx-x1
End of Life
Application Description
Output Voltage Trim
The PI33xx‑x1 family of Buck Regulators provides seven common
output voltages: 1.0, 1.8, 2.5 and 3.3V. A post-package trim step is
implemented to offset any resistor divider network errors ensuring
maximum output accuracy. With a single resistor connected from
the ADJ pin to SGND or REM, each device’s output can be varied
above or below the nominal set voltage (with the exception of the
PI3311-x1 which can only be above the set voltage of 1V).
Output Voltage
Device
Set
Range
PI3311-x1-LGIZ
1.0V
1.0 – 1.4V
PI3318-x1-LGIZ
1.8V
1.4 – 2.0V
PI3312-x1-LGIZ
2.5V
2.0 – 3.1V
PI3301-21-LGIZ
3.3V
2.3 – 4.1V
VOUT
0.806kΩ
1.0kΩ
100Ω
PI3312-x1-LGIZ
1.5kΩ
1.0kΩ
100Ω
PI3301-21-LGIZ
2.61kΩ
1.13kΩ
100Ω
1
–
1
)– 1
OUT
R1
R2
(V
RLOW =
Rlow
SGND
(1)
( )
1
1
–
(2)
( )
1
R1
If, for example, a 4.0V output is needed, the user should choose
the regulator with a trim range covering 4.0V from Table 3. For this
example, the PI3301 is selected (3.3V set voltage). First step would
be to use Equation 1 to calculate RHIGH since the required output
voltage is higher than the regulator set voltage. The resistor-divider
network values for the PI3301 are can be found in Table 4 and
are R1 = 2.61kΩ and R2 = 1.13kΩ. Inserting these values in to
Equation 1, RHIGH is calculated as follows:
3.78kΩ =
Rhigh
R2
PI3318-x1-LGIZ
RHIGH =
REM
1.0VDC
R4
100Ω
By choosing an output voltage value within the ranges stated in
Table 3, VOUT can simply be adjusted up or down by selecting the
proper RHIGH or RLOW value, respectively. The following equations
can be used to calculate RHIGH and RLOW values:
R4
ADJ
R2
Open
R2( VOUT – 1)
The remote pin (REM) should always be connected to the VOUT
pin, if not used, to prevent an output voltage offset. Figure 27
shows the internal feedback voltage divider network.
+
R1
1kΩ
Table 4 — PI33xx‑x1 Internal divider values
Table 3 — PI33xx‑x1 family output voltage range
R1
Device
PI3311-x1-LGIZ
1
( 4.0 – 1 )
1
–
1.13kΩ
2.61kΩ
(
)
(3)
Resistor RHIGH should be connected as shown in Figure 27 to
achieve the desired 4.0V regulator output. No external RLOW
resistor is need in this design example since the trim is above the
regulator set voltage.
The PI3311-x1 output voltage can only be trimmed higher than the
factory 1V setting. The following Equation 4 can be used calculate
RHIGH values for the PI3311-x1 regulators.
Figure 27 — Internal resistor divider network
R1, R2, and R4 are all internal 1.0% resistors and RLOW and RHIGH
are external resistors for which the designer can add to modify
VOUT to a desired output. The internal resistor value for each
regulator is listed below in Table 4.
ZVS Regulators
Rev 1.7
Page 22 of 28 12/2020
RHIGH (1V) =
1
V
( OUT – 1)
R1
(4)
PI33xx-x1
End of Life
Soft Start Adjust and Tracking
The TRK pin offers a means to increase the regulator’s soft-start
time or to track with additional regulators. The soft-start slope is
controlled by an internal capacitor and a fixed charge current to
provide a soft-start time tSS for all PI33xx‑x1 regulators. By adding
an additional external capacitor to the TRK pin, the soft-start time
can be increased further. The following equation can be used to
calculate the proper capacitor for a desired soft-start times:
CTRK = ( tTRK • ITRK ) – 100 • 10 –9
(5)
Where, tTRK is the soft-start time and ITRK is a 50µA internal charge
current (see Electrical Characteristics for limits).
All connected regulators’ soft-start slopes will track with this
method. Direct tracking timing is demonstrated in Figure 28(b). All
tracking regulators should have their Enable (EN) pins connected
together to work properly.
Inductor Pairing
The PI33xx‑x1 utilizes an external inductor. This inductor has been
optimized for maximum efficiency performance. Table 5 details
the specific inductor value and part number utilized for each
PI33xx‑x1 device which are manufactured by Eaton. Data sheets
are available at:
https://www.eaton.com/
There is typically either proportional or direct tracking implemented
within a design. For proportional tracking between several
regulators at start up, simply connect all devices’ TRK pins together.
This type of tracking will force all connected regulators to start up
and reach regulation at the same time (see Figure 28(a)).
VOUT 2
(a)
Parent VOUT
VOUT 2
(b)
t
Figure 28 — PI33xx‑x1 tracking methods
For Direct Tracking, choose the regulator with the highest output
voltage as the parent and connect the parent to the TRK pin of the
other regulators through a divider (Figure 29) with the same ratio
as the child’s feedback divider (see Table 4 for values).
Parent VOUT
R1
TRK
Child
Inductor
(nH)
Inductor
Part Number
Manufacturer
PI3311-x1
85
FPV1006-85-R
Eaton
PI3318-x1
125
FPV1006-125-R
Eaton
PI3312-x1
125
FPV1006-125-R
Eaton
PI3301-21
150
FPV1006-150-R
Eaton
Table 5 — PI33xx‑x1 inductor pairing
VOUT 1
PI33xx
Device
R2
SGND
Figure 29 — Voltage divider connections for direct tracking
ZVS Regulators
Rev 1.7
Page 23 of 28 12/2020
PI33xx-x1
End of Life
Layout Guidelines
To optimize maximum efficiency and low-noise performance
from a PI33xx‑x1 design, layout considerations are necessary.
Reducing trace resistance and minimizing high-current loop
returns along with proper component placement will contribute to
optimized performance.
VIN
A typical buck converter circuit is shown in Figure 30. The potential
areas of high parasitic inductance and resistance are the circuit
return paths, shown as LR below.
VIN
COUT
CIN
CIN
COUT
Figure 32 — Current flow: Q2 closed
The recommended component placement, shown in Figure 33,
illustrates the tight path between CIN and COUT (and VIN and VOUT )
for the high AC return current. This optimized layout is used on the
PI33xx‑x1 evaluation board.
Figure 30 — Typical buck converter
VOUT
The path between the COUT and CIN capacitors is of particular
importance since the AC currents are flowing through both of
them when Q1 is turned on.
COUT
Figure 31, schematically, shows the reduced trace length between
input and output capacitors. The shorter path lessens the effects
that copper trace parasitics can have on the PI33xx‑x1 performance.
GND
CIN
VIN
Q1
VIN
GND
CIN
COUT
Q2
VSW
Figure 33 — Recommended component placement and
IND
Figure 31 — Current flow: Q1 closed
When Q1 is on and Q2 is off, the majority of CIN’s current is used
to satisfy the output load and to recharge the COUT capacitors.
When Q1 is off and Q2 is on, the load current is supplied by the
inductor and the COUT capacitor as shown in Figure 32. During this
period CIN is also being recharged by the VIN. Minimizing CIN loop
inductance is important to reduce peak voltage excursions when
Q1 turns off. Also, the difference in area between the CIN loop and
COUT loop is vital to minimize switching and GND noise.
ZVS Regulators
Rev 1.7
Page 24 of 28 12/2020
metal routing
PI33xx-x1
End of Life
Recommended PCB Footprint and Stencil
L
PI34xx-00
L
Recommended receiving footprint for PI33x‑x1 10 x 14mm package. All pads should have a final copper size of 0.55 x 0.55mm,
whether they are solder-mask defined or copper defined, on a 1 x 1mm grid. All stencil openings are 0.45mm when using either a
5 or 6mil stencil.
ZVS Regulators
Rev 1.7
Page 25 of 28 12/2020
PI33xx-x1
End of Life
Package Drawings
A
K
G
E D
A
D
B
E
DETAIL A
M
L
DETAIL B
A
SEATING PLANE
METALLIZED
PAD
M
M
A
M
SOLDER MASK
DETAIL A
A
L
D
E
AND POSITION
ZVS Regulators
Rev 1.7
Page 26 of 28 12/2020
A
End of Life
PI33xx-x1
Revision History
Revision
Date
Description
1.3
09/15/16
Last release in old format
n/a
1.4
11/21/16
Reformatted in new template
Clarified VS1 rating in Absolute Maximum Ratings Table
Updated pin description table and package pin-out labels
to show VDR capability
all
4
5
1.5
04/03/20
Updated mechanical drawings and pinout format (no mechanical changes)
1.6
08/19/20
Updated terminology
23
1.7
12/24/20
Separated end-of-life part numbers from main data sheet
(for PI3301-01, see PI33xx-0x data sheet)
All
ZVS Regulators
Rev 1.7
Page 27 of 28 12/2020
Page Number(s)
6, 25, 26
End of Life
PI33xx-x1
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ZVS Regulators
Rev 1.7
Page 28 of 28 12/2020
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