IRF740AS

IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 36 9.9 16 Single D FEATURES 400 0.55 • Low Gate Charge Qg Results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness • Fully Characterized Capacitance and Avalanche Voltage and Current • Effective Coss specified (AN 1001) • Lead (Pb)-free Available Available RoHS* COMPLIANT I2PAK (TO-262) D2PAK (TO-263) APPLICATIONS • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply • High speed Power Switching G D S G TYPICAL SMPS TOPOLOGIES S N-Channel MOSFET • Single Transistor Flyback Xfmr. Reset • Single Transistor Forward Xfmr. Reset (Both for US Line Input Only) ORDERING INFORMATION Package Lead (Pb)-free SnPb D2PAK (TO-263) IRF740ASPbF SiHF740AS-E3 IRF740AS SiHF740AS D2PAK (TO-263) IRF740ASTRLPbFa SiHF740ASTL-E3a IRF740ASTRLa SiHF740ASTLa D2PAK (TO-263) IRF740ASTRRPbFa SiHF740ASTR-E3a IRF740ASTRRa SiHF740ASTRa I2PAK (TO-262) IRF740ALPbF SiHF740AL-E3 IRF740AL SiHF740AL Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Currente Pulsed Drain Currenta, e Linear Derating Factor Single Pulse Avalanche Energyb, e Avalanche Currenta Repetiitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) TA = 25 °C TC = 25 °C VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM EAS IAR EAR PD dV/dt TJ, Tstg for 10 s LIMIT 400 ± 30 10 6.3 40 1.0 630 10 12.5 3.1 125 5.9 - 55 to + 150 300d UNIT V A W/°C mJ A mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 12.6 mH, RG = 25 Ω, IAS = 10 A (see fig. 12). c. ISD ≤ 10 A, dI/dt ≤ 330 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. Uses IRF740A/SiHF740A data and test conditions. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 www.vishay.com 1 WORK-IN-PROGRESS IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient (PCB Mounted, steady-state)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC TYP. MAX. 40 1.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mAd VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 400 V, VGS = 0 V VDS = 320 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 6.0 Ab Ad VDS = 50 V, ID = 6.0 400 2.0 4.9 0.48 - 4.0 ± 100 25 250 0.55 - V V/°C V nA µA Ω S Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5d VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 320 V, f = 1.0 MHz VDS = 0 V to 400 Vc, d VGS = 10 V ID = 10 A, VDS = 320 V, see fig. 6 and 13b, d - 1030 170 7.7 1490 52 61 10 35 24 22 36 9.9 16 ns nC pF VDD = 200 V, ID = 10 A, RG = 10 Ω, RD = 19.5 Ω, see fig. 10b, d - - 240 1.9 10 A 40 2.0 360 2.9 V ns µC G S TJ = 25 °C, IS = 10 A, VGS = 0 Vb TJ = 25 °C, IF = 10 A, dI/dt = 100 A/µsb, d Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. d. Uses IRF740A/SiHF740A data and test conditions. www.vishay.com 2 Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 100 I D , Drain-to-Source Current (A) 10 I D , Drain-to-Source Current (A) 10 TJ = 150 ° C 1 1 0.1 4.5V 20μs PULSE WIDTH TJ = 25 °C 1 10 100 TJ = 25 ° C V DS = 50V 20μs PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0 0.01 0.1 0.1 4.0 VDS , Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics VGS , Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 100 TOP RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 3.0 ID = 10A 2.5 10 2.0 1.5 1 1.0 4.5V 0.5 0.1 0.1 20μs PULSE WIDTH TJ = 150 ° C 1 10 100 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics TJ , Junction Temperature ( °C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 www.vishay.com 3 IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix 100000 10000 Coss = C + Cgd ds ISD , Reverse Drain Current (A) VGS = 0V, f = 1 MHZ Ciss = C + Cgd , C gs ds SHORTED Crss = C gd 100 C, Capacitance(pF) 10 1000 Ciss TJ = 150 ° C TJ = 25 ° C 1 100 Coss 10 Crss 1 1 10 100 1000 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 1.4 VDS , Drain-to-Source Voltage (V) VSD ,Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage 20 ID = 10A VDS = 320V VDS = 200V VDS = 80V 100 VGS , Gate-to-Source Voltage (V) OPERATION IN THIS AREA LIMITED BY RDS(on) 10us 16 12 ID , Drain Current (A) 100us 10 8 1ms 4 0 0 10 20 FOR TEST CIRCUIT SEE FIGURE 13 30 40 1 TC = 25 ° C TJ = 150 ° C Single Pulse 10 100 10ms 1000 QG , Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage VDS , Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix RD 10.0 VGS VDS D.U.T. + - VDD 8.0 RG ID , Drain Current (A) 10 V 6.0 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 4.0 Fig. 10a - Switching Time Test Circuit VDS 2.0 90 % 0.0 25 50 75 100 125 150 TC , Case Temperature ( ° C) Fig. 9 - Maximum Drain Current vs. Case Temperature 10 % VGS td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 10 0.01 0.001 0.00001 t1 , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 15 V VDS tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 Ω + A - VDD IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 www.vishay.com 5 IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix EAS , Single Pulse Avalanche Energy (mJ) 1400 TOP BOTTOM V DSav , Avalanche Voltage ( V ) 1200 1000 800 600 400 200 0 25 50 75 100 125 ID 4.5A 6.3A 10A 580 560 540 520 500 480 150 Starting TJ , Junction Temperature ( °C) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 IAV , Avalanche Current ( A) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Typlical Drain-to-Source Voltage vs. Avalanche Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF VGS QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 IRF740AS, IRF740AL, SiHF740AS, SiHF740AL Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91052. Document Number: 91052 S-Pending-Rev. A, 19-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1