IRF840

IRF840, SiHF840 Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 63 9.3 32 Single D FEATURES 500 0.85 • Dynamic dV/dt Rating • Repetitive Avalanche Rated • Fast Switching • Ease of Paralleling • Simple Drive Requirements • Lead (Pb)-free Available Available RoHS* COMPLIANT TO-220 DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. G S G D S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-220 IRF840PbF SiHF840-E3 IRF840 SiHF840 ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc for 10 s 6-32 or M3 screw Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque TC = 25 °C EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 500 ± 20 8.0 5.1 32 1.0 510 8.0 13 125 3.5 - 55 to + 150 300d 10 1.1 W/°C mJ A mJ W V/ns °C lbf · in N·m A UNIT V V Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 8.0 A (see fig. 12). c. ISD ≤ 8.0 A, dI/dt ≤ 100 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91070 S-81290-Rev. B, 16-Jun-08 www.vishay.com 1 IRF840, SiHF840 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 62 1.0 °C/W UNIT SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 20 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 4.8 Ab VDS = 50 V, ID = 4.8 Ab VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 ID = 8 A, VDS = 400 V, see fig. 6 and 13b 500 2.0 4.9 0.78 - 4.0 ± 100 25 250 0.85 - V V/°C V nA µA Ω S Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS VGS = 10 V - 1300 310 120 14 23 49 20 4.5 7.5 63 9.3 32 nH ns nC pF VDD = 250 V, ID = 8 A RG = 9.1 Ω, RD = 31 Ω, see fig. 10b - Between lead, 6 mm (0.25") from package and center of die contact D - G S - 460 4.2 8.0 A 32 2.0 970 8.9 V ns µC G S TJ = 25 °C, IS = 8 A, VGS = 0 Vb TJ = 25 °C, IF = 8 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91070 S-81290-Rev. B, 16-Jun-08 IRF840, SiHF840 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted VGS Top 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V ID, Drain Current (A) 101 ID, Drain Current (A) 101 150 °C 25 °C 100 4.5 V 100 20 µs Pulse Width TC = 25 °C 101 20 µs Pulse Width VDS = 50 V 4 91070_03 100 91070_01 5 6 7 8 9 10 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics Fig. 1 - Typical Output Characteristics, TC = 25 °C 101 ID, Drain Current (A) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top RDS(on), Drain-to-Source On Resistance (Normalized) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 ID = 8.0 A VGS = 10 V 4.5 V 100 20 µs Pulse Width TC = 150 °C 100 101 20 40 60 80 100 120 140 160 91070_02 VDS, Drain-to-Source Voltage (V) 91070_04 TJ, Junction Temperature (°C) Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91070 S-81290-Rev. B, 16-Jun-08 www.vishay.com 3 IRF840, SiHF840 Vishay Siliconix 2500 2000 ISD, Reverse Drain Current (A) Capacitance (pF) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss 150 °C 101 25 °C 1500 1000 Coss 500 Crss 0 100 100 101 0.4 91070_07 VGS = 0 V 0.6 0.8 1.0 1.2 1.4 91070_05 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage 20 VGS, Gate-to-Source Voltage (V) ID = 8.0 A VDS = 400 V VDS = 250 V VDS = 100 V 102 5 Operation in this area limited by RDS(on) 10 µs 100 µs ID, Drain Current (A) 16 2 10 5 12 2 1 ms 10 ms 8 1 5 4 For test circuit see figure 13 2 0 0 91070_06 15 30 45 60 75 91070_08 0.1 0.1 TC = 25 °C TJ = 150 °C Single Pulse 2 5 1 2 5 10 2 5 102 2 5 103 2 5 104 QG, Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage www.vishay.com 4 Document Number: 91070 S-81290-Rev. B, 16-Jun-08 IRF840, SiHF840 Vishay Siliconix RD VDS 8.0 RG VGS D.U.T. + - VDD ID, Drain Current (A) 6.0 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 4.0 Fig. 10a - Switching Time Test Circuit 2.0 VDS 90 % 0.0 25 50 75 100 125 150 10 % VGS td(on) tr td(off) tf 91070_09 TC, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms 10 Thermal Response (ZthJC) 1 0 - 0.5 0.2 0.1 0.1 0.05 0.02 0.01 10-2 PDM Single Pulse (Thermal Response) t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 0.1 1 10 102 10-3 10-5 91070_11 10-4 10-3 t1, Rectangular Pulse Duration (S) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS RG VDS tp VDD D.U.T. IAS 10 V tp 0.01 Ω IAS Fig. 12b - Unclamped Inductive Waveforms VDS + - V DD VDS Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91070 S-81290-Rev. B, 16-Jun-08 www.vishay.com 5 IRF840, SiHF840 Vishay Siliconix 1200 EAS, Single Pulse Energy (mJ) 1000 800 600 400 200 0 VDD = 50 V 25 50 75 100 ID 3.6 A 5.1 A Bottom 8.0 A Top 125 150 91070_12c Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 10 V QGS QG 12 V 0.2 µF 0.3 µF QGD + D.U.T. VGS 3 mA - VDS VG Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91070 S-81290-Rev. B, 16-Jun-08 IRF840, SiHF840 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91070. Document Number: 91070 S-81290-Rev. B, 16-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1