WED3DG7266V7D1I-XX

White Electronic Designs WED3DG7266V-D1 PRELIMINARY* 512MB – 64Mx72 SDRAM, UNBUFFERED, w/PLL FEATURES PC100 and PC133 Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page Single Rank 3.3V ± 0.3V Power Supply 144 Pin SO-DIMM JEDEC • D1: 31.75 (1.25") TYP NOTE: Consult factory for availability of: • RoHS compliant products • Vendor source control options • Industrial temperature option DESCRIPTION The WED3DG7266V is a 64Mx72 synchronous DRAM module which consists of nine 64Mx8 SDRAM components in TSOP II package, and one 2Kb EEPROM in an 8 pin TSOP package for Serial Presence Detect which are mounted on a 144 pin SO-DIMM multilayer FR4 Substrate. PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) PINOUT PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 FRONT VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS DQMB0 DQMB1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 PIN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 BACK VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 VSS DQMB4 DQMB5 VCC A3 A4 A5 VSS DQ40 DQ41 DQ42 DQ43 VCC DQ44 PIN 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 FRONT DQ13 DQ14 DQ15 VSS CB0 CB1 CLK0 VCC RAS# WE# SO# S1#* NC VSS CB2 CB3 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 PIN 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 BACK DQ45 DQ46 DQ47 VSS CB4 CB5 CKE0 VCC CAS# CKE1* A12* NC CLK1 VSS CB6 CB7 VCC DQ48 DQ49 DQ50 DQ51 VSS DQ52 DQ53 PIN 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 1 PIN NAMES BACK DQ54 DQ55 VCC A7 BA0 VSS BA1 A11 VCC DQMB6 DQMB7 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS SCL VCC A0 – A12 BA0-1 DQ0-63 CLK0, CLK1 CB0-7 CKE0 CS0# RAS# CAS# WE# DQM0-7 VCC VSS SDA SCL DNU NC Address Input (Multiplexed) Select Bank Data Input/Output Clock Input Check Bit (Data-In/Data-Out) Clock Enable Input Chip Select Input Row Address Strobe Column Address Strobe #Write Enable DQM Power Supply (3.3V) Ground Serial Data I/O Serial Clock Do Not Use No Connect FRONT DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC DQMB2 DQMB3 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC PIN 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 * These pins are not used in this module ** These pins should be NC in the system which does not support SPD. Febuary 2006 Rev. 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FUNCTIONAL BLOCK DIAGRAM WED3DG7266V-D1 PRELIMINARY WE# S0# DQMB0 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQMB4 DQM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQMB1 DQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQMB5 DQM DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQMB6 DQM CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 DQMB2 DQM DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQMB3 DQM DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# CLK0 PLL SDRAMs I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# DQMB7 DQM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 S0# WE# *CLOCK WIRING CLOCK INPUT *CLK0 *CLK1 SDRAMS 4 OR 5 SDRAMS 4 OR 5 SDRAMS RAS# CAS# CKE0 BA0-BA1 A0-A12 RAS#:SDRAM CAS#:SDRAM CKE: SDRAM BA0-BA1: SDRAM A0-A12: SDRAM NOTE: DQ wiring may differ than described in this drawing however, DQ/DQMB/CKE/S relationships must be maintained as shown. SERIAL PD VCC SCL SDRAM A0 A1 A2 SDA VSS SDRAM Febuary 2006 Rev. 2 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Note: WED3DG7266V-D1 PRELIMINARY Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 9 50 Units V V °C W mA Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ +70°C Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 — -10 Typ 3.3 3.0 — — — — Max 3.6 VCCQ + 0.3 0.8 — 0.4 10 Unit V V V V V µA 1 2 IOH = -2mA IOL= -2mA 3 Note Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VCCQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0) Input Capacitance (CK0) Input Capacitance (CS0#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data Input/Output Capacitance (DQ0-DQ63) Data Input/Output Capacitance (CB0-7) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT COUT1 Max 40 40 40 6 40 7 40 9 9 Unit pF pF pF pF pF pF pF pF pF Febuary 2006 Rev. 2 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs OPERATING CURRENT CHARACTERISTICS (VCC = 3.3V, TA = 0°C ≤ +70°C) WED3DG7266V-D1 PRELIMINARY Version Parameter Operating Current (One bank active) Precharge Standby Current in Power Down Mode Symbol ICC1 Burst Length = 1 tRC ≥ tRC (min) IOL = 0mA CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≤ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS ≥ VIH(min), tcc =10ns Input signals are charged one time during 20 CKE ≥ VIH(min), CLK ≥VIL(max), tCC = ∞ Input signals are stable CKE ≥ VIL(max), tCC = 10ns CKE & CLK ≤ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 10ns Input signals are changed one time during 20ns CKE ≤ VIH(min), CLK ≤ VIL(max), tcc = ∞ Input signals are stable Io = mA Page burst 4 Banks activated tCCD = 2CLK tRC ≥ tRC(min) CKE ≤ 0.2V Conditions 133/100 1,925 Units mA Note 1 ICC2P ICC2PS Icc2N 64 64 395 mA Precharge Standby Current in Non-Power Down Mode Icc2NS ICC3P ICC3PS ICC3N mA 215 100 100 575 420 mA mA mA Active Standby Current in Power-Down Mode Active Standby Current in Non-Power Down Mode ICC3NS ICC4 Operating Current (Burst mode) 1,925 mA 1 Refresh Current Self Refresh Current Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. ICC5 ICC6 3,095 180 mA mA 2 Febuary 2006 Rev. 2 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ORDERING INFORMATION FOR D1 Industrial Temperature Ordering Information WED3DG7266V10D1xx WED3DG7266V7D1xx WED3DG7266V75D1xx Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Height 31.75 (1.250") TYP 31.75 (1.250") TYP 31.75 (1.250") TYP Ordering Information WED3DG7266V10D1I-xx WED3DG7266V7D1I-xx WED3DG7266V75D1I-xx WED3DG7266V-D1 PRELIMINARY Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Height 31.75 (1.250") TYP 31.75 (1.250") TYP 31.75 (1.250") TYP Notes: • Consult Factory for availability of RoHS products. (G = RoHS Compliant) • Vendor specific part numbers are used to provide memory components source control. The place holder for this is shown as lower case “x” in the part numbers above and is to be replaced with the respective vendors code. Consult factory for qualified sourcing options. (M = Micron, S = Samsung & consult factory for others) • Consult factory for availability of industrial temperature (-40°C to 85°C) option PACKAGE DIMENSIONS FOR D1 67.72 (2.661 Max) 2.01 (0.079 Min) 3.81 (0.150) MAX. 3.99 (0.157) 31.75 (1.250) Max 19.99 (0.787) 23.14 (0.913) 28.2 (1.112) 32.79 (1.291) 4.60 (0.181) 1.50 (0.059) 9.91 (0.039) (± 0.004) * ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES). Febuary 2006 Rev. 2 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PART NUMBERING GUIDE WED3DG7266V-D1 PRELIMINARY WED 3 D G 7266 V xx D1 I- x G WEDC MEMORY SDRAM GOLD DEPTH & BUS WIDTH 3.3 VOLTS CLOCK SPEED (MHz) 10 = 100MHz @ CL = 2 7 = 133MHz @ CL = 2 75 = 133MHz @ CL = 3 PACKAGE 144 PIN SO-DIMM INDUSTRIAL TEMP COMPONENT VENDOR NAME (M = Micron) (S = Samsung) G = ROHS COMPLIANT Febuary 2006 Rev. 2 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs Document Title 512MB - 64Mx72 SDRAM UNBUFFERED, w/PLL WED3DG7266V-D1 PRELIMINARY Revision History Rev # Rev A Rev 0 History Created 0.1 Added PLL spec 0.2 Updated CAP and IDD specs 0.3 Moved status from advanced to preliminary 0.4 Removed “ED” from part number 0.5 Moved from Advanced to preliminary Release Date 3-02 6-04 Status Advanced Preliminary Rev 1 Rev 2 1.1 Added “ED” to part number 2.1 Added RoHS, vendor source and industrial option notes 2.2 Added part number guide 7-05 2-06 Preliminary Preliminary Febuary 2006 Rev. 2 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com