WV3HG128M72EEU403PD4IMG

White Electronic Designs WV3HG128M72EEU-PD4 ADVANCED* 1GB – 128Mx72 DDR2 SDRAM UNBUFFERED, SO-DIMM w/PLL FEATURES Unbuffered 200-pin (SO-DIMM) small-outline dual in-line memory module Support ECC detection and correction Fast data transfer rates: PC2-6400*, PC2-5300*, PC2-4200 and PC2-3200 VCC = VCCQ = 1.8V ±0.1V VCCSPD = 1.7V to 3.6V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Differential clock input (CK,CK#) Four-bit prefetch architecture Multiple internal device banks for concurrent operation Programmable CAS# latency (CL): 3 4, 5*, and 6* Adjustable data-output drive strength 7.8µs average periodic refresh interval On-die termination (ODT) Posted CAS# latency: 0, 1, 2, 3 and 4 Serial Presence Detect (SPD) with EEPROM Auto & self refresh (64ms: 8,192 cycle refresh) Gold edge contacts RoHS compliant JEDEC proposed pin-out Package option • 200 Pin SO-DIMM: 30.00mm (1.181") TYP DESCRIPTION The WV3HG128M72EEU is a 128Mx72 Double Data Rate DDR2 SDRAM high density module. This memory module consists of nine 128Mx8 bit DDR2 Synchronous DRAMs in FBGA packages, mounted on a 200-pin SO-DIMM FR4 substrate. * This product is under development, is not qualified or characterized and is subject to change or cancellation without notice. NOTE: Consult factory for availability of: • Vendor source control options • Industrial temperature option OPERATING FREQUENCIES PC2-3200 Clock Speed CL-tRCD-tRP * Consult factory for availability PC2-4200 266MHz 4-4-4 PC2-5300* 333MHz 5-5-5 PC2-6400* 400MHz 6-6-6 200MHz 3-3-3 May 2006 Rev. 0 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PIN CONFIGURATION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Symbol VREF VSS DQ0 DQ4 VSS DQ5 DQ1 VSS DQS0# DM0 DQS0 VSS VSS DQ6 DQ2 DQ7 DQ3 VSS VSS DQ12 DQ8 DQ13 DQ9 VSS VSS DM1 DQS1# VSS DQS1 DQ14 VSS DQ15 DQ10 VSS DQ11 DQ20 VSS DQ21 DQ16 VSS DQ17 NC VSS DM2 DQS2# VSS DQS2 DQ22 VSS DQ23 Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Symbol DQ18 VSS DQ19 DQ28 VSS DQ29 DQ24 VSS DQ25 DM3 VSS VSS DQS3# DQ30 DQS3 DQ31 VSS VSS DQ26 CB4 DQ27 CB5 VSS VSS CB0 DM8 CB1 VSS VSS CB6 DQS8# CB7 DQS8 VSS VSS CB2 CKE0 CB3 NC VSS NC NC VCC NC A12 A11 A9 VCC A7 A8 Pin No. 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 Symbol VCC A6 A5 A4 A3 VCC A2 A1 VCC A0 A10/AP BA1 BA0 VCC RAS# WE# VCC CS0# CAS# ODT0 NC A13 VCC VCC NC CK NC CK# DQ32 VSS VSS DQ36 DQ33 DQ37 DQS4# VSS DQS4 DM4 VSS VSS DQ34 DQ38 DQ35 DQ39 VSS VSS DQ40 DQ44 DQ41 DQ45 Pin No. 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 Symbol VSS VSS DQS5# DM5 DQS5 VSS VSS DQ46 DQ42 DQ47 DQ43 VSS VSS DQ52 DQ48 DQ53 DQ49 VSS VSS DM6 DQS6# VSS DQS6 DQ54 VSS DQ55 DQ50 VSS DQ51 DQ60 VSS DQ61 DQ56 VSS DQ57 DM7 VSS DQ62 DQS7# VSS DQS7 DQ63 DQ58 SDA VSS SCL DQ59 SA1 VCCSPD SA0 WV3HG128M72EEU-PD4 ADVANCED PIN NAMES Pin Name A0-A13 BA0, BA2 DQ0-DQ63 CB0-CB7 DQS0-DQS8 DQS0#-DQS8# ODT0 CK,CK# CKE0 CS0# RAS# CAS# WE# VCC VSS SA0-SA1 SDA VREF DM0-DM8 VCCSPD SCL NC Function Address Inputs SDRAM Bank Address Data Input/Output Check Bits Data strobes Data strobes complement On-die termination controls Clock inputs Clock enable inputs Chip select inputs Row Address Strobe Column Address Strobe Write Enable Core Power Ground SPD address Serial Data Input/Output Input/Output Reference Voltage Data-in mask Serial EEPROM power supply SPD Clock Input No connect May 2006 Rev. 0 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WV3HG128M72EEU-PD4 ADVANCED FUNCTIONAL BLOCK DIAGRAM CS0# DQS0 DQS0# DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1# DM1 DM/ CS# DQS DQS# RDQS DM/ CS# DQS DQS# RDQS DQS4 DQS4# DM4 DM/ CS# DQS DQS# RDQS I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DQS5 DQS5# DM5 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DM/ CS# DQS DQS# RDQS DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2# DM2 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DQS6 DQS6# DM6 DM/ CS# DQS DQS# RDQS DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DM/ CS# DQS DQS# RDQS DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQS3 DQS3# DM3 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DQS7 DQS7# DM7 DM/ CS# DQS DQS# RDQS DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DM/ CS# DQS DQS# RDQS DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQS8 DQS8# DM8 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DM/ CS# DQS DQS# RDQS VCCSPD VCC\VCCQ SCL Serial PD DDR2 SDRAMs DDR2 SDRAMs DDR2 SDRAMs CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 Serial PD WP A0 A1 A2 SA0 SA1 SA2 SDA VREF VSS CS0# BA0-BA2 A0-A13 RAS# CAS# WE# CKE0 ODT0 CS0# CS#: DDR2 SDRAMs BA0-RBA2 BA0-BA2: DDR2 SDRAMs A0-RA13 A0-A13: DDR2 SDRAMs RAS# RAS#: DDR2 SDRAMs CAS# CAS#: DDR2 SDRAMs WE# WE#: DDR2 SDRAMs CKE0 CKE: DDR2 SDRAMs ODT0 ODT: DDR2 SDRAMs CK0 CK0# PCK0, PCK4-PCK6, PCK9 CK: DDR2 SDRAMs CK#: DDR2 SDRAMs P L L PCK0# , PCK4#-PCK6#, PCK9# NOTE: Unless otherwise noted, resistor values are 22 Ohms ± 5% May 2006 Rev. 0 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs All voltages referenced to VSS Parameter Supply Voltage I/O Reference Voltage I/O Termination Voltage SPD Supply Voltage Symbol VCC VREF VTT VCCSPD Min 1.7 0.49 x VCC VREF-0.04 1.7 Typical 1.8 0.50 x VCC VREF - WV3HG128M72EEU-PD4 ADVANCED DC OPERATING CONDITIONS Max 1.9 0.51 x VCC VREF+0.04 3.6 Unit V V V V Notes 3 1 2 Notes: 1 VREF is expected to equal VCC/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed +/-1 percent of the DC value. Peak-to-peak AC noise on VREF may not exceed +/-2 percent of VREF. This measurement is to be taken at the nearest VREF bypass capacitor. 2. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track variations in the DC level of VREF. 3. VCCQ of all IC's are tied to VCC. ABSOLUTE MAXIMUM RATINGS Symbol VCC VIN, VOUT Parameter Voltage on VCC pin relative to VSS Voltage on any pin relative to VSS Command/Address, RAS#, CAS#, WE#, IL Input leakage current; Any input 0V