W2465AK-20

W2465A 8K × 8 HIGH-SPEED CMOS STATIC RAM GENERAL DESCRIPTION The W2465A is a high-speed, low-power CMOS static RAM organized as 8192 × 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • • High-speed access time: 12/15/20 nS (max.) Low-power consumption: − Active: 400mW (typ.) Single +5V power supply Fully static operation • • • All inputs and outputs directly TTL compatible Three-state outputs Available packages: 28-pin 300 mil SOJ and skinny DIP • • PIN CONFIGURATION BLOCK DIAGRAM VDD VSS A0 . . A12 NC A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD WE CS2 DECODER CORE C O RE ARRAY CS2 A8 A9 A11 OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 CS1 OE WE CONTROL DATA I/O I/O1 . . I/O8 PIN DESCRIPTION SYMBOL A0−A12 I/O1−I/O8 CS1 , CS2 WE OE VDD VSS NC DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Inputs Write Enable Input Output Enable Input Power Supply Ground No Connection -1- Publication Release Date: October 1995 Revision A6 W2465A DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +7.0 -0.5 to VDD +0.5 1.0 -65 to +150 0 to +70 UNIT V V W °C °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. TRUTH TABLE CS1 H X L L L CS2 X L H H H OE X X H L X WE X X H H L MODE Not Selected Not Selected Output Disable Read Write I/O1−I/O8 High Z High Z High Z Data Out Data In VDD CURRENT ISB, ISB1 ISB, ISB1 IDD IDD IDD OPERATING CHARACTERISTICS (VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C) PARAMETER Input Low Voltage Input High Voltage Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Operating Power Supply Current SYM. VIL VIH ILI ILO TEST CONDITIONS VIN = VSS to VDD VI/O = VSS to VDD, CS1 = VIH or CS2 = VIL or OE = VIH or WE = VIL IOL = +8.0 mA IOH = -4.0 mA 12 CS1 = VIL CS2 = VIH I/O = 0 mA Cycle = MIN Duty = 100% 15 20 MIN. -0.5 +2.2 -10 -10 TYP. - MAX. +0.8 VDD +0.5 +10 +10 UNIT V V µA µA VOL VOH IDD 2.4 - - 0.4 180 150 120 30 V V mA mA mA mA Standby Power Supply Current ISB CS1 = VIH or CS2 = VIL Cycle = MIN Duty = 100% CS1 ≥ VDD -0.2V or CS2 ≤ 0.2V ISB1 - - 5 mA Note: Typical characteristics are at VDD = 5V, TA = 25° C. -2- W2465A CAPACITANCE (VDD = 5V, TA = 25° C, f = 1 MHz) PARAMETER Input Capacitance Input/Output Capacitance SYM. CIN CI/O CONDITIONS VIN = 0V VOUT = 0V MAX. 8 10 UNIT pF pF Note: These parameters are sampled but not 100% tested. AC TEST CONDITIONS PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output Load 0V to 3V 5 nS 1.5V CL = 30 pF, IOH/IOL = -4 mA/8 mA CONDITIONS AC TEST LOADS AND WAVEFORM R1 480 ohm R1 480 ohm 5V OUTPUT 30 pF Including Jig and Scope R2 255 ohm 5V OUTPUT 5 pF Including Jig and Scope R2 255 ohm (For TCLZ1, TCLZ2, TOLZ, TCHZ1, TCHZ2, TOHZ, TWHZ, TOW ) 3.0V 90% 10% 5 nS 10% 90% 0V 5 nS -3- Publication Release Date: October 1995 Revision A6 W2465A AC CHARACTERISTICS (VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C) Read Cycle PARAMETER SYM. W2465A-12 MIN. Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Selection to Output in Low Z CS1 CS1 W2465A-15 MIN. 15 3 3 0 3 MAX. 15 15 15 7 7 7 7 - W2465A-20 MIN. 20 3 3 0 3 MAX. 20 20 20 10 10 10 10 - UNIT MAX. 12 12 12 6 6 6 6 - TRC TAA TACS1 TACS2 TAOE TCLZ1* TCLZ2* TOLZ* TCHZ1* TCHZ2* TOHZ* TOH 12 3 3 0 3 nS nS nS nS nS nS nS nS nS nS nS nS CS2 CS2 Output Enable to Output in Low Z Chip Deselection to Output in High Z CS1 CS2 Output Disable to Output in High Z Output Hold from Address Change * These parameters are sampled but not 100% tested. Write Cycle PARAMETER SYM. W2465A-12 MIN. Write Cycle Time Chip Selection to End of Write Address Valid to End of Write Address Setup Time Write Pulse Width Write Recovery Time CS1 , WE CS1 W2465A-15 MIN. 15 13 13 13 0 10 0 0 9 0 0 MAX. 8 8 - W2465A-20 MIN. 20 17 17 17 0 12 0 0 10 0 0 MAX. 10 10 - UNIT MAX. 7 7 - TWC TCW1 TCW2 TAW TAS TWP TWR1 TWR2 TDW TDH TWHZ* TOHZ* TOW 12 10 10 10 0 10 0 0 7 0 0 nS nS nS nS nS nS nS nS nS nS nS nS nS CS2 CS2 Data Valid to End of Write Data Hold from End of Write Write to Output in High Z Output Disable to Output in High Z Output Active from End of Write * These parameters are sampled but not 100% tested. -4- W2465A TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TOH D OUT TAA TOH Read Cycle 2 (Chip Select Controlled) CS1 TACS1 TCHZ1 CS2 TACS2 TCHZ2 TCLZ1 D OUT TCLZ2 Read Cycle 3 (Output Enable Controlled) TRC Address TAA OE TAOE TOH CS1 TOLZ TACS1 TCLZ1 TCHZ1 CS2 TACS2 TCLZ2 TCHZ2 TOHZ DOUT -5- Publication Release Date: October 1995 Revision A6 W2465A Timing Waveforms, continued Write Cycle 1 ( OE Clock) TWC Address TWR1 OE TCW1 CS1 CS2 TAW TCW2 TWR2 TWP WE TAS TOHZ (1, 4) TDW TDH DOUT D IN Write Cycle 2 ( OE = VIL Fixed) T WC Address TCW1 CS1 TWR1 CS2 TAW WE TAS TCW2 TWR2 T WP TWHZ(1, 4) TOH TOW (2) (3) DOUT TDW D IN TDH Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. -6- W2465A ORDERING INFORMATION PART NO. W2465AK-12 W2465AK-15 W2465AK-20 W2465AJ-12 W2465AJ-15 W2465AJ-20 ACCESS TIME (nS) 12 15 20 12 15 20 OPERATING CURRENT Max. (mA) 180 150 120 180 150 120 STANDBY CURRENT Max. (mA) 5 5 5 5 5 5 PACKAGE 300 mil skinny 300 mil skinny 300 mil skinny 300 mil SOJ 300 mil SOJ 300 mil SOJ Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. -7- Publication Release Date: October 1995 Revision A6 W2465A PACKAGE DIMENSIONS 28-pin P-DIP Skinny Symbol Dimension in Inches Dimension in mm Min. Nom. 0.010 0.125 0.016 0.058 0.008 0.130 0.018 0.060 0.010 1.388 0.300 0.283 0.090 0.120 0° 0.330 0.350 0.310 0.288 0.100 0.130 Max. 0.175 Min. Nom. 0.25 Max. 4.45 D 28 15 E 1 A A1 A2 B B1 c D E E1 e1 L a 0.135 0.022 0.064 0.014 1.400 0.320 0.293 0.110 0.140 15° 0.370 0.055 3.18 0.41 1.47 0.20 3.30 0.46 1.52 0.25 35.26 3.43 0.56 1.63 0.36 35.56 8.13 7.44 2.79 3.56 15° 7.62 7.19 2.29 3.05 0° 8.38 7.87 7.32 2.54 3.30 1 14 eA S Notes: 8.89 9.40 1.40 S 2 E c 1 AA L B B1 e1 A Base Plane Mounting Plane 1. Dimension D Max. & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimension D & E1 include mold mismatch and are determined at the mold parting line. 4. Dimension B1 does not include dambar protrusion/intrusion. 5. Controlling dimension: Inches. 6. General appearance spec. should be based on final visual inspection spec. a eA 28-pin Small Outline J Band Symbol Dimension in Inches Dimension in mm 3.56 0.69 Min. Nom. Max. Min. Nom. Max. 0.140 0.027 0.095 0.026 0.016 0.008 0.100 0.028 0.018 0.010 0.710 0.295 0.044 0.245 0.327 0.077 0.300 0.050 0.265 0.337 0.087 0.105 0.032 0.022 0.014 0.730 0.305 0.056 0.285 0.347 0.097 0.045 0.004 0 10 0 7.49 1.12 6.22 8.31 1.96 28 15 E H E 1 14 A A1 A2 b1 b c D E e e1 HE L S y 0 Notes: 2.41 0.66 0.41 0.20 2.54 0.71 0.46 0.25 18.03 7.62 1.27 6.73 8.56 2.21 2.67 0.81 0.56 0.36 18.54 7.75 1.42 7.24 8.81 2.46 1.14 0.10 10 D c A L 0 e1 y 2 A s Seating Plane b b1 e 1 A 1. Dimension D Max. & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimension D & E include mold mismatch and are determined at the mold parting line. 4. Controlling dimension: Inches. 5. General appearance spec. should be based on final visual inspection spec. -8- W2465A Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792647 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. -9- Publication Release Date: October 1995 Revision A6