W91511DLNF

Preliminary W91510DN SERIES TONE/PULSE DIALER WITH RTC AND LCD DISPLAY FUNCTIONS GENERAL DESCRIPTION The W91510DN series ICs are Si-gate CMOS IC that provide the signals needed for either pulse or tone dialing. They feature a 12/16-digit LCD driver for displaying telephone numbers and calling time. A real time clock is included to display the time of day. The W91510DN series is fabricated using CMOS technology and thus provide good performance in low voltage, low power applications. FEATURES • One by 32 digits for redial • Uses 5 × 6 keyboard • Pause, pulse-to-tone (*/T) can be stored as a digit in memory • Flash can be stored as a digit in memory when in store mode • Minimum tone output duration: 87 mS • Minimum intertone pause: 87 mS • Tone/pulse mode pin selectable • Make/break ratio pin selectable • Dialing rate: 10 ppS • Pause time: 3.6 Sec. • Flash break time (73 mS, 100 mS, 300 mS or 600 mS) selectable by keypad • Built-in 12 or 16-digit LCD driver (1/4 duty, 1/3 bias) selectable by mask option • Built-in calling timer from [00:00] to [59:59] • On-chip power-on reset and clear LCD • Uses 3.579545 MHz TV quartz crystal or ceramic resonator • Uses 32768 Hz crystal as RTC frequency base • Packaged in 64-pin plastic QFP with RTC • Switchable 24-hour clock or 12-hour clock with p.m. mode by keypad • 0 or 9 dialing inhibition pin for PABX systems or long distance dialing lock out • On hook debounce: 150 mS in normal mode and 20 mS in lock mode • Off-hook delay 300 mS in lock mode ( DP will keep low for 300 mS while off hook except the first off hook after power on reset that DP will keep high for 100 mS then go low for 200 mS) • First key-in delay: 300 mS in lock mode • Mixed dialing allowed -1- Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES • The functions of the different dialers in the W91560DN series are shown in following table: TYPE NO. W91510DNF W91511DLNF W91512DNF W91513DLNF W91510DNH* W91512DNH* LCD DIGITS 16 16 12 12 16 12 LOCK − HOLD Yes − PAUSE TIME 3.6 Sec. Yes − Yes − Yes Yes Yes Yes Yes 3.6 Sec. * Chip form package. PIN CONFIGURATION W91510DNF Series 64 1 20 -2- Preliminary W91510DN SERIES PIN DESCRIPTION SYMBOL Row, Column Inputs PIN NO. 18−21, 13−17 I/O I FUNCTION The keyboard inputs may be used with either the standard 5 × 6 keyboard, an inexpensive single contact (form A) keyboard or electronic input. A valid key entry is defined by a single row being connected to a single column. XT1, XT1 22, 23 I, O A built-in inverter provides oscillation with an inexpensive 3.579545 MHz crystal or ceramic resonater. The oscillator ceases when a keypad input is not sensed after chip enable and dialing finished. The crystal frequency deviation is ±0.02%. T/P MUTE 8 O The T/P MUTE is a conventional CMOS N-channel open drain output. The output transistor is switched on low level during dialing sequence (both pulse and tone mode), one-key redial break and flash break. Otherwise, it is switched off. The H/P MUTE is a conventional CMOS inverter output, During pulse dialing, one-key redial break, flash break and hold functions, this pin will output an active high. It remains in a low state at all other times. I The LOCK pin is used to prevent "0" or "9" dialing under PABX system long distance call control. When the first key input after reset is "0" or "9", all the key inputs, including "0" or "9" key, become invalid, and the chip generates no output. The telephone is reinitialized by a reset. The following table describes the functions of the LOCK pin: LOCK PIN VDD Floating VSS FUNCTION "0", "9" dialing inhibited Normal dialing "0" dialing inhibited H/P MUTE 9 ( W91510DNF, W91512DNF, only ) O LOCK 9 (W91511DLNF, W91513DLNF only) HKS 24 I Hook switch input. HKS = VDD or floating: On-hook state. Chip in sleeping mode, no operation. HKS = VSS: Off-hook state. Chip enable for normal operation. HKS pin is pulled to VDD by internal resistor. -3- Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Pin Description, continued SYMBOL HFI , HFO PIN NO. 25, 10 I/O I, O FUNCTION Handfree control pins. A low pulse on the HFI input pin toggles the handfree control state. Status of the handfree control is listed in the following table: CURRENT STATE Hook SW. HFO Low On Hook Off Hook On Hook Off Hook Off Hook Low High High High Input HFI HFI HFI Off Hook On Hook On Hook NEXT STATE HFO High Low Low Low Low High Dialing Yes No Yes Yes No Yes HFI pin is pulled to VDD by internal resistor. Detailed timing diagrams are shown in Figure 4(a), 4(b). 11 O This pin is a CMOS N-channel open drain output. Flash key will cause DP to go active in either pulse mode or tone mode. In lock mode, the DP keeps low for 300 mS during off-hook delay time. The timing diagram is shown as Figure 1(a), 1(b), 1(c), 1(d). In pulse mode, this pin remains in low state at all time. In tone mode, it will output a dual or single tone. Detailed timing diagram for tone mode is shown in Figure 2(a), 2(b), 2(c), 2(d). OUTPUT FREQUENCY Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 - 0.52 - 0.47 +0.74 +0.57 - 0.30 - 0.34 DP / C6 DTMF 6 O VLCD CP, CN 29 31, 32 O I Power supply pin for LCD driver. A 0.1 µF capacitor is connected between VLCD and VSS. CP is the voltage control capacitor positive pin. CN is the voltage control capacitor negative pin. A 0.1 µF capacitor is connected between these two pins. -4- Preliminary W91510DN SERIES Pin Description, continued SYMBOL COM1 to COM4 SEG1 to SEG32 XT2, XT2 VRTC1, VRTC2 VDD, VSS MODE PIN NO. 33−36 37−64, 1−4 26, 27 28, 30 5, 7 12 I/O O O I, O I I I FUNCTION COM1 to COM4 are the common signal output terminal for the 1/4 duty LCD. SEG1 to SEG32 are the 16-digit segment signal outputs. A quartz crystal oscillator provides an RTC frequency time base of 32.768 KHz. Either VRTC1 should be connected to a 1.5V battery, and VRTC2 should be connected a capacitor 0.1 µF to ground. Power input pins. Pulling mode pin to VSS places the dialer in tone mode. Pulling mode pin to VDD places the dialer in pulse mode (10 ppS, M/B = 1/2). Leaving mode pin floating places the dialer in pulse mode (10 ppS, M/B = 2/3). BLOCK DIAGRAM VDD VSS XT2 XT2 XT1 XT1 REAL TIME CLOCK GENERATOR SYSTEM CLOCK GENERATOR HKS HFI CONTROL LOGIC ROW (R1 ~ R4) KEYBOARD INTERFACE COLUMN (C1 ~ C5) LOCATION LATCH RAM PULSE/ TONE CONTROL LOGIC H/P MUTE T/P MUTE DP HFO READ/WRITE COUNTER LOCK MODE DTMF D/A CONVERTER ROW & COLUMN PROGRAMMABLE COUNTER DATA LATCH & DECODER V LCD V RTC1 V RTC2 BACKPLANE SIGNAL GENERATOR SEGMENT OUTPUT DECODER CP CN COM1 COM2 COM3 COM4 L.C.D. -5- Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES FUNCTIONAL DESCRIPTION Keyboard Operation C1 1 4 7 */T F1 • • • • • • C2 2 5 8 0 F2 C3 3 6 9 # F3 C4 C5 DP / C6 HOLD1 F4 CHK R/P OKR RTC/HOUR TIM/MIN HOLD2 APSET SET R1 R2 R3 R4 Vx */T: * in tone mode and P→T in pulse mode F1, F2, F3, F4: Flash keys R/P: Redial and pause function key OKR: One-key redial function RTC: Real time clock toggle key TIM: a. Display last calling time b. Start and/or stop counting up calling time HOUR and MIN: Adjusting time setting keys HOLD1, HOLD2: Hold function keys APSET: Toggle to set RTC display mode SET: Toggle the RTC set function on/off. CHK: a. Check dialing number b. Check dialing time Note: D1, ..., Dn, D1', ..., Dn': 0, ..., 9, ∗ /T, # • • • • • Normal Dialing OFF HOOK (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn 1. D1, D2, ..., Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. Redialing 1. OFF HOOK Number Store ON HOOK & (or ), ON HOOK D3 , ..., ), & Dn R/P HFI ¡õ ), D1 , D2 , , Check Memory OFF HOOK (or (or , Busy, Come ON HOOK HFI ¡õ -6- Preliminary W91510DN SERIES a. The R/P key can execute the redial function only as the first key-in after off-hook; otherwise, it will invoke pause function. b. The redial memory content will be D3, …, Dn. c. Redial memory can be checked in memory check mode. ( CHK , R/P ) d. If redialing length oversteps 32 digits, the redialing function will be inhibited. 2. OFF HOOK (or ON HOOK D1 to Dn & HFI ¡õ ), D1 , D2 OKR , ..., Dn , Busy, OKR a. If the dialing of is finished, pressing the key will cause the pulse output pin to go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added. b. If the pulses of the dialed digits D1 to Dn have not finished, OKR will be ignored. c. The one-key redialing function timing diagram is shown in Figure 3. Access Pause OFF HOOK , (or ON HOOK ON HOOK & , HFI ¡õ ), D1 (or , D2 , R/P , D3 , ..., ), Dn R/P Busy, Come OFF HOOK ON HOOK & HFI ¡õ 1. The first R/P functions as a pause key and the second as a first key-in redial key. 2. The pause function can be stored in memory. 3. The pause function is executed in normal dialing, redialing, or memory dialing. 4. The pause duration time is 3.6 Sec. 5. The pause function timing diagram is shown in Figure 5 Pulse- to-tone (*/T) OFF HOOK , D2' , ..., (or Dn' ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , ∗/T , D1' 1. If the mode switch is set to pulse mode, then the output signal will be: D1, D2, …, Dn, Pause (3.6 sec), D1', D2', …, Dn' (Pulse) (Tone) 2. If the mode switch is set to tone mode, then the output signal will be: D1, D2, …, Dn, *, D1', D2', …, Dn' (Tone) (Tone) 3. The dialer remains in tone mode after the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. The pulse-to-tone function timing diagram is shown in Figure 6(a), 6(b). Publication Release Date: May 1997 Revision A2 -7- Preliminary W91510DN SERIES Flash (F = F1, F2, F3, F4) OFF HOOK (or ON HOOK & HFI ¡õ ), F 1. The dialer will execute flash break time of 600 mS(F1), 300 mS(F2), 73 mS(F3) or 100 mS(F4) and pause time of 1S before the next digit (except flash key) is dialed out. 2. The system will return to the initial state after flash break time is finished. 3. Keyboard functions are inhibited during flash break is being executed. 4. The flash timing daigram is shown in Figure 7. Hold Key OFF HOOK (or ON HOOK & HFI ¡õ ), HOLD1 (or HOLD2 ) 1.The hold function is toggled on and off by HOLD1 or HOLD2 key. When the hold function is toggled on, the hold mark (dot of digit_4) will be lit and all key-in (except hold keys and icon keys) will be ignored. 2. The following are examples of hold function toggled on and off: a. b. c. d. OFF HOOK OFF HOOK OFF HOOK ON HOOK , , , HOLD1 HOLD1 HOLD1 (or (or (or , HOLD2 HOLD2 HOLD2 HOLD1 (or ), ), ), HOLD1 HFI ¡õ ON HOOK HOLD2 ), , HFI ¡õ (or HOLD2 ) & HFI ¡õ HFI ¡õ 3. HOLD1 and HOLD2 have the same function in off-hook state. The difference between HOLD1 and HOLD2 are shown as follows: a. If OFF HOOK , HOLD1 (or HOLD2 ), ON HOOK , HOLD1 is entered, then the dialer will be off-line. If OFF HOOK , HOLD1 (or HOLD2 ), ON HOOK , HOLD2 is entered, then the dialer will stay at hold function. b. If ON HOOK & HFI ¡õ , HOLD1 (or HOLD2 ), HOLD1 is entered, then the dialer will be off- line. c. If ON HOOK & HFI ¡õ , HOLD1 (or HOLD2 ), and HOLD2 is entered, then the dialer will stay at hold function. 4. The function timing diagram is shown in Figure 8(a), 8(b), 8(c). Adjusting Time Setting OFF HOOK (or (or ) -8ON HOOK & HFI ¡õ ), SET , HOUR , MIN , SET ON HOOK Preliminary W91510DN SERIES 1. Only HOUR and MIN keys are valid in RTC set mode. 2. Hours and minutes count forward as long as HOUR or MIN key is pressed. 3. The on/off function of SET is tolggled, and the dialer will be initialized after toggle SET key. 4. If the dialing sequence D1, D2, ..., Dn (including flash and pause) has not finished, SET will be ignored. RTC Display Mode OFF HOOK (or ON HOOK & HFI ¡õ ), RTC 1.The real time clock display mode can be toggled on and off by RTC key. 2. The icon display will not be changed when enter RTC display mode and set RTC mode. APSET 1. In the off-hook state, pressing APSET key to toggle the RTC function in 24-hour clock mode or 12hour clock with p.m. mode. 2. The default mode is 12-hour clock with p.m. mode after power on. Check Key OFF HOOK (or ON HOOK & HFI ¡õ ), CHK , R/P R/P or OKR is key in. The redial content will be displayed on the LCD when either TIM OFF HOOK or (or ON HOOK ), & HFI ¡õ ), D1 , D2 , ..., Dn (or Redialing Repertory dialing CONVERSATION 1. If no key is pressed after dialing finish, the LCD will display counting time after 6 seconds. 2. If the dialing sequence D1, D2, ..., Dn has not finished, TIM will be ignored. 3. The timer will be initialized by flash and toggle SET key. -9- Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES ABSOLUTION MAXIMUM RATINGS PARAMETER DC Supply Voltage Input/Output Voltage SYMBOL VDD−VSS VIL VIH VOL VOH Power Dissipation Operating Temperature Storage Temperature PD TOPR TSTG RATING -0.3 to +7.0 VSS −0.3 VDD +0.3 VSS −0.3 VDD +0.3 120 -0.5 to +70 -55 to +125 mW °C °C V UNIT V Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (VDD−VSS = 2.5V. FOSC = 3.58 MHz, TA = 25° C, all outputs unloaded.) PARAMETER Operating Voltage Operating Current Standby Current Memory Retention Current SYMBOL VDD IOP ISB IMR CONDITIONS Tone, Unloaded Pulse, Unloaded HKS = 0, Unloaded and no key entry HKS = 1 VDD = 1.0V Row group RL = 10 KΩ Col/Row VDD = 2.0 to 5.5V MIN. 2.0 - TYP. 0.5 0.4 - MAX. 5.5 0.7 0.5 15 0.5 UNIT V mA µA µA mVrms dB dB V mA mA Tone Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level DTMF Output Sink Current DP Output Sink Current VTO 130 1.0 0.2 0.5 150 2 -30 - 170 3 -23 3.0 - THD VTDC ITL IPL RL = 10 KΩ VDD = 2.0 to 5.5V VDD = 2.0 to 5.5V VTO = 0.5V VPO = 0.5V - 10 - Preliminary W91510DN SERIES DC characteristics, continued PARAMETER Common Output Voltage Common Output Current SYM. VCH VCL ICH ICL CONDITIONS VTMO = 0.5V VHMO = 2.0V VHMO = 0.5V VI = 0V VI = 2.5V - MIN. 4.2 -20 20 4.2 -5 5 2.4 0.8 VDD 0.5 0.5 0.5 4 200 100 - TYP. 4.5 0 4.5 0 2.6 1.5 500 MAX. 4.8 0.3 4.8 0.3 1.7 100 VDD 0.2 VDD 5 - UNIT V µA V µA Vrms mV V V mA mA mA µA µA KΩ KΩ KΩ Segment Output Voltage Segment Output Current VSH VSL ISH ISL RMS Voltage Across a Segment Average DC Offset Voltage HFI High Voltage HFI Low Voltage VON VOFF VDC VHFIH VHFIL ITML IHMH IHML IKD IKS RK RIH RHK T/P MUTE Output Sink Current H/P MUTE Output Drive Current H/P MUTE Output Sink Current Keypad Input Drive Current Keypad Input Sink Current Keypad Resistance Control Input Pull-up/Down Resistor HKS Input Pull-high Resistor - 11 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES AC CHARACTERISTICS (VDD−VSS = 2.5V, FOSC. = 3.58 MHz, TA = 25°C, all outputs unloaded.) PARAMETER Key-in Debounce Key Release Debounce Off-hook Delay Time First Key-in Delay Time On-hook Debounce Time Pulse Mute Delay Pre-digit-Pause 10 ppS Inter-digit Pause (Auto Dialing) Make/Break Ratio Tone Output Duration Inter-tone Pause Flash Break Time SYMBOL TKID TKRD TOFD TFKD TOHD TMD TPDP TIDP M:B TTD TITP CONDITIONS Unlock Lock Mode = VDD Mode = Floating Mode = VDD Mode = Floating 10 ppS Mode = VDD Mode = Floating F1 MIN. - TYP. 20 20 300 300 150 20 40 33.3 40 33.3 800 40:60 33:67 87 87 600 300 73 100 1 3.6 2.2 0.6 32 MAX. - UNIT mS mS mS mS mS mS mS mS % mS mS mS TFB F2 F3 F4 Flash Pause Time Pause Time One Key Redialing Break Time One Key Redialing Pause Time LCD Frame Frequency TFP TP TRB TRP FLCD F1, F2, F3,F4 R/P - S S S Hz - 12 - Preliminary W91510DN SERIES RTC DC CHARACTERISTICS (VRTC = 1.5V, VSS = 0V, FOSC. = 32.768 KHz , TA = 25° C, all outputs unloaded.) PARAMETER Supply Voltage Supply Current OSC. Starting Time OSC. Output Built-in Cap. OSC. in Trimmer Cap. Frequency Stability Notes : SYMBOL VRTC IRTC TOSC CO CTRIM ∆f/f CONDITIONS No Load Cl = 12.5 pF VDD−VSS = 1.3 to 1.6V MIN. 1.2 5 - TYP. 1.5 2.0 25 - MAX. 1.8 4.0 3 35 1 UNIT V µA S pF pF ppM 1. Crystal parameters suggested for proper operation are Rs < 100 ohms, Lm = 96 mH , Cm = 0.02 pF , Cn = 5 pF , Cl = 18 pF, and Fosc. = 3.579545 MHz ±0.02% 2. Crystal oscillator accuracy directly affects these times. TIMING WAVEFORMS HKS KEY IN DP T/P MUTE < 600 mS < 300 mS TKRD 4 2 MB MB 3 TKID 2 TKID TIDP TIDP TPDP TMD TIDP TPDP TIDP H/P MUTE TKD DTMF OSC. OSCILLATION Low OSCILLATION Figure 1(a). Normal Dialing Timing Diagram (Pulse Mode without Lock Function) - 13 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Timing Waveforms, continued < 600 mS HKS < 300 mS T KRD 4 T KID MB KEY IN DP T/P MUTE H/P MUTE DTMF OSC. 3 T OFD 2 MB 2 TKID TPDP TFKD T IDP T IDP T PDP T IDP T MD TMD Low OSCILLATION TKD OSCILLATION Figure 1(b). Normal Dialing Timing Diagram (Pulse Mode with Lock Function) HKS KEY IN DP T/P MUTE < 600 mS TKRD R/P TKID MB MB T PDP TIDP T IDP T IDP T MD H/P MUTE T MD DTMF OSC. Low OSCILLATION Figure 1(c). Auto Dialing Timing Diagram (Pulse Mode Without Lock Function) - 14 - Preliminary W91510DN SERIES Timing Waveforms, continued HKS KEY IN DP T/P MUTE H/P MUTE DTMF OSC. < 600 mS < 3 00 mS R/P TKID MB MB TOFD TPDP TFKD TIDP TIDP TIDP TMD TMD Low OSCILLATION Figure 1(d). Auto Dialing Timing Diagram (Pulse Mode with Lock Function) HKS KEY IN DTMF < 600 mS < 300 mS T KRD 4 2 5 2 TKID TITP T KRD 3 TKID TTD T/P MUTE H/P MUTE DP OSC. TITP TITP TITP Low High OSCILLATION OSCILLATION OSCILLATION Figure 2(a). Normal Dialing Timing Diagram (Tone Mode Without Lock Function) - 15 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Timing Waveforms, continued HKS KEY IN DTMF < 600 mS < 300 mS T KRD 4 T KD TTD TITP TITP 2 5 2 T KID TITP 3 T/P MUTE H/P MUTE TOFD TFKD Low DP OSC. OSCILLATION OSCILLATION Figure 2(b). Normal Dialing Timing Diagram (Tone Mode with Lock Function) HKS KEY IN DTMF < 600 mS T KRD R/P T KID TTD T/P MUTE H/P MUTE Low TITP TITP DP OSC. High TOHD OSCILLATION Figure 2(c). Auto Dialing Timing Diagram (Tone Mode Without Lock Function) - 16 - Preliminary W91510DN SERIES Timing Waveforms, continued < 600 mS HKS T KRD KEY IN DTMF TTD T/P MUTE H/P MUTE DP OSC. 300 mS R/P TKD TITP TITP T FKD Low T OFD TOHD OSCILLATION Figure 2(d). Auto Dialing Timing Diagram (Tone Mode with Lock Function) HKS < 600 mS KEY IN DP OKR 300 mS MB OKR TKID TRB T PDP TFKD TMD TRP MB T IDP TPDP TOFD T/P MUTE H/P MUTE TIDP DTMF OSC. Low OSCILLATION Figure 3. One-key Redial Timing Diagram - 17 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Timing Waveforms, continued HKS HFI HFO T/P MUTE H/P MUTE DP OSC. TOFD TFKD TOHD OSC. OSC. High Low TOHD OSC. Figure 4(a). Handfree Timing Diagram (with Lock Function) HKS HFI HFO T/P MUTE H/P MUTE DP TOHD High Low High TOHD OSC. Figure 4(b). Handfree Timing Diagram (Without Lock Function) - 18 - Preliminary W91510DN SERIES Timing Waveforms, continued HKS KEY IN DP T/P MUTE < 600mS 300mS 2 R/P 3 TOFD TKID MB MB TIDP TPDP TP TMD TMD TPDP H/P MUTE DTMF OSC. TFKD OSCILLATION Low OSCILLATION Figure 5. Pause Function Timing Diagram (Pulse Mode) HKS KEY IN DP T/P MUTE < 600mS 300mS TOFD 2 TKID MB */T 3 TPDP TP TIDP H/P MUTE TMD DTMF OSC. TFKD OSCILLATION TITP OSCILLATION Figure 6(a). Pulse-to-tone Timing Diagram - 19 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Timing Waveforms, continued HKS Low KEY IN F TKID F F TFB TFP TKID 3 TKID DP T/P MUTE HPM MUTE DTMF TITP OSC. OSCILLATION Figure 7. First Priority Flash Timing Diagram HKS HFI HOLD KEY HFO T/P MUTE H/P MUTE CHIP ENBLE OFF HOOK ON HOOK High Low Figure 8(a). Hold and Handfree Timing Diagram Note: The HOLD KEY cannot be enabled when chip is disabled. - 20 - Preliminary W91510DN SERIES Timing Waveforms, continued HKS HFI HOLD KEY HFO OFF HOOK T/P MUTE H/P MUTE CHIP ENBLE High Figure 8(b). Hold and Handfree Timing Diagram Note: The HFI and HOLD KEY inputs will toggle the HFO signal; as soon as either HFI or HOLD KEY is activated, the HFO signal will go high and previous activate inputs will be ignored. HKS HFI HOLD1 KEY HFO ON HOOK T/P MUTE H/P MUTE High CHIP ENBLE Figure 8(c). Hold and Handfree Timing Diagram Note: Changing the state of the HKS signal from high to low will initialize the HFO and H/P MUTE signals. - 21 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES LCD DISPLAY FORMAT A. Normal Dialing ; Off hook or press "HFI" switch (Here tone mode was selected). Blinking ; dial" 0123456789123456" ; and "78" B. Redialing, One touch dialing ; Off hook or press "HFI" switch (Here tone mode was selected). Blinking ; Press "R/P" or "OKR" key (Redial = "8123456789") - 22 - Preliminary W91510DN SERIES C. Redial memory Check ; Off-hook or press "HFI" switch (M1= "886P35P770066PP7126", and here pulse mode was selected) Blinking ; Press "CHK" key ; Press "R/P" or "OKR" key (Display 1 to 16 digits) Blinking ; Press "any key" (Display 17 to 19 digits) D. Timer Function a. ; Off-hook or press "HFI" switch (Here pulse mode was selected) Blinking ; Press "CHK" key (Display last calling time) - 23 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES ; Dial "9375607" ; If "9375607" is dialed comlepted, the system will start timer after 6 seconds (Timer will start counting up) ; Press "TIM" key (Timer will stop) b. ; Off-hook or press "HFI" switch (here pulse mode was selected) Blinking ; Dial "9375607" ; If "9375607" is dialed completed press "TIM" key (Timer will start counting up) - 24 - Preliminary W91510DN SERIES ; Press "F1", "F2", "F3" or "F4" key (The timer will stop and LCD will display a flash mark and flash pattern) ; After flash break is executed Blinking ; After flash pause is executed Blinking E. RTC Setting Function ; On-hook (Display real time) ; Off-hook, before press "SET" key (Here tone mode was selected) Blinking ; Entering "Setting Mode" (Press "SET" key) - 25 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES ; Adjusting "Hour" (Press "HOUR" key) (Hour counts forward as long as pressing) Blinking ; Adjusting "Minute" (Press "MIN" key) (Minute counts forward as long as pressing) ; On-hook or press "SET" key (Toggle) (Here on-hook was selected) LCD PATTERN FOR DATA 1 2 3 4 5 6 7 8 9 0 * # PT P E CHECK F LOCK - 26 - Preliminary W91510DN SERIES Icon1 Icon2 Icon3 Icon4 Icon5 Icon6 Icon7 Notes: Icon1: Pause Icon2: The icon will be blinking after power on. Icon3: Flash Icon4: Hold Icon5: Handfree Icon6: Timer Icon7: Tone 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 (SEG) C O M 4 C O M 3 C O M 2 C O M 1 (COM) - 27 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Bonding Pad Diagram 1 2 3 4 5 6 7 8 9S-1 9S-2 10 11 12 13 14 15 16 17 18 19 64 63 62 61 60 59 5 57 56 5554 53 52 8 51 50 49 48 47 46 45 44 43 (0, 0) 42 41 40 39 38 37 36 35 34 33 20 21 22 23 24 25 26 27 28 29 30 31 32 Notes: 1. The substrate must be connected to VSS. 2. The chip size is 2940 × 3630 µ m2 - 28 - Preliminary W91510DN SERIES Pad List PAD NO. 1 2 3 4 5 6 7 8 9S-1 9S-2 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PAD NAME SEG29 SEG30 SEG31 SEG32 VDD DTMF VSS T/P MUT E H/P MUTE LOCK HFO PIN # 1 2 3 4 5 6 7 8 9* 9* 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 X -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1335.00 -1080.40 -841.70 -598.40 -453.20 -307.90 -167.90 24.20 188.80 326.30 488.50 636.30 798.50 946.30 Y 1430.70 1294.50 1158.50 1022.30 883.40 665.20 515.50 373.50 229.30 88.20 -49.80 -191.80 -327.80 -467.80 -627.20 -769.20 -928.60 -1070.60 -1226.40 -1368.40 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 -1679.90 PAD NO. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 PAD NAME OCM1 COM2 COM3 COM4 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 PIN # 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 X 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 1335.00 941.30 749.00 534.80 398.60 262.60 126.40 -9.60 -145.80 -281.80 -418.00 -554.00 -757.70 -932.00 Y -1307.90 -1166.10 -1024.30 -882.50 -746.30 -607.50 -471.30 -335.30 -199.10 -63.00 73.00 209.20 345.20 481.40 617.40 753.60 889.60 1102.10 1270.80 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 1657.50 DP / C6 MODE COL1 COL2 COL3 COL4 COL5 ROW1 ROW2 ROW3 ROW4 XT1 XT1 HKS HFI XT2 X T2 VRTC1 VLCD VRTC2 CN CP Note: "*" is bonding option. - 29 - Publication Release Date: May 1997 Revision A2 Preliminary W91510DN SERIES Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. - 30 -