W91520AN

W91520N SERIES TONE/PULSE DIALER WITH HANDFREE AND HOLD FUNCTIONS GENERAL DESCRIPTION The W91520N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse dialing. The W91520N series provide one-key redial, handfree dialing, hold, save, and redial functions. FEATURES • • • • • • • • • • • • • • • DTMF/pulse switchable dialer Two by 32-digit redial and save memory Pulse-to-tone (*/T) keypad for long distance call operation Uses 5 × 5 keyboard Easy operation with redial, flash, pause, and */T keypads Pause, pulse-to-tone (*/T) can be stored as a digit in memory On-hook debounce time: 150 mS Dialing rate (10 ppS, or 20 ppS) selectable by bonding option Minimum tone output duration: 93 msec. Minimum intertone pause: 93 msec. Flash break time (73, 100, 300, 600 msec.) selectable by keypad; pause time is 1.0 sec. On-chip power-on reset Uses 3.579545 MHz crystal or ceramic resonator Packaged in 18 or 20-pin plastic DIP The different dialers in the W91520N series are shown in the following table: TYPE NO. W91520N W91521N W91520AN W91521AN REPLACEMENT TYPE NO. W91520 W91521 W91520A W91521A PULSE (ppS) 10 20 10 20 FLASH (mS) 600/100/300/73 600/100/300/73 600/100/300/73 600/100/300/73 M/B Pin Pin Pin Pin HANDFREE DIALING Yes Yes PACKAGE (PINS) 18 18 20 20 -1- Publication Release Date: May 1997 Revision A3 W91520N SERIES PIN CONFIGURATIONS C1 C1 C2 C3 C4 H/P MUTE VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF XT DP/C5 HKS T/P MUTE HFI C2 C3 C4 H/P MUTE VSS XT 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO W91520N/W91521N W91520AN/W91521AN PIN DESCRIPTION SYMBOL ColumnRow Inputs 18-PIN 1−4 & 15−18 7, 8 20-PIN 1−4 & 17−20 7, 8 I, O I I/O FUNCTION The keyboard inputs may be used with either a standard 5 × 5 keyboard or an inexpensive single contact (Form A) keyboard. Electronic input from a µC can also be used. A valid key-in is defined as a single row being connected to a single column. A built-in inverter provides oscillation with an inexpensive 3.579545 MHz crystal or ceramic resonator. The T/P MUTE is a conventional CMOS N-channel open drain output. The output transistor is switched on during dialing sequence, one-key redial break, and flash break time. Otherwise, it is switched off. MODE 13 15 I Pulling mode pin to VSS places the dialer in tone mode. Pulling mode pin to VDD places the dialer in pulse mode (10 ppS; 20 ppS for W91521N/521AN, M/B = 40:60). Floating mode pin places the dialer in pulse mode (10 ppS; 20 ppS for W91521N/521AN, M/B = 33.3:66.7). -2- XT, XT T/P MUTE 9 9 O W91520N SERIES Pin Description, continued SYMBOL HKS 18-PIN 10 20-PIN 12 I/O I Hook switch input. FUNCTION HKS = VDD: On-hook state. Chip in sleeping mode, no operation. HKS = VSS: Off-hook state. Chip is enabled for normal operation. HKS pin is pulled to VDD by internal resistor. DP / C5 11 13 O N-channel open drain dialing pulse output. Flash key will cause DP to be active in either tone mode or pulse mode. The timing diagram for pulse mode is shown in Figure 1(a, b, c). VDD, VSS H/P MUTE 14, 6 5 16, 6 5 I O Power input pins. The H/P MUTE is a conventional inverter output. During pulse dialing, flash break, one-key redial break, and hold period, this output is active high; otherwise, it remains in low state. In pulse mode, this pin remains in low state at all times. In the tone mode, it will output a dual or single tone. Detailed timing diagram for tone mode is shown in Figure 2(a, b, c). Output Frequency Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 DTMF 12 14 O -3- Publication Release Date: May 1997 Revision A3 W91520N SERIES Pin Description, continued SYMBOL HFI , HFO 18-PIN - 20-PIN 10, 11 I/O I, O FUNCTION Handfree control pins. The handfree control state is toggled on by a low pulse on the HFI input pin. The status of the handfree control state is described in the following table: CURRENT STATE Hook SW. HFO NEXT STATE Input HFO Dialing Low On Hook Off Hook On Hook Off Hook Off Hook Low High High High HFI HFI HFI Off Hook On Hook On Hook High Low Low Low Low High Yes No Yes Yes No Yes HFI pin is pulled to VDD by an internal resistor. Detailed timing diagrams are shown in Figure 3. BLOCK DIAGRAM XT XT SYSTEM CLOCK GENERATOR HKS HFI ROW (R1 to R4, Vx) KEYBOARD INTERFACE READ/WRITE COUNTER CONTROL LOGIC MODE H/P MUTE COLUMN (C1 to C4) LOCATION LATCH PULSE CONTROL LOGIC T/P MUTE RAM DP/C5 HFO DTMF D/A CONVERTER ROW & COLUMN PROGRAMMABLE COUNTER DATA LATCH & DECODER -4- W91520N SERIES FUNCTIONAL DESCRIPTION Keyboard Operation C1 1 4 7 ∗/T R/P2 • • • • • • C2 2 5 8 0 R C3 3 6 9 # F3 C4 SAVE F1 F2 R/P1 F4 DP / C5 R1 R2 H R R3 R4 VX R/P1, R/P2: Redial and pause function key; P1 is 3.6 sec. and P2 is 2.0 sec. ∗/T: ∗ in tone mode and P→T in pulse mode F1, ..., F4: Flash keys, flash break time of F1 = 600 mS, F2 = 100 mS, F3 = 300 mS, F4 = 73 mS H: Hold function key SAVE: Save function key R: One-key redial function Notes: D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, # R/P: R/P1 or R/P2. Fn: F1, ..., F4 Normal Dialing OFF HOOK (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn 1. D1, D2, ..., Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing. Redialing 1. OFF HOOK ON HOOK b. The R/P , (or ON HOOK (or & HFI ¡õ ON HOOK ), & D1 , D2 ), , ..., R/P Dn , Busy, Come OFF HOOK HFI ¡õ a. The redial memory content will be dialed out. key can execute the redial function only as the first key-in after off-hook; otherwise, it executes pause function. c. If redialing length exceeds 32 digits, the redialing function will be inhibited. 2. OFF HOOK (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , Busy, R a. The one-key redialing function timing diagram is shown in Figure 4. Publication Release Date: May 1997 Revision A3 -5- W91520N SERIES b. If the dialing of D1 to Dn is finished, pressing the R key will cause the pulse output pin to go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added. c. If the pulses of the dialed digits d. The redial function by e. The D1 to Dn have not finished, R will be ignored. R key has no break time (2.2 sec.) if it is the first key-in after off-hook. R/P1 or R/P2 key, R key uses the same redial buffer as the redial function by the and it is active during normal dialing or repertory dialing. Access Pause OFF HOOK (or ON HOOK & HFI ¡õ ), D1 , D2 , R/P , D3 , ..., Dn 1. The pause function is executed in normal dialing, redial dialing, or memory dialing. 2. The pause duration of 2.0 or 3.6 seconds per pause is selected by keypad, but only one pause time can be stored in memory 3. A detailed timing diagram for the pause function is shown in Figure 5. Pulse-to-tone (*/T) OFF HOOK , D2' , ..., (or Dn' ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , */T , D1' 1. If the mode switch is set to pulse mode, then the output signal will be: D1, D2, ..., Dn, Pause (2.0 sec. or 3.6 sec.), D1', D2', ..., Dn' (Pulse) D1, D2, ..., Dn, *, D1', D2', ..., Dn' (Tone) (Tone) 3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. The pulse-to-tone function timing diagram is shown in Figure 6. (Tone ) 2. If the mode switch is set to tone mode, then the output signal will be: Save OFF HOOK (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , SAVE 1. D1, D2, ..., Dn will be dialed out. 2. If the sequence of the dialed digits D1, D2, ..., Dn has not SAVE will be ignored; -6- W91520N SERIES finished, otherwise, D1, D2, ..., Dn will be duplicated to the save memory. Flash OFF HOOK (or ON HOOK & HFI ¡õ ), Fn 1. Fn = F1, ..., F4 2. The dialer will execute a flash break time of 600 mS (F1), 100 mS (F2), 300 mS (F3), or 73 mS (F4). In each case the flash pause time is 1.0 sec. before the next digit is dialed out. 3. Flash key cannot be stored as a digit in memory. The flash key has first priority among the keyboard functions. 4. The system will return to the initial state after the flash pause time is finished. 5. The flash function timing diagram is shown in Figure 7. HOLD OFF HOOK (or ON HOOK & HFI ¡õ ), H The HOLD is switched on and off by hold key. The other keypads will be disabled when in hold mode. The function timing diagram is shown in Figure 3(a, b, c). ABSOLUTE MAXIMUM RATINGS PARAMETER DC Supply Voltage Input/Output Voltage SYMBOL VDD−VSS VIL VIH VOL VOH Power Dissipation Operation Temperature Storage Temperature PD TOPR TSTG RATING -0.3 to +7.0 VSS -0.3 VDD +0.3 VSS -0.3 VDD +0.3 120 -20 to +70 -55 to +150 UNIT V V V V V mW °C °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. -7- Publication Release Date: May 1997 Revision A3 W91520N SERIES DC CHARACTERISTICS (VDD−VSS = 2.5V, FOSC. = 3.579545 MHz, TA = 25° C, all outputs unloaded) PARAMETER Operating Voltage Operating Current Standby Current Memory Retention Current DTMF Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level DTMF Output Sink Current DP Output Sink Current T/P MUTE Output Sink Current H/P MUTE Output Drive/Sink Current HFO Drive/Sink Current Keypad Input Drive Current Keypad Input Sink Current HKS I/P Pull-high Resistor Keypad Resistance SYMBOL VDD IOP ISB IMR VTO CONDITIONS Tone, Unloaded Pulse, Unloaded HKS = VSS, No load & No key entry HKS = VDD, VDD = 1.0V Row group, RL = 5 KΩ Col/Row, VDD = 2.0 to 5.5V MIN. TYP. 2.0 130 1 1.0 0.2 0.5 0.5 0.5 0.5 0.5 0.5 30 200 0.4 0.2 150 2 -30 400 300 - MAX. 5.5 0.6 0.4 15 0.2 170 3 -23 3.0 5 UNIT V mA µA µA mVrms dB dB V mA mA mA mA mA mA mA µA µA KΩ KΩ THD VTDC ITL IPL ITML IHPH IHPL IHFH IHFL IKD IKS RHK RK RL = 5 KΩ, VDD = 2.0 to 5.5V RL = 5 KΩ, VDD = 2.0 to 5.5V VTO = 0.5V VPO = 0.5V VTMO = 0.5V VHPH = 2.0V VHPL = 0.5V VHFH = 2.0V VHFL = 0.5V VI = 0.0V VI = 2.5V - - -8- W91520N SERIES AC CHARACTERISTICS (VDD−VSS = 2.5V, FOSC. = 3.579545 MHz, TA = 25° C, all outputs unloaded) PARAMETER Key-in Debounce Key Release Debounce On-hook Debounce Pre-digit Pause1 SYMBOL TKID TKRD TOHD TPDP1 10 ppS TPDP2 20 ppS TIDP M:B TTD TITP TFB CONDITIONS Mode = VDD Mode = Floating Mode = VDD Mode = Floating 10 ppS 20 ppS Mode = VDD Mode = Floating Auto dialing Auto dialing F1 F2 F3 F4 MIN. - TYP. 20 20 150 40 33.3 20 16.7 800 500 40:60 33.3:66.7 93 93 600 100 300 73 1.0 3.6 2.0 2.2 600 MAX. - UNIT mS mS mS mS mS mS % mS mS mS Pre-digit Pause2 Interdigit Pause (Auto Dialing) Make/Break Ratio Tone Output Duration Intertone Pause Flash Break Time Flash Pause Time Pause Time One-key Redial Break Time One-key Redial Pause Time Notes: TFP TP TRB TRP F1, F2, F3, F4 R/P1 R/P2 - S S S mS - 1. Crystal parameters suggested for proper operation are Rs < 100 Ω, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF, FOSC. = 3.579545 MHz ±0.02%. 2. Crystal oscillator accuracy directly affects these times. -9- Publication Release Date: May 1997 Revision A3 W91520N SERIES TIMING WAVEFORMS HKS TKRD KEY IN DP T/P MUTE H/P MUTE DTMF OSC. 3 TKID TIDP MB 4 2 MB 2 TKID TIDP TPDP TIDP TPDP TIDP Low OSCILLATION OSCILLATION Figure 1(a) Normal Dialing Timing Diagram HKS TKRD KEY IN DP T/P MUTE H/P MUTE R/P TKID MB MB T< T OHD TPDP TIDP TIDP TIDP DTMF OSC. Low OSCILLATION Figure 1(b) Pulse Mode Auto Dialing Timing Diagram - 10 - W91520N SERIES Timing Waveforms, continued HKS TKRD KEY IN DP T/P MUTE H/P MUTE DTMF OSC. Low R/P TKID MB T = TOHD TPDP TIDP MB OSCILLATION Figure 1(c) Pulse Mode Auto Dialing Timing Diagram HKS TKRD KEY IN DTMF TTD T/P MUTE H/P MUTE DP OSC. OSCILLATION 3 T KID 4 2 5 TITP TITP TITP High OSCILLATION Figure 2(a) Tone Mode Normal Dialing Timing Diagram - 11 - Publication Release Date: May 1997 Revision A3 W91520N SERIES Timing Waveforms, continued HKS TKRD KEY IN DTMF TTD T/P MUTE H/P MUTE TITP TITP R/P TKID T < T OHD DP OSC. High OSCILLATION Figure 2(b) Tone Mode Auto Dialing Timing Diagram HKS TKRD KEY IN DTMF TTD T/P MUTE H/P MUTE TITP R/P TKID T = T OHD DP OSC. OSCILLATION High Figure 2(c) Tone Mode Auto Dialing Timing Diagram - 12 - W91520N SERIES Timing Waveforms, continued HKS 1 KEY IN 2 H H H H H MODE DP DTMF T/P MUTE H/P MUTE HFI HFO OSC Figure 3. Handfree Function Timing Diagram - 13 - Publication Release Date: May 1997 Revision A3 W91520N SERIES Timing Waveforms, continued HKS KEY IN DP HFI HFO T/P MUTE H/P MUTE DTMF OSC. Low OSCILLATION R TKID MB R TKID TRB MB TIDP TRP TPDP TPDP TIDP Figure 4. One-key Redial Timing Diagram HKS KEY IN DP T/P MUTE H/P MUTE DTMF OSC. Low 2 R/P 3 TKID MB MB TIDP TPDP TP TPDP OSC Figure 5. Pause Function Timing Diagram - 14 - W91520N SERIES Timing Waveforms, continued HKS KEY IN DP TPDP T/P MUTE H/P MUTE 2 TKID MB */T 3 TIDP TP DTMF OSC. OSCILLATION Figure 6. Pulse-to-tone Timing Diagram HKS KEY IN DP F TKID Low F F 3 T FP T FB TKID T FB T KID HFI HFO T/P MUTE H/P MUTE DTMF TITP OSC. OSCILLATION Figure 7. Flash Timing Diagram - 15 - Publication Release Date: May 1997 Revision A3 W91520N SERIES Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. - 16 -