W91822N

W91820N SERIES 13-MEMORY TONE/PULSE DIALER WITH HANDFREE, LOCK AND HOLD FUNCTIONS GENERAL DESCRIPTION The W91820N is a series of tone/pulse switchable telephone dialers with 13 memory, keytone, hold, lock, and handfree dialing control features. These chips are fabricated using Winbond's highperformance CMOS technology and thus offer good performance in low-voltage, low-power operations. FEATURES • • • • • • • • • • • • • • • • • • • • • • Tone/pulse switchable dialer Two by 32 digits redial and save memory Three by 32 digits one-touch direct repertory memory Ten by 32 digits two-touch indirect repertory memory Pulse-to-tone (*/T) keypad for long distance call operation Chain dialing Uses 5 × 5 keyboard Easy operation with redial, flash, pause, and */T keypads Pause, P→T (pulse-to-tone) can be stored as a digit in memory Dialing rate:10 ppS or 20 ppS by mask option Minimum tone output duration: 93 mS (unless W91824N/AN is 87 mS) Minimum intertone pause: 93 mS (unless W91824N/AN is 87mS) Pause time: 3.6 sec. (unless W91824N/AN is 2.0 sec.) Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S Make/break ratio (2:3 or 1:2) selectable by MODE pin Mute key for speech network mute No key will be accepted except the "HOLD" key when in the Hold mode Key tone output for valid keypad entry recognition On-chip power-on reset Uses 3.579545 MHz crystal or ceramic resonator 20, or 22-pin dual-in-line plastic package The different dialers in the W91820N series are shown in the following table: TYPE NO. W91820N/824N W91820AN/824AN W91820LN W91820ALN W91822N W91822AN PULSE (ppS) 10 10 10 10 20 20 LOCK √ √ KEY TONE √ √ √ √ HANDFREE DIALING √ √ √ PACKAGE (PINS) 20 22 20 22 20 22 Note: W91824N/824AN for French only. -1- Publication Release Date: May 1999 Revision A2 W91820N SERIES PIN CONFIGURATIONS C1 C1 C2 C3 C4 KT H/P MUTE VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 N.C. VDD MODE DTMF DP HKS C2 C3 C4 KT H/P MUTE VSS XT XT T/P MUTE HFI 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 R4 R3 R2 R1 N.C. VDD MODE DTMF DP HKS HFO W91820N/822N /824N W91820AN/822AN /824AN C1 C1 C2 C3 C4 LOCK H/P MUTE VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 N.C. VDD MODE DTMF DP HKS C2 C3 C4 LOCK H/P MUTE VSS XT XT T/P MUTE HFI 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 R4 R3 R2 R1 N.C. VDD MODE DTMF DP HKS HFO W91820LN W91820ALN -2- W91820N SERIES PIN DESCRIPTION SYMBOL ColumnRow Inputs 20-PIN 1−4 & 17−20 22-PIN 1−4 & 19−22 I/O I FUNCTION The keyboard input is compatible with a standard 5 × 5 keyboard, an inexpensive single contact (Form A) keyboard, and electronic input. In normal operation, any single button can be pushed to produce dual tone, pulses, or functions. Activation of two or more buttons will result in no response except for a single tone. XT 8 8 I A built-in inverter together with an inexpensive 3.579545 MHz crystal supplies the oscillator. The oscillator stops when there is no keypad input. The crystal frequency deviation is 0.02%. Crystal oscillator output pin. The T/P MUTE is a conventional CMOS N-channel open drain output. The output transistor turns on with a low level during a dialing sequence (both pulse and tone mode). Otherwise, it is off. N.C. MODE 16 14 18 16 I No connect Connecting the mode pin to VSS places the dialer in tone mode. Connecting the mode pin to VDD places the dialer in pulse mode with an M/B ratio of 40:60. Leaving the mode pin floating places the dialer in pulse mode with an M/B ratio of 33.3:66.7. HKS 11 13 I The HKS (hook switch) input is used to sense whether the handset is on-hook or off-hook. In on-hook state, HKS = 1: chip is in sleeping mode, no operation. In off-hook state, HKS = 0: chip is enabled for normal operation. HKS pin is pulled to VDD by internal resistor. KT (W91820N/8 20AN/822N/ 824N/822AN /824AN only) XT T/P MUTE 9 10 9 10 O O 5 5 O The key tone output is a conventional CMOS inverter. The key tone is generated when any valid key is pressed; the KT pin generates a 1.2 KHz square wave at 35 mS. When no key is pressed, the KT pin remains in low state. -3- Publication Release Date: May 1999 Revision A2 W91820N SERIES Pin Description, continued SYMBOL LOCK (W91820LN/ 820ALN only) 20-PIN 5 22-PIN 5 I/O I FUNCTION The function of this terminal is to prevent "0" dialing and "9" dialing under PABX system long distance call control. When the first key input after reset is 0 or 9, all key inputs, including the 0 or 9 key, become invalid and the chip generates no output. The telephone is reinitialized by a reset. The function of the LOCK pin is shown below: LOCK PIN VDD Floating VSS FUNCTION "0", "9" dialing inhibited Normal dialing Mode "0" dialing inhibited H/P MUTE 6 6 I The H/P MUTE is a conventional inverter output. During pulse dialing, flash break or hold period, this output is active high; otherwise, it remains in low state. N-channel open drain dialing pulse output. Flash key will cause DP to be active in either tone mode or pulse mode. In lock mode, the DP remains low for 300 mS durint offhook delay time. The timing diagram for pulse mode is shown in Figure 1(a, b). DP 12 14 O DTMF 13 15 O During pulse dialing, this pin remains in a low state regardless of the keypad input. In tone mode, it will output a dual or single tone. A detailed timing diagram for tone mode is shown in Figure 2(a, b). OUTPUT FREQUENCY Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 VDD, VSS 15, 7 17, 7 I Power input pins for the dialer chip. VDD is the power and VSS is the ground. -4- W91820N SERIES Pin Description, continued SYMBOL HFI , HFO 20-PIN - 22-PIN 11, 12 I/O I, O Handfree control pins. FUNCTION A low pulse on the HFI input pin toggles the handfree control state. The status of the handfree control state is listed in the following table: CURRENT STATE HOOK SW. On Hook Off Hook On Hook Off Hook Off Hook HFO Low High High Low High INPUT HFI HFI HFI Off Hook On Hook On Hook NEXT STATE HFO High Low Low Low Low High DIALING Yes No Yes Yes No Yes The HFI pin is pulled to VDD by an internal resistor. A detailed timing diagram is shown in Figure 3. BLOCK DIAGRAM XT XT HKS HFI SYSTEM CLOCK GENERATOR ROW (R1 ~ R4, Vx/R5) KEYBOARD INTERFACE COLUMN (C1 ~ C4, Vss) LOCATION LATCH READ/WRITE COUNTER CONTROL LOGIC LOCK MODE RAM PULSE CONTROL LOGIC T/P MUTE KT DP HFO H/P MUTE DTMF D/A CONVERTER ROW & COLUMN PROGRAMMABLE COUNTER DATA LATCH & DECODER -5- Publication Release Date: May 1999 Revision A2 W91820N SERIES FUNCTIONAL DESCRIPTION Keyboard Operation C1 1 4 7 */T F1 C2 2 5 8 0 F2 C3 3 6 9 # F3 C4 S F4 A R/P H VSS EM1 EM2 EM3 SAVE R1 R2 R3 R4 Vx/R5 • S: Store function key • A: Indirect repertory memory dialing function key • H: Hold function key • R/P: Redial and pause function key • */T: * in tone mode and P→T key in pulse mode • SAVE: Save function key for one-touch 32-digit memory • EM1, ..., EM3: Emergency one-touch memory key • F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS; all flash pause time is 1.0 mS Note: D1, ..., Dn, D1`, ..., Dn`, */T, #, Mn: EM1, ..., EM3, Ln: 0−9 Normal Dialing OFF HOOK (or ON HOOK & HFI ), D1 , D2 , …, Dn 1. D1, D2, …, Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. Redialing Dialing OFF HOOK Come The (or ON HOOK , & HFI (or , D1 & , D2 HFI , …, ), Dn R/P , BUSY ON HOOK OFF HOOK ON HOOK R/P key can execute redial function only as first key-in after off-hook. Otherwise, it will invoke the pause function. • The below cases are selected by mask option for W91824N/AN (French version) only. In tone mode: D1, D2, D3,*(or #), D4, D5, D6 The chip will only output D1, D2, D3 and ignore *(or #), D4, D5, D6. In pulse mode: D1, D2, D3, */T, D4, D5, D6 -6- W91820N SERIES The chip will only output D1,D2,D3 and do not transfer to tone mode. In pulse mode, the # sign does not effect. Number Store 1. OFF HOOK EMn (or A (or , ON HOOK Ln D1 or to & HFI ) must first be finished before the S key is pressed. ), D1 , D2 , ..., Dn , S , S , SAVE Dn a. The dialing out of b. D1, D2, …, Dn will be stored in memory location Mn or saved and then dialed out. 2. OFF HOOK EMn (or A (or , ON HOOK Ln or & HFI ) ), S , D1 , D2 , ..., Dn , S , SAVE a. D1, D2, …, Dn will be stored in memory location, Mn (or saved), but will not be dialed out. b. R/P and */T keys can be stored as a digit in memory, but the R/P is the pause function key. R/P key cannot be the first digit. In store mode, c. The store mode is released after the store function is executed or when the state of the hook switch changes or the flash function is executed. Save OFF HOOK (or ON HOOK & HFI ), D1 , D2 , ..., Dn , Save a. D1, D2, ..., Dn will be dialed out. b. If the dialing of memory. OFF HOOK come on (or ON HOOK (or & HFI & ), HFI ), SAVE D1 to Dn is finished, pressing SAVE will duplicate D1 to Dn to the save OFF HOOK ON HOOK c. D1 to Dn will be dialed out after the SAVE key is pressed. Repertory Dialing Procedure One-touch direct repertory dialing: OFF HOOK (or ON HOOK & HFI ), Mn (or SAVE ) -7- Publication Release Date: May 1999 Revision A2 W91820N SERIES Two-touch direct repertory dialing: OFF HOOK (or ON HOOK & HFI ), A , Ln Access Pause OFF HOOK (or ON HOOK & HFI ), D1 , D2 , R/P , D3 , ..., Dn 1. The pause function can be stored in memory. 2. The pause function is executed with normal dialing, redialing or memory dialing. 3. The pause function timing diagram is shown in Figure 6. Pulse-to-tone (*/T) OFF HOOK , D2' , ..., (or Dn' ON HOOK & HFI ), D1 , D2 , ..., Dn , */T , D1' , 1. If the mode switch is set in pulse mode, then it will perform case a: D1, D2, ---, Dn, Pause (3.6 sec), D1', D2', ---, Dn' (Pulse) case b: (only for French version) D1, D2, ---, Dn, * , D1', D2', ---, Dn' (Pulse) (Tone) (Tone) 2. If the mode switch is set in tone mode, then the output signal will be: D1, D2, ---, Dn, * , D1', D2', ---, Dn' (Tone) 3. It can be reset to pulse mode only if ON HOOK is active. This is because it remains in tone mode when the digits have been dialed out. 4. The function timing diagram is shown in Figure 7. Flash OFF HOOK (or ON HOOK & HFI ), Fn 1. Fn = F1−F4. If Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS (F2), 73 mS (F3) or 100 mS (F4) and a pause time of 1.0 second, after which the next digit is dialed out. 2. The flash key has the first priority of the keyboard function only one flash key will be released to the user. 3. When the flash key is key in, the system will return to the initial state after the flash pause time is finished. 4. The flash function timing diagram is shown in Figure 8. -8- W91820N SERIES Cascaded Dialing OFF HOOK 1. (or ON HOOK + & HFI ) + Normal Dialing Normal Dialing (1st sequence) Repertory Dialing (2nd sequence) + Normal Dialing (2nd sequence) 2. Repertory Dialing (1st sequence) + Repertory Dialing 3. Redialing + Normal Dialing (2nd sequence) + Repertory Dialing (1st sequence) Redialing is valid only for the first key-in. The second sequence should not be operated until the first sequence is dialed out completely. ABSOLUTE MAXIMUM RATING PARAMETER DC Supply Voltage SYMBOL VDD−VSS VIL Input/Output Voltage VIH VOL VOH Power Dissipation Operation Temperature Storage Temperature PD TOPR TSTG RATING -0.3 to +7.0 VSS -0.3 VDD +0.3 VSS -0.3 VDD +0.3 120 -20 to +70 -55 to +150 UNIT V V V V V mW °C °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. -9- Publication Release Date: May 1999 Revision A2 W91820N SERIES DC CHARACTERISTICS (VDD−VSS = 2.5V, Fosc. = 3.58 MHz, TA = 25° C, all outputs unloaded) PARAMETER Operating Voltage Operating Current Standby Current Memory Retention Current Tone Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level DTMF Output Sink Current DP Output Sink Current SYM. VDD IOP ISB IMR VTO Tone Pulse CONDITIONS MIN. 2.0 130 1 1.0 0.2 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 4 300 TYP. 0.4 0.2 150 2 -30 500 400 - MAX. 5.5 0.6 0.4 15 1 170 3 -23 3.0 5.0 UNIT V mA mA µA µA mVrms dB dB V mA mA mA mA mA mA mA mA mA µA KΩ µA KΩ HKS = 0, No load & No key entry HKS = 1, VDD = 1.0V Row group, RL = 5 KΩ Col/Row, VDD = 2.0−5.5V RL = 5 KΩ, VDD = 2.0−5.5V RL = 5 KΩ, VDD = 2.0−5.5V VTO = 0.5V VPO = 0.5V VMO = 0.5V VKTH = 2.0V VKTL = 0.5V VHFH = 2.0V VHFL = 0.5V VHPH = 2.0V VHPL = 0.5V VI = 0V THD VTDC ITL IPL IML IKTH IKTL IHFH IHFL IHPH IHPL IKD RHKS IKS T/P MUTE Output Sink Current KT Drive/Sink Current HFO Drive/Sink Current H/P MUTE Drive/Sink Current Keypad Input Drive Current HKS Pull High Resister Keypad Input Sink Current Keypad Resistance VI = 2.5V 200 - - 10 - W91820N SERIES AC CHARACTERISTICS PARAMETER Key-in Debounce Key Release Debounce On-hook Debounce Pre-digit Pause1 Pre-digit Pause2 Inter Digit Pause (Auto Dialing) SYM. TKID TKRD TOHD TPDP1 10 ppS TPDP2 20 ppS TIDP CONDITIONS Lock Mode Unlock Mode Mode Pin = VDD Mode Pin = Floating Mode Pin = VDD Mode Pin = Floating 10 ppS (W91820N/W91820AN/820LN /820ALN/824N/824AN only) MIN. - TYP. 20 20 20 150 40 33.3 20 16.7 800 MAX. - UNIT mS mS mS mS mS mS mS mS mS 20 ppS (W91822N/822AN only) - 500 800 500 40:60 33.3:66.7 93 93 600 300 73 100 1.0 3.6 2.0 1.2 35 600 2.2 300 - mS mS mS % % mS mS mS Interdigit Pause (Auto dialing) Make/Break Ratio Tone Output Duration Intertone Pause Flash Break Time TIDP M:B TTD TITP TFB 10 ppS 20 ppS Mode Pin = VDD Mode Pin = Floating F1 F2 F3 F4 (W91824N/AN only) Flash Pause Time Pause Time Key Tone Frequency Key Tone Duration One-key Redialing Pause Time One-key Redialing Break Time First Key-in Delay TFP TP FKT TKTD TRP TRB TFKD Lock only S S S KHz mS mS S mS - Notes: 1. Crystal parameters suggested for proper operation are Rs < 100 Ω, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF, Fosc. = 3.579545 MHz ±0.02%. 2. Crystal oscillator accuracy directly affects these times. - 11 - Publication Release Date: May 1999 Revision A2 W91820N SERIES TIMING WAVEFORMS HKS 4 TKID DP B M KEY IN 2 2 TKID TPDP T/P MUTE TIDP M B TIDP TPDP TIDP H/P MUTE KT DTMF LOW OSC. OSC. OSC. Figure 1(a). Pulse Mode Tming Diagram (Normal dialing without lock function) HKS 300 mS KEY IN TFKD DP MB 4 2 2 TKID T IDP MB TIDP TPDP TIDP T/P MUTE (long mute) H/P MUTE LOW DTMF OSC. OSC. OSC. Figure 1(b). Pulse Mode Timing Diagram (Normal dialing with lock function) - 12 - W91820N SERIES Timing Waveforms, continued HKS KEY IN DP R/P M B MB TIDP TPDP TIDP TPDP TIDP T/P MUTE (long mute) H/P MUTE KT DTMF OSC. ON HOOK LOW OSC. Figure 1(c). Pulse Mode Timing Diagram (Auto dialing without lock) HKS 300 mS KEY IN M R/P T FKD DP B TIDP TPDP TIDP T/P MUTE (long mute) H/P MUTE DTMF OSC. LOW OSC. Figure 1(d).Pulse Mode Timing Diagram (Auto dialing with lock function) - 13 - Publication Release Date: May 1999 Revision A2 W91820N SERIES Timing Waveforms, continued HKS 3 TKID DTMF T/P MUTE LOW TTD 2 TKRD TITP 6 TKRD 5 TKRD KEY IN TKID TITP TITP H/P MUTE KT DTMF HIGH OSC. OSC. OSC. Figure 2(a). Tone Mode Timing Diagram HKS 300 mS KEY IN 3 2 TKRD 6 TKRD TKID 5 TKRD DTMF T/P MUTE TFKD H/P MUTE TTD TITP TITP TITP LOW DP HIGH OSC. OSC. OSC. Figure 2(b). Tone Mode Timing Diagram (Normal dialing with lock function) - 14 - W91820N SERIES Timing Waveforms, continued HKS T KEY IN R/P TKID DTMF T/P MUTE LOW TTD T < TOHD TITP TITP H/P MUTE KT DP HIGH OSC. ON HOOK OSC. Figure 2(c). Tone Mode Timing Diagram (Auto dialing without lock function) HKS 300 mS T T < TOHD KEY IN R/P DTMF T/P MUTE T FKD H/P MUTE TKID TTD TITP TITP LOW DP HIGH OSC. OSC. Figure 2(d). Tone Mode Timing Diagram (Auto dialing with lock function) - 15 - Publication Release Date: May 1999 Revision A2 W91820N SERIES Timing Waveforms, continued HKS T KEY IN R/P TKID DTMF T/P MUTE (return to initial state) H/P MUTE KT DP HIGH OSC. ON HOOK T > TOHD TTD TITP LOW OSC. Figure 2(c). Tone Mode Timing Diagram with On-hook Debounce (Auto dialing) HKS OFF HOOK ON HOOK HFI H KEY HFO T/P MUTE HIGH LOW H/P MUTE CHIP ENABLE Note: The H KEY can not be enabled during chip dissable. Figure 3(a) - 16 - W91820N SERIES Timing Waveforms, continued HKS HFI OFF HOOK H KEY HFO T/P MUTE HIGH H/P MUTE CHIP ENABLE Figure 3(b) Note: The H KEY and HFI inputs will toggle the HFO signal. The first time HFI or H KEY are activated, the HFO signal will go high and the previous active input will be neglected. ON HOOK HKS HFI H KEY HFO T/P MUTE HIGH H/P MUTE CHIP ENABLE Figure 3(c) Note: The HKS signal change of state from high to low will initialize both the HFO and H/P MUTE signals. - 17 - Publication Release Date: May 1999 Revision A2 W91820N SERIES Timing Waveforms, continued HKS KEY IN DP T/P MUTE TFKD 4 TKID T T