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WM8751LSEFR

WM8751LSEFR

  • 厂商:

    WOLFSON

  • 封装:

  • 描述:

    WM8751LSEFR - STEREO DAC FOR PORTABLE AUDIO APPLICATIONS - Wolfson Microelectronics plc

  • 数据手册
  • 价格&库存
WM8751LSEFR 数据手册
w DESCRIPTION The WM8751L is a low power, high quality stereo DAC with integrated headphone and loudspeaker amplifiers, designed to reduce external component requirements in portable digital audio applications. The on-chip headphone amplifiers can deliver 40mW into a 16Ω load. Advanced on-chip digital signal processing performs bass and treble tone control. The WM8751L can operate as a master or a slave, with various master clock frequencies including 12 or 24MHz for USB devices or standard 256fs rates like 12.288MHz and 24.576MHz. Different audio sample rates such as 96kHz, 48kHz, 44.1kHz are generated directly from the master clock without the need for an external PLL. The WM8751L operates on supply voltages from 1.8V up to 3.6V, although the digital core can operate on a separate supply down to 1.42V, saving power. Different sections of the chip can also be powered down under software control. The WM8751L is supplied in a very small and thin 5x5mm QFN package, ideal for use in hand-held and portable systems. WM8751L Stereo DAC For Portable Audio Applications FEATURES • • • • • • • • • • • DAC SNR 98dB, THD -86dB (‘A’ weighted @ 48kHz, 3.3V) On-chip 400mW BTL Speaker Driver (mono) On-chip Headphone Driver - 40mW output power on 16Ω / 3.3V - SNR 96dB, THD –79dB at 20mW with 16Ω load Stereo and Mono Line-in mix into DAC output Separately Mixed Stereo and Mono Outputs Digital Tone Control and Bass Boost Low Power - Down to 7mW for stereo playback (1.8V / 1.5V supplies) - 10µW Shutdown Mode Low Supply Voltages - Analogue and Digital I/O: 1.8V to 3.6V - Digital core: 1.42V to 3.6V 256fs / 384fs or USB master clock rates: 12MHz, 24MHz Audio sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48, 88.2, 96kHz generated internally from master clock 32-lead QFN package, 5x5x0.9mm size, 0.5mm lead pitch APPLICATIONS • • • Digital Audio Player MP3 Phone Minidisc Player BLOCK DIAGRAM MONOIN+ MONOINLINEINL LINEINR AGND VREF VREF WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ AVDD VMID Production Data, August 2006, Rev 4.2 Copyright ©2006 Wolfson Microelectronics plc WM8751L TABLE OF CONTENTS Production Data DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY............................................................................................................. 7 OUTPUT PGA’S LINEARITY ......................................................................................... 8 SIGNAL TIMING REQUIREMENTS .....................................................................11 SYSTEM CLOCK TIMING............................................................................................ 11 AUDIO INTERFACE TIMING – MASTER MODE ......................................................... 11 AUDIO INTERFACE TIMING – SLAVE MODE ............................................................ 13 CONTROL INTERFACE TIMING – 3-WIRE MODE ..................................................... 13 CONTROL INTERFACE TIMING – 2-WIRE MODE ..................................................... 14 INTERNAL POWER ON RESET CIRCUIT ..........................................................15 DEVICE DESCRIPTION.......................................................................................16 INTRODUCTION.......................................................................................................... 16 SIGNAL PATH ............................................................................................................. 16 LINE INPUTS AND OUTPUT MIXERS ........................................................................ 20 ANALOGUE OUTPUTS ............................................................................................... 23 DIGITAL AUDIO INTERFACE...................................................................................... 27 MASTER CLOCK AND AUDIO SAMPLE RATES ........................................................ 32 POWER SUPPLIES ..................................................................................................... 35 POWER MANAGEMENT ............................................................................................. 36 REGISTER MAP...................................................................................................38 DIGITAL FILTER CHARACTERISTICS ...............................................................39 TERMINOLOGY........................................................................................................... 39 DAC FILTER RESPONSES ......................................................................................... 39 APPLICATIONS INFORMATION .........................................................................41 RECOMMENDED EXTERNAL COMPONENTS........................................................... 41 MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS ........................................ 42 LINE OUTPUT CONFIGURATION............................................................................... 42 HEADPHONE OUTPUT CONFIGURATION ................................................................ 43 SPEAKER OUTPUT CONFIGURATION...................................................................... 43 PACKAGE DIMENSIONS ....................................................................................44 IMPORTANT NOTICE ..........................................................................................45 ADDRESS:................................................................................................................... 45 w PD Rev 4.2 August 2006 2 Production Data WM8751L PIN CONFIGURATION ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE -25°C to +85°C -25°C to +85°C PACKAGE MOISTURE SENSITIVITY LEVEL MSL1 PEAK SOLDERING TEMPERATURE 260oC 260oC W M8751LSEFL 32-lead QFN (5x5x0.9mm) (Pb-free) 32-lead QFN (5x5x0.9mm) (Pb-free, tape and reel) W M8751LSEFL/R MSL1 Note: Reel quantity = 3,500 w PD Rev 4.2 August 2006 3 WM8751L PIN DESCRIPTION PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NAME MCLK DCVDD DBVDD DGND BCLK DACDAT DACLRC NC AGND2 MONOOUT OUT3 ROUT1 LOUT1 HPGND ROUT2 LOUT2 HPVDD AVDD AGND VREF VMID NC HPDETECT NC MONOINMONOIN+ LINEINR LINEINL MODE CSB SDIN SCLK TYPE Digital Input Supply Supply Supply Digital Input / Output Digital Input Digital Input / Output No Connect Supply Analogue Output Analogue Output Analogue Output Analogue Output Supply Analogue Output Analogue Output Supply Supply Supply Analogue Output Analogue Output No Connect Logic Input No Connect Analogue Input Analogue Input Analogue Input Analogue Input Digital Input Digital Input Digital Input/Output Digital Input Master Clock Digital Core Supply Digital Buffer (I/O) Supply DESCRIPTION Production Data Digital Ground (return path for both DCVDD and DBVDD) Audio Interface Bit Clock DAC Digital Audio Data Audio Interface Left / Right Clock Leave this pin unconnected Internally connected to AGND. Leave this pin floating or connect to AGND. Mono Output Output 3 (can be used as Headphone Pseudo Ground) Right Output 1 (Line or Headphone) Left Output 1 (Line or Headphone) Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2) Right Output 1 (Line or Headphone or Speaker) Left Output 1 (Line or Headphone or Speaker) Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT) Analogue Supply Analogue Ground (return path for AVDD) Reference Voltage Decoupling Capacitor Midrail Voltage Decoupling Capacitor No Internal Connection Headphone / Speaker switch (referred to AVDD) No Internal Connection Negative end of MONOIN+, for differential mono signals Analogue Line-in to mixers (mono channel) Analogue Line-in to mixers (right channel) Analogue Line-in to mixers (left channel) Control Interface Selection Chip Select / Device Address Selection Control Interface Data Input / 2-wire Acknowledge output Control Interface Clock Input Note: It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB. w PD Rev 4.2 August 2006 4 Production Data WM8751L ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at
WM8751LSEFR 价格&库存

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