PX6410

PX6410 Multi-Rate VCSEL Driver Product Brief September 2004 Description The growing use of the Internet has created increasingly higher demand for multi-Gb/s I/O performance. The demand for 10+ Gb/s WAN bandwidth fuels the growth of short-reach 10 Gb/s infrastructures within high-end telco and datacom routers, switches, servers and other proprietary chassis-to-chassis links. The Zarlink PX6410 10 Gb/s serial VCSEL driver is designed for various 10 Gb/s PMD applications. It consists of a DC-coupled amplifier with adjustable modulation and bias currents optimized for driving commercially available VCSEL-based transmit optical sub assemblies (TOSAs) from a single +3.3 V supply. VCSEL modulation and bias currents can be programmed by a variety of means including external resistors, programmable potentiometers or microcontroller DAC outputs. Selectable current temperature coefficients and APC feedback control allow optical output power and extinction ratio to be maintained over temperature. 410 PX6 Features • • • • • • • • Up to 10.7 Gb/s serial VCSEL driver Single +3.3 V supply Average power control (APC) provides constant output optical power Digital diagnostics provided with bias, photodiode, and temperature monitors Independent temperature compensation for VCSEL bias and modulation current VCSEL fault protection limits output optical power for laser safety Differential CML compatible inputs with on-chip termination 4 mm x 4 mm QFN package Applications • • • XFP, XENPAK, X2, XPAC form factors 10GbE, 10GFC, 8GFC, 4GFC, OC-192 Proprietary intra-system optics 1 Zarlink Semiconductor Inc. PX6410 Product Brief Figure 1: Filtered 10.3125 Gb/s PRBS23 optical data pattern Interrupt +3.3V Temp Sensor Figure 2: Typical APC closed-loop configuration using TOSA monitor photo diode to provide constant VCSEL output power. Modulation current temperature compensation also enabled to improve extinction ratio across operating temperatures. * Disable Tx_Flt Tx_Dis VCC VCC VCC TC_Mod TC_Bias VTherm GND Tx_Bias Transmission Line TOSA VCSEL Anode VCSEL Cathode Data_N Data_P Tx_In_N Tx_Out Tx_Bias GND Monitor Tx_In_P GND Bias_Mon PD Cathode Pwr_Mon RSafe RMod RBias RPower Comp TOSA PD monitor Interrupt +3.3V Temp Sensor Figure 3: Typical open-loop configuration with internal temperature compensation enabled for bias and modulation currents. * Disable Tx_Flt Tx_Dis VCC VCC VCC TC_Mod TC_Bias VTherm Tx_Bias GND TOSA VCSEL Anode VCSEL Cathode Data_N Data_P Tx_In_N Tx_In_P GND Tx_Out Tx_Bias GND Monitor Bias_Mon VCSEL bias monitor PD Cathode Pwr_Mon RSafe RMod RBias RPower Comp * See Table 2 for temperature compensation configurations 2 Zarlink Semiconductor Inc. For more information about all Zarlink products visit our Web Site at w ww.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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