SCE5783

0.180" 8-Character 5 x 7 Dot Matrix Serial Input Dot Addressable Intelligent Display® Devices Lead (Pb) Free Product - RoHS Compliant Red SCE5780 Yellow SCE5781 Super-red SCE5782 Green SCE5783 High Efficiency Green SCE5784 Soft Orange SCE5785 InGaAlP Red SCE5786 DESCRIPTION FEATURES • Eight 4.57 mm (0.180") 5 x 7 Dot Matrix Characters in Red, Yellow, Super-red, Green, High Efficiency Green, Soft Orange, or InGaAlP Red • ROMless Serial Input, Dot Addressable Display Ideal for User Defined Characters • Built-in Decoders, Multiplexers and LED Drivers • Readable from 2.5 meters (8 Feet) • Programmable Features: – Clear Function – Eight Dimming Levels – Peak Current Select – (12.5% or Full Peak Current) – Prescaler Function (External Oscillator Divided by 16 or 1) – Internal or External Clock The SCE5780 (red), SCE5781 (yellow), SCE5782 (HER), SCE5783 (green), SCE5784 (HEG), SCE5785 (orange), and SCE5786 (InGaAlP red) are eight digit, dot addressable 5 x 7 dot matrix, serial input, Intelligent Display devices. The eight 4.57 mm (0.180") high digits are packaged in a rugged, high quality, optically transparent, plastic 26 pin DIP with 7.62 mm (0.3") pin spacing. The on-board CMOS has a 280 bit RAM, one bit associated with one LED, each to generate User Defined Characters. The SCE578X is designed to work with the serial port of most common microprocessors. Data is transferred into the display through the Serial Data Input (DATA), clocked by the Serial Data Clock (SDCLK), and enabled by the Load Input (LOAD). The Clock I/O (CLK I/O) and Clock Select (CLKSEL) pins offer the user the capability to supply a high speed external multiplex clock. This feature can minimize audio in-band interference for portable communication equipment or eliminate the visual synchronization effects found in high vibration environments such as avionic equipment. The prescaler function allows for a higher speed external multiplex clock when set to divide by 16. 2006-01-23 1 SCE5780 Ordering Information Type Color of Emission Character Height mm (inch) SCE5780 red Q68000A9100 SCE5781 yellow Q68000A9101 SCE5782 super-red SCE5783 green SCE5784 high efficiency green Q68000A9104 SCE5785 soft orange on request SCE5786 InGaAlP Red Q68000A1435 Q68000A9102 4.57 (0.180) Q68000A9103 Date Code Intensity Code CL SCE578X Z YYWW OSRAM V Pin 1 Pin 13 2.54 (0.100) typ. 10.16 (0.400) 0.46 (0.018) typ. ±0.13 (0.005) 4.01 (0.158) typ. CL (Tol. non accum.) Pin 14 Pin 1 Identifier 5.33 (0.210) Dimensions in mm (inch) 0.25 (0.010) Package Outlines 0.51 (0.020) Ordering Code 5.71 (0.225) 0.3 (0.012) typ. 7.62 (0.300) 11.43 (0.450) max. 0 1 2.68 (0.105) 2 5.36 (0.211) 3 2.29 (0.090) 4.57 (0.180) 42.93 (1.690) max. 2.54 (0.100) CL 4 5 6 Tolerance: ±0.25 (0.010) unless otherwise specified CL Pin 1 Identifier 2006-01-23 7 IDOD5216 2 SCE5780 Maximum Ratings Parameter Symbol Value Unit Operating temperature range Top – 40 … + 85 °C Storage temperature range Tstg – 40 … + 100 °C VCC, Logic Supply Voltage (non-operating) VCC -0.5 to + 7.0 V -0.5 to VCC +0.5 V 1) Input Voltage Levels Relative to GND VLL, LED Supply Voltage (non-operating) VCOL -0.5 to + 5.5 V Solder temperature 1.59 mm (0.063“) below seating plane, t < 5.0 s TS 260 °C Relative Humidity at 85°C 85 % Power Dissipation at 70°C 1.7 W Power Dissipation at 85°C 1.25 W ESD (100 pF, 1.5 kΩ) 2.0 kV Input Current 100 mA 1) For operation at high temperature, see Thermal Considerations (page 10) Optical Characteristics at 25°C (VLL=VCC=5.0 V at 100% brightness level, viewing angle: X axis ± 55°, Y axis ± 65°) Green SCE5783 High Efficiency Green SCE5784 Soft Orange SCE5785 InGaAlP Red SCE5786 Unit Super-red SCE5782 Values Yellow SCE5781 Symbol Red SCE5780 Description Luminous Intensity (min.) (typ.) IV 37.5 90.0 75 110 75 190 75 150 120 215 120 150 375 950 µcd/dot µcd/dot Peak Wavelength (typ.) λpeak 660 585 630 565 568 610 645 nm Dominant Wavelength (typ.) λdom 639 583 626 570 574 605 632 nm Notes: 1. Dot to dot intensity matching at 100% brightness is 1.8:1. 2. Display are binned for hue at 2.0 nm intervals for yellow, green, and high efficiency green. 3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.) 2006-01-23 3 SCE5780 Switching Specifications (over operating temperature range and VCC=4.5 V to 5.5 V) Symbol Description Min. Units TRC Reset Active Time 600 ns TLDS Load Setup Time 50 ns TDS Data Setup Time 50 ns TSDCLK Clock Period 200 ns TSDCW Clock Width 70 ns TLDH Load Hold Time 0 ns TDH Data Hold Time 25 ns TWR Total Write Time 2.2 µs TBL Time Between Loads 600 ns Note: TSDCW is the minimum time the SDCLK may be low or high. The SDCLK period must be a minimum of 200 ns. Timing Diagram—Data Write Cycle T LDS LOAD T DS DATA TLDH D0 D7 TDH SDCLK T SDCW T SDCLK Timing Diagram—Instruction Cycle TWR TBL LOAD SDCLK DATA D0 D1 D2 D3 D4 D5 D6 D7 D0 D4 D5 D6 D7 D0 OR LOAD SDCLK DATA 2006-01-23 D0 D1 D2 D3 4 SCE5780 Electrical Characteristics (over operating temperature) Parameter Min. Typ. Max. Units Conditions VCC 4.5 5.0 5.5 V — VLL 3.0 — 5.5 V — ICC (PWR DWN) 4) — — 100 µA VCC=VLL=5.0 V, all inputs=0 V or VCC ILL (PWR DWN) 4) — — 50 µA — ICC — — 2.0 mA VCC=5.0 V ILL (20 dots/char) 1) 2) — 240 345 mA VCC=VLL=5.0 V, “#” displayed in 8 digits, brightness=100%, IP=100% at 25°C IIL — — –10 µA VCC=5.0 V, all inputs=0 V IIH — — 10 µA VCC=VIN=5.0 V (all inputs) VIH 3.5 — — V VCC=4.5 V to 5.5 V VIL — — 1.5 V VCC=4.5 V to 5.5 V IOH (CLK I/O) — –8.9 — mA VCC=4.5 V, VOH=2.4 V IOL (CLK I/O) — 1.6 — mA VCC=4.5 V, VOH=0.4 V θJC-pin — 34 — °C/W — Internal OSC Frequency 120 — 347 kHz VCC=5.0 V, CLKSEL=1, Prescale= ÷1 External OSC Frequency 120 — 347 kHz VCC=5.0 V, CLKSEL=0, Prescale= ÷1 External OSC Frequency with Prescale 1.92 — 5.55 MHz VCC=5.0 V, CLKSEL=0, Prescale= ÷16 Mux Frequency 3) 375 768 1086 Hz — Notes: 1) Peak current=1.87 x ILL x ILL varies with VLL Normalized curve, Figure „ILL Variance“ (page 11). 2) Unused inputs must be tied high. 3) Mux rate=[OSC Frequency/ (64 x 7)]. 4) External oscillator must be stopped during power down mode for minimum current. Input/Output Circuits The following two figures show the input and output resistor/diode networks used for ESD protection and to eliminate substrate latch-up caused by input voltage over/under shoot. Inputs Clock I/O VCC Input VCC 1 kΩ GND GND IDCD5026 IDCD5021 2006-01-23 1 kΩ Input/Output 5 SCE5780 Pin Definitions Top View 0 1 2 3 4 5 6 7 IDPA5120 Pin Function Definitions 1 CLKSEL H=internal clock, L=external clock 2 VCC (Logic) Logic power supply 3 VLL (LED) LED power supply 4–10 No pin No pins in these positions 11 Load Low input enables data clocking into the 8-bit serial shift register. When Load goes high, the contents of the 8-bit serial shift register will be decoded. 12,13 GND Power supply ground 14 Serial Data Serial data input 15 No connect Pin has no function 16 Serial CLK For loading data into the 8-bit serial register on a low to high transition Pin Assignment Pin Function Pin Function 1 CLKSEL 14 Serial Data 2 VCC (Logic) 15 No connect 3 VLL (LED) 16 Serial CLK 4 No pin 17 No pin 17–23 No pin No pins in these positions 24 Reset Asynchronous input, when low will clear the Multiplex Counter, User RAM, and Data Register. Control Word Register is set to 100% brightness, maximum peak current, and oscillator divided by 1. The display blanked. 25 CLK I/O Outputs master clock or input external clock for display multiplexing. 26 No connect Pin has no function 5 No pin 18 No pin 6 No pin 19 No pin 7 No pin 20 No pin 8 No pin 21 No pin 9 No pin 22 No pin 10 No pin 23 No pin 11 Load 24 Reset 12 GND 25 CLK I/O 13 GND 26 No connect Display Column and Row Format C0 C1 C2 C3 C4 Row 0 1 1 1 1 1 Row 1 0 0 1 0 0 Row 2 0 0 1 0 0 Row 3 0 0 1 0 0 Row 4 0 0 1 0 0 Row 5 0 0 1 0 0 R0 Row 6 0 0 1 0 0 R1 1=Display dot “On” /// 0=Display dot “Off” Dot Matrix Format C0 C1 C2 C3 C4 R2 R3 R4 4.57 (0.180) 0.72 (0.028) typ. 2.54 (0.100) Column Data Ranges R5 R6 0.57 (0.022) typ. IDOD5217 2006-01-23 6 Row 0 00H to 1FH Row 1 00H to 1FH Row 2 00H to 1FH Row 3 00H to 1FH Row 4 00H to 1FH Row 5 00H to 1FH Row 6 00H to 1FH SCE5780 Block Diagram CLKSEL CLK I/O Oscillator Counter Chain & Timing Logic RESET Serial Data Register Y Address Decode LOAD Row Decoder & Driver Display Multiplexer SD CLK SDATA MUX Rate 140 bit RAM Write 28 x 5 Read 7 x 20 Column Drivers Digits 0 to 3 X Address Decode 3-bit Address Register 4-5x7 Characters 0 1 2 3 4-5x7 Characters 4 5 6 7 6-bit Control Word Register IC 1 Control Word Logic VDIM Controls The second IC has the same Function diagram as IC 1 IC 2 controls characters 4 to 7 IC 2 IDBD5071 Operation of the SCE578X The SCE578X display consists of two CMOS ICs containing control logic and drivers for eight 5 x 7 characters. The first IC controls characters 0 through 3 and the second IC controls characters 4 through 7. These components are assembled in a compact plastic package. characters. The contents of this string is shown in Figure „Loading Serial Character Data“ a (page 8). Figure „Loading Serial Character Data“ b (page 8) shows that each character consist of eight 8 bit words. The first word encodes the display character location and the succeeding seven bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure „Loading Serial Character Data“ c (page 8) shows that each 8 bit word is formatted to represent Character Address, or Column Data. Figure „Loading Serial Character Data“ d (page 8) shows the sequence for loading the bytes of data. Bringing the LOAD line low enables the serial register to accept data. The shift action occurs on the low to high transition of the serial data clock (SDCLK). The least significant bit (D0) is loaded first. After eight clock pulses the LOAD line is brought high. With this transition the OPCODE is decoded. The decoded OPCODE directs D4–D0 to be latched in the Character Address register, stored in the RAM as Column data, or latched in the Control Word register. The control IC requires a minimum 600 ns delay between successive byte loads. As indicated in Figure „Loading Serial Character Data“ a (page 8), a total of 512 bits of data are required to load all eight characters into the display. The Character Address Register selects the character address that the row and column data will be written to. See Table „Load Character Adress“ (page 9) for opcode and character addressing. After loading the Character Address Register, the next seven bytes load the column data, one row at a time, starting with row 0 (top row) and ending with row 6 (bottom row). Each character address has a 7 x 5 bit User RAM formatted as seven rows, each containing five Individual LED dot addressability allows the user great freedom in creating special characters or mini-icons. The serial data interface provides a highly efficient interconnection between the display and the mother board. The SCE578X requires a minimum three input lines as compared to fourteen for an equivalent eight character parallel input part. The on-board CMOS IC is the electronic heart of the display. Each IC accepts serially formatted data, which is stored in the internal RAM. The IC accepts data based on the character address selected. The first IC is selected when addressing characters 0 through 3, the second IC is selected when addressing characters 4 though 7, and both ICs are selected when the Control Word is addressed. Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. The Block Diagram shows the three functional areas of the IC. These include: the input serial data register and control logic, a 140 bit two port RAM, and an internal multiplexer/display driver. The second IC is identical except characters 4 though 7 are driven. The following explains how to format the serial data to be loaded into the display. The user supplies a string of bit mapped decoded 2006-01-23 7 SCE5780 column data bits. The three most significant bits, D7–D5 represent the opcode for the row data and the least significant five bits, D4– D0 represent the column data. See Table „Load Column Data“ (page 9) for the column data format. If an address is loaded before all seven rows are written, the next column data will be loaded into Row 0 of the new address. The remaining rows of the old address are not changed. Table Charcater „D“ (page 8) shows the Row Address for the example character, “D.” Column data is written and read asynchronously from the 280 bit RAM. Once loaded, the internal oscillator and character multiplexer reads the data from the RAM. These characters are row strobed with column data as shown in Figures „Row and Column Locations for a Character ’D’“ (page 9) and „Row Strobing“ (page 10). The character strobe rate is determined by the internal or user supplied external MUX Clock and the ICs ÷ 320 counter. Character „D“ Row Op code D7 D6 D5 Column Data D4 D3 D2 C0 C1 C2 D1 C3 D0 C4 Hex 0 0 0 0 1 1 1 1 0 1E 1 0 0 0 1 0 0 0 1 11 2 0 0 0 1 0 0 0 1 11 3 0 0 0 1 0 0 0 1 11 4 0 0 0 1 0 0 0 1 11 5 0 0 0 1 0 0 0 1 11 6 0 0 0 1 1 1 1 0 1E Loading Serial Character Data Example: Serial Clock=5.0 MHz, Clock Period=200 ns 704 Clock Cycles, 140.8 µs a. Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7 88 Clock Cycles, 17.6 µs b. Character 0 Address Row 0 Column Row 1 Column Row 2 Column Row 3 Column Row 4 Column Data Data Data Data Data 11 Clock Cycles, 2.2 µs c. Character Address D0 D1 D2 D3 D4 0 0 0 0 0 OPCODE D5 D6 D7 1 0 1 Row 5 Column Data 11 Clock Cycles, 2.2 µs Time Column Data Time OPCODE Between Between D0 D1 D2 D3 D4 D5 D6 D7 Loads Loads D D D D D 0 0 0 600 ns(min) 600 ns(min) LOAD Serial Clock Clock Period DATA d. D0 D1 D2 D3 D4 D5 t0 2006-01-23 8 D6 D7 Time between LOADS Row 6 Column Data SCE5780 Load Character Address Display Brightness Op code D7 D6 D5 Character Address D4 D3 D2 D1 Hex Operation Load D0 Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 1 0 1 0 1 0 1 1 0 1 A0 Character 0 1 1 1 0 0 0 0 A1 Character 1 1 1 1 0 0 0 0 0 A2 Character 2 1 1 1 0 0 0 1 1 A3 Character 3 1 1 1 0 0 1 0 0 A4 Character 4 1 1 1 0 0 1 0 1 A5 Character 5 1 1 1 0 0 1 1 0 A6 Character 6 1 1 0 0 1 1 1 A7 Character 7 1 1 Load Column Data Hex Operation Level 0 E0 100% 1 E1 53% 1 0 E2 40% 0 1 1 E3 27% 0 1 0 0 E4 20% 0 0 1 0 1 E5 13% 1 0 0 1 1 0 E6 6.6% 1 0 0 1 1 1 E7 0.0% Display Brightness Op code D7 D6 D5 Column Data D4 D3 D2 D0 Operation Load D1 Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 0 0 0 C0 C1 C2 0 0 0 C0 C1 C2 0 0 0 C0 C1 0 0 0 C0 0 0 0 0 0 0 0 C3 C4 Row 0 1 1 1 0 1 0 0 C3 C4 Row 1 1 1 1 0 1 0 0 C2 C3 C4 Row 2 1 1 1 0 1 0 C1 C2 C3 C4 Row 3 1 1 1 0 1 C0 C1 C2 C3 C4 Row 4 1 1 1 0 0 C0 C1 C2 C3 C4 Row 5 1 1 1 0 C0 C1 C2 C3 C4 Row 6 1 1 1 1 The user can activate four Control functions. These include: LED Brightness Level, IC Power Down, Prescaler, or Display Clear. OPCODEs and six bit words are used to initiate these functions. The OPCODEs and Control Words for the Character Address and Loading Column Data are shown in Tables „Load Character Address“ and „Load Column Data“. The user can select eight specific LED brightness levels, Tables „Display Brightness“. Depending on how D3 is selected either one (1) for maximum peak current or zero (0) for 12.5% of maximum peak current in the control word per Table „Display Brightness“, the user can select 16 specific LED brightness levels. These brightness levels (in percentages of full brightness of the display) depending on how the user selects D3 can be one (1) or zero (0) are as follows: 100% (E0HEX or E8HEX), 53% (E1HEX or E9HEX), 40% (E2HEX or EAHEX), 27% (E3HEX or EBHEX), 20% (E4HEX or ECHEX), 13% (E5HEX or EDHEX), and 6.6% (E6HEX or EEHEX), 0.0% (E7HEX or EFHEX). The brightness levels are controlled by changing the duty factor of the row strobe pulse. The SCE578X offers a unique Display Power Down feature which reduces ICC to less than 150 mA total. When EFHEX is loaded (Table „Power Down“) the display is set to 0% brightness. When in the Power Down mode data may still be written into the RAM. The display is reactivated by loading a new brightness Level Control Word into the display. Hex Operation Level 0 E8 100% 1 E9 53% 1 0 EA 40% 0 1 1 EB 27% 1 1 0 0 EC 20% 0 1 1 0 1 ED 13% 1 0 1 1 1 0 EE 6.6% 1 0 1 1 1 1 EF 0.0% Hex Operation Level EF 0% brightness Power Down Op code D7 D6 D5 Control Word D4 D3 D2 D1 D0 1 0 1 1 1 1 1 1 Row and Column Locations for a Character “D” Row 0 Off LED Row 1 On LED Row 2 Previously "on" LED Row 3 Row 4 Row 5 Row 6 0 1 2 3 Columns 4 IDXX5191 2006-01-23 9 SCE5780 Row Strobing Row Load Load Row 0 Load Row 1 Load Row 2 Load Row 3 Load Row 4 Load Row 5 Load Row 6 0 0 0 0 0 0 0 1 1 1 1 1 1 1 2 2 2 2 2 2 2 3 3 3 3 3 3 3 4 4 4 4 4 4 4 5 5 5 5 5 5 5 6 6 6 6 6 6 0 1 2 3 4 Columns 0 1 2 3 4 Columns 0 1 2 3 4 Columns 0 1 2 3 4 Columns 0 1 2 3 4 Columns 6 0 1 2 3 4 Columns 0 1 2 3 4 Columns IDXX5192 The SCE578X allows a high frequency external oscillator source to drive the display. Data bit, D4, in the control word format controls the prescaler function. The prescaler allows the oscillator source to be divided by 16 by setting D4=1. However, the prescaler should not be used, i.e., when using the internal oscillator source. The Software Clear (C0HEX), given in Table „Software Clear“, clears the Address Register and the RAM. The display is blanked and the Character Address Register will be set to Character 0. The internal counter and the Control Word Register are unaffected. The Software Clear will remain active until the next data input cycle is initiated. To determine the power deration with a given ambient temperature, use the following formula: Software Clear where: Op code D7 D6 Control Word D5 D4 D3 D2 D1 D0 1 0 0 0 1 0 0 0 Hex Operation C0 CLEAR T jmax = T A + P D ⋅ θ ja where: Tjmax=maximum IC junction temperature PD=power dissipated by the ICs θja=thermal resistance, junction to ambient To determine the power dissipation of the display, use the following formula: PD = N ⋅ I LL ⁄ 140 ⋅ RB N=number of LEDs on ILL/140=average current for a single LED RB=relative brightness level A typical thermal resistance value (θja) for this display is 50 °C/W when mounted in a socket soldered on a 1.57 mm (0.062") thick PCB with 0.5 mm (0.020"), 1 ounce copper traces and the display covered by a plastic filter. The display’s maximum IC junction temperature is 125°C. Power Deration Curve is based on these typical values. Multiplexer and Display Driver The eight characters are row multiplexed with RAM resident column data. The strobe rate is established by the internal or external MUX Clock rate. The MUX Clock frequency is divided by a 320 counter chain. This results in a typical strobe rate of 768 Hz. By pulling the Clock SEL line low, the display can be operated from an external MUX Clock. The external clock is attached to the CLK I/O connection. An asynchronous hardware Reset (pin 24) is also provided. Bringing this pin low will clear the Character Address Register, Control Word Register, RAM, and blanks the display. This action leaves the display set at Character Address 0, and the Brightness Level set at 100%, prescaler ÷1. Power Deration Curve (θja=50°C/W) IDDG5333 2.5 P W 2.0 1.5 1.0 Electrical and Mechanical Considerations Thermal Considerations The display’s power usage may need to be reduced to operate at high ambient temperatures. The power may be reduced by lowering the brightness level, reducing the total number of LEDs illuminated, or lowering VLED. The VCC supply, relative to the VLED supply, has little effect on the power dissipation of the display and is not considered when determining the power dissipation. 0.5 0 -40 -20 0 20 40 60 ˚C 100 T VCC and VLL are two separate power supplies sharing a common ground. VCC supplies power for all the display logic. VLL supplies the power for the LEDs. By separating the two supplies, VCC and VLL can be varied independently and keeps the logic supply clean. 2006-01-23 10 SCE5780 VLL can be varied between 3.0 V and 5.5 V. The LED drive current will vary with changes in VLL. See Figure „ILL variance“: Soldering Considerations The SCE578X can be hand soldered with SN63 solder using a grounded iron set to 260°C. Wave soldering is also possible following these conditions: Preheat that does not exceed 93°C on the solder side of the PC board or a package surface temperature of 85°C. Water soluble organic acid flux (except carboxylic acid) or resin-based RMA flux without alcohol can be used. Wave temperature of 245°C ± 5°C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260°C for five seconds at 1.59 mm (0.063") below the seating plane. The packages should not be immersed in the wave. ILL Variance IDDG5334 1.4 ILL A 1.2 1.0 0.8 0.6 0.4 0.2 0 3 3.5 4 4.5 5 Post Solder Cleaning Procedures The least offensive cleaning solution is hot D.I. water (60°C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents. For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package. For further information refer to Appnotes 18 and 19. An alternative to soldering and cleaning the display modules is to use sockets. Naturally, 14 pin DIP sockets 7.62 mm (0.300") wide with 2.54 mm (0.100") centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN. For further information refer to Appnote 22. V 5.5 VLL VCC can vary between 4.5 V and 5.5 V. Operation below 4.5 V will change the timing and switching levels of the inputs. Interconnect Considerations Optimum product performance can be had when the following electrical and mechanical recommendations are adopted. The SCE578X’s IC is constructed in a high speed CMOS process; consequently high speed noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and RESET lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when using fast line drivers and long cables (> 10 cm). Good ground and power supply decoupling will insure that ICC (< 800 mA peak) switching currents do not generate localized ground bounce. Therefore it is recommended that each display package use a 0.1 µF and 20 µF tantulum capacitor between VCC and ground. When the internal MUX Clock is being used connect the CLKSEL pin to VCC. In those applications where RESET will not be connected to the system’s reset control, it is recommended that this pin be connected to the center node of a series 0.1 µF and 100 kΩ RC network. Thus upon initial power up the RESET will be held low for 10 ms allowing adequate time for the system power supply to stabilize. Optical Considerations The 4.57 mm (0.180") high character of the SCE578X gives readability up to five feet. Proper filter selection enhances readability over this distance. Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit ratio for filters. Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The SCE5780 is a red display and should be used with long wavelength pass filter having a sharp cut-off in the 600 nm to 620 nm range. The SCE5782 is a super-red display and should be used with long wavelength pass filter having a sharp cut-off in the 570 nm to 600 nm range. The SCE5784 is a high efficiency green display and should be used with long wavelength pass filter that peaks at 565 nm. The SCE5785 is a soft orange display and should be used with long wavelength pass filter that peaks at 610 nm. The SCE5786 is an InGaAlP red display and should be used with long wavelength pass filter that peaks at 645 nm. Additional contrast enhancement is gained by shading the displays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow. Optimal filter enhancements are gained by using circular polar- ESD Protection The input protection structure of the SCE578X provides significant protection against ESD damage. It is capable of withstanding discharges greater than 2.0 kV. Take all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in antistatic packaging. 2006-01-23 11 SCE5780 ized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the filter and reflects back off the display to less than 1.0%. Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA. One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA. Data Contents for the Word „ABCDEFGH“ Step Microprocessor Interface The microprocessor interface is through the serial port, SPI port or one out of eight data bits on the eight bit parallel port and also control lines SDCLK and LOAD. Power Up Sequence Upon power up display will come on at random. Thus the display should be reset at power-up. The reset will set the Address Register to Digit 0, User RAM is set to 0 (display blank) the Control Word is set to 0 (100% brightness) and the internal counters are reset. Loading Data into the Display Use following procedure to load data into the display: 1. Power up the display. 2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register, User Ram and Data Register. The display will be blank. Display brightness is set to 100%. 3. If a different brightness is desired, load the proper brightness opcode into the Control Word Register. 4. Load the Digit Address into the display. 5. Load display row and column data for the selected digit. 6. Repeat steps 4 and 5 for all digits. 2006-01-23 12 D4 D3 D2 D1 D0 Function A B D7 D6 D5 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 CLEAR 100% BRIGHTNESS 1 2 3 4 5 6 7 8 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 1 1 1 DIGIT D0 SELECT ROW 0 (A) ROW 1 (A) ROW 2 (A) ROW 3 (A) ROW 4 (A) ROW 5 (A) ROW 6 (A) 9 10 11 12 13 14 15 16 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 1 1 0 1 1 1 DIGIT D1 SELECT ROW 0 (B) ROW 1 (B) ROW 2 (B) ROW 3 (B) ROW 4 (B) ROW 5 (B) ROW 6 (B) 17 18 19 20 21 22 23 24 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 DIGIT D2 SELECT ROW 0 (C) ROW 1 (C) ROW 2 (C) ROW 3 (C) ROW 4 (C) ROW 5 (C) ROW 6 (C) 25 26 27 28 29 30 31 32 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 1 0 DIGIT D3 SELECT ROW 0 (D) ROW 1 (D) ROW 2 (D) ROW 3 (D) ROW 4 (D) ROW 5 (D) ROW 6 (D) 33 34 35 36 37 38 39 40 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 0 0 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 DIGIT D4 SELECT ROW 0 (E) ROW 1 (E) ROW 2 (E) ROW 3 (E) ROW 4 (E) ROW 5 (E) ROW 6 (E) 41 42 43 44 45 46 47 48 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 1 1 0 0 0 0 0 0 DIGIT D5 SELECT ROW 0 (F) ROW 1 (F) ROW 2 (F) ROW 3 (F) ROW 4 (F) ROW 5 (F) ROW 6 (F) 49 50 51 52 53 54 55 56 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 1 0 1 0 0 1 0 0 1 1 0 DIGIT D6 SELECT ROW 0 (G) ROW 1 (G) ROW 2 (G) ROW 3 (G) ROW 4 (G) ROW 5 (G) ROW 6 (G) 57 58 59 60 61 61 62 63 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 DIGIT D7 SELECT ROW 0 (H) ROW 1 (H) ROW 2 (H) ROW 3 (H) ROW 4 (H) ROW 5 (H) ROW 6 (H) SCE5780 Display Interface to Siemens/Intel 8031 Microprocessor (using serial port in mode 0) Display Interface with Motorola 68HC05C4 Microprocessor (using SPI port) VCC VCC 40 XTAL2 RxD VCC 10 38 OSC1 TxD XTAL1 11 U1 8031 VCC 9 GND SDCLK 22 µF TAN LD P3.7 RST P3.3 P3.4 17 13 DATA U1 68HC05C4 1 ID RST VCC GND CLKSEL 11 VCC 10 OSC2 VCC + 19 PA0 PA1 39 SCLK MOSI 33 SDCLK 32 LD VCC RST PA2 GND 20 CS 0.01 µF CLK I/O 0.01 µF 14 22 µF TAN DATA ID RST 9 GND + 40 18 CLK I/O IDCD5227 IDCD5229 Display Interface to Siemens/Intel 8031 Microprocessor (using one bit of parallel port as serial port) Cascading Multiple Displays RST VCC VCC 40 19 XTAL2 P3.1 1 9 20 RST 10 RST P3.6 P0.0 CLK I/O DATA 16 39 SDCLK GND LD CLK SEL 22 µF TAN SDCLK RST 14 more displays in between Intelligent Display VCC 11 XTAL1 U1 8031 VCC P3.0 LOAD CLK I/O CLK SEL Intelligent Display DATA SDCLK LOAD DATA SDCLK + 18 DATA ID RST VCC GND CLKSEL P1.0 0.01 µF CLK I/O 0 A0 A1 A2 A3 Address Decoder Chip 15 LD CE Address Decode 1-14 IDCD5030 IDCD5228 Multiple displays can be cascaded using the CLKSEL and CLK I/O pins (Figure „Cascading Multiple Display“). The display designated as the MasterClock source should have its CLKSEL pin tied high and the slaves should have their CLKSEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters. 2006-01-23 13 SCE5780 Character Set HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE HEX CODE 02 06 0E 1E 0E 06 02 00 00 00 04 0A 11 1F 00 00 01 0E 14 04 04 0A 00 0E 11 11 11 0E 00 00 00 00 00 00 00 02 04 04 04 04 04 02 0E 11 13 15 19 11 0E 0E 11 11 0E 11 11 0E 0E 11 17 15 17 10 0E 11 11 11 1F 11 11 11 1E 11 11 1E 10 10 10 11 11 0A 04 0A 11 11 0C 0C 08 04 00 00 00 10 10 16 19 11 11 11 00 00 1E 11 19 16 10 00 00 11 0A 04 0A 11 04 00 04 08 11 11 0E 00 10 1C 12 12 02 01 00 04 0E 15 15 0E 04 0A 00 11 11 11 11 0E 04 04 04 04 04 00 04 08 04 04 04 04 04 08 04 0C 04 04 04 04 0E 0E 11 11 0F 01 02 0C 0E 11 11 1F 11 11 11 07 04 04 04 04 04 07 0E 11 11 11 15 12 0D 11 11 0A 04 04 04 04 00 00 0E 12 12 12 0D 00 04 00 0C 04 04 0E 00 00 0F 11 13 0D 01 00 00 11 0A 04 04 08 1F 00 11 0A 04 0A 11 0E 11 11 1F 11 11 0E 0E 11 11 11 11 0A 1B 00 0A 00 11 11 11 0E 0A 0A 00 00 00 00 00 00 0A 04 1F 04 0A 00 0E 11 01 06 08 10 1F 00 0C 0C 00 0C 0C 00 1E 11 11 1E 11 11 1E 01 01 01 01 01 11 0E 1E 11 11 1E 14 12 11 1F 01 02 04 08 10 1F 10 10 10 16 19 11 1E 02 00 06 02 02 12 0C 00 00 0B 0C 08 08 08 00 00 1F 02 04 08 1F 1F 00 11 19 15 13 11 00 10 08 04 0A 11 11 04 00 0E 11 1F 11 11 00 04 02 1F 02 04 00 0A 0A 1F 0A 1F 0A 0A 00 04 04 1F 04 04 00 0E 11 01 0E 01 11 0E 0C 0C 00 0C 0C 04 08 0E 11 10 10 10 11 0E 11 12 14 18 14 12 11 0E 11 10 0E 01 11 0E 07 04 04 04 04 04 07 00 00 0E 10 10 11 0E 10 10 12 14 18 14 12 00 00 0E 10 0E 01 1E 02 04 04 08 04 04 02 1F 00 16 19 11 11 11 00 00 09 09 09 0E 10 04 00 0E 12 12 12 0D 00 0F 08 08 08 18 08 04 0F 14 0E 05 1E 04 00 00 00 18 18 08 10 02 06 0A 12 1F 02 02 01 02 04 08 04 02 01 1E 11 11 11 11 11 1E 10 10 10 10 10 10 1F 1F 04 04 04 04 04 04 00 10 08 04 02 01 00 01 01 01 0D 13 11 0F 0C 04 04 04 04 04 0E 08 08 1C 08 08 0A 04 04 04 04 00 04 04 04 00 00 0D 12 12 12 0D 00 01 0E 1A 0A 0A 0A 0A 00 0E 11 1F 11 11 0C 12 04 08 1E 00 00 18 19 02 04 08 13 03 00 00 00 1F 00 00 00 1F 10 1E 01 01 01 1E 00 00 1F 00 1F 00 00 1F 10 10 1E 10 10 1F 11 1B 15 15 11 11 11 11 11 11 11 11 11 0E 1C 04 04 04 04 04 1C 00 00 0E 11 1E 10 0E 00 00 0A 15 11 11 11 00 00 11 11 11 13 0D 08 04 04 02 04 04 08 0C 12 12 16 11 16 10 00 00 0F 12 12 12 0C 0A 00 0E 12 12 12 0D 06 09 08 1C 08 08 1F 08 14 14 08 15 12 0D 00 00 00 00 00 0C 0C 06 08 10 1E 11 11 0E 10 08 04 02 04 08 10 1F 10 10 1E 10 10 10 11 11 19 15 13 11 11 11 11 11 0A 0A 04 04 04 0E 15 04 04 04 04 04 0A 08 1C 08 08 08 00 00 16 19 11 11 11 00 00 11 11 11 0A 04 00 00 08 05 02 00 00 06 08 04 0E 11 11 0E 1F 08 04 02 04 08 1F 0A 0E 11 11 11 11 0E 11 0A 04 04 0E 04 04 0C 0C 04 08 00 00 00 00 01 02 04 08 10 00 1F 01 02 04 08 08 08 0E 11 01 02 04 00 04 0E 11 10 10 13 11 0E 0E 11 11 11 11 11 0E 11 11 11 15 15 1B 11 00 00 00 00 00 00 1F 00 00 0F 11 0F 01 06 00 00 0E 11 11 11 0E 00 00 11 11 15 15 0A 0A 15 0A 15 0A 15 0A IDCS5095 2006-01-23 14 SCE5780 Revision History: 2006-01-23 Previous Version: 2005-01-10 Page Subjects (major changes since last revision) Date of change all Lead free device 2006-01-23 Published by OSRAM Opto Semiconductors GmbH Wernerwerkstrasse 2, D-93049 Regensburg www.osram-os.com © All Rights Reserved. Attention please! The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. Due to technical requirements components may contain dangerous substances. For information on the types in question please contact our Sales Organization. If printed or downloaded, please find the latest version in the Internet. Packing Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1) may only be used in life-support devices or systems2) with the express written approval of OSRAM OS. 1) 2) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system. Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered. 2006-01-23 15