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XB431-LM

XB431-LM

  • 厂商:

    XINLUDA(信路达)

  • 封装:

    SOT-23

  • 描述:

    电压基准 SOT23-3 Adjustable

  • 数据手册
  • 价格&库存
XB431-LM 数据手册
XB431-LM 1 Features 3 Description • The XB431 are precision 1.24 V shunt regulators capable of adjustment to 30 V. Negative feedback from the cathode to the adjust pin controls the cathode voltage, much like a noninverting op amp configuration (Refer to Symbol and Functional Diagrams). A two-resistor voltage divider terminated at the adjust pin controls the gain of a 1.24 V band-gap reference. Shorting the cathode to the adjust pin (voltage follower) provides a cathode voltage of a 1.24 V. 1 • • • • • • Low-Voltage Operation/Wide Adjust Range (1.24 V/30 V) 0.5% Initial Tolerance (XB431) Temperature Compensated for Industrial Temperature Range (39 PPM/°C for the XB431) Low Operation Current (55 µA) Low Output Impedance (0.25 Ω) Fast Turn-On Response Low Cost The XB431 have respective initial tolerances of 1.5%, 1%, and 0.5%, and functionally lend themselves to several applications that require zener diode type performance at low voltages. Applications include a 3 V to 2.7 V low drop-out regulator, an error amplifier in a 3 V off-line switching regulator and even as a voltage detector. These parts are typically stable with capacitive loads greater than 10 nF and less than 50 pF. 2 Applications • • • • • • • Shunt Regulator Series Regulator Current Source or Sink Voltage Monitor Error Amplifier 3-V Off-Line Switching Regulator Low Dropout N-Channel Series Regulator The XB431 provide performance at a competitive price. 4 Device Information(1) PART NUMBER XB431 PACKAGE BODY SIZE (NOM) SOT-23 (5) 2.90 mm x 1.60 mm TO-92 (3) 4.30 mm x 4.30 mm SOT-23 (3) 2.92 mm x 1.30 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 5 Symbol and Functional Diagrams 1 XB431-LM 6 Pin Configurations and Functions TO-92: Plastic Package Top View SOT-23 Top View ANODE REF CATHODE SOT-23 Top View *Pin 1 is not internally connected. *Pin 2 is internally connected to Anode pin. Pin 2 should be either floating or connected to Anode pin. 2 XB431-LM 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Industrial (XB431) Operating temperature MIN MAX −40 85 Commercial (XB431) 0 70 UNIT °C Lead temperature TO-92 Package/SOT-23 -5,-3 Package (Soldering, 10 sec.) 265 Internal power dissipation (2) TO-92 0.78 W SOT-23-5, -3 Package 0.28 W 35 V Cathode voltage Continuous cathode current −30 30 Reference input current −.05 3 (1) (2) mA Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Ratings apply to ambient temperature at 25°C. Above this temperature, derate the TO-92 at 6.2 mW/°C, and the SOT-23-5 at 2.2 mW/°C. See derating curve in Operating Condition section. 7.2 Handling Ratings Tstg Storage temperature range V(ESD) Electrostatic discharge (1) MIN MAX UNIT −65 150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 2000 V The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN Cathode voltage MAX UNIT 30 V 0.1 15 mA −40 85 °C Cathode current Temperature NOM VREF XB431 Derating Curve (Slope = −1/RθJA) 7.4 Thermal Information THERMAL METRIC (1) RθJA (1) (2) Junction-to-ambient thermal resistance (2) XB431 XB431 SOT-23 SOT-23 XB431 TO-92 3 PINS 5 PINS 3 PINS 455 455 161 UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. TJ Max = 150°C, TJ = TA+ (RθJA PD), where PD is the operating power of the device. 3 XB431-LM 7.5 XB431 Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS TA = 25°C VREF Reference Voltage VZ = VREF, IZ = 10 mA (See Figure 32 ) VDEV Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10 mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF TA = Full Range MIN TYP MAX 1.222 1.24 1.258 1.21 1.27 UNIT V 4 12 IZ = 10 mA (see Figure 33 ) VZ from VREF to 6 V R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ −1.5 −2.7 Reference Input Current R1 = 10 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.5 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.05 0.3 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) 55 80 µA IZ(OFF) Off-State Current VZ= 6 V, VREF = 0 V (see Figure 34 ) 0.001 0.1 μA rZ Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1 mA to 15 mA Frequency = 0 Hz (see Figure 32) 0.25 0.4 Ω 'VREF 'VZ (1) mV mV/V Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 V (at 25qC) ¹ © REF T2  T1 § · 6 VDEV r¨ ¸ 10 q V (at 25 C) © REF ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ ¬ © R2 ¹ ¼ 4 XB431-LM 7.6 XB431 Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL VREF PARAMETER TEST CONDITIONS Reference Voltage VDEV VZ = VREF, IZ = 10 mA (See Figure 32 ) Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10 mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF MIN TYP MAX TA = 25°C 1.222 1.24 1.258 TA = Full Range 1.202 1.278 UNIT V 6 20 IZ = 10mA (see Figure 33 ) VZ from VREF to 6V R1 = 10 kΩ, R2 = ∞ and 2.6kΩ −1.5 −2.7 Reference Input Current R1 = 10 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.5 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.1 0.4 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) 55 80 µA IZ(OFF) Off-State Current VZ = 6 V, VREF = 0V (see Figure 34 ) 0.001 0.1 μA rZ Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1 mA to 15 mA Frequency = 0 Hz (see Figure 32) 0.25 0.4 Ω 'VREF 'VZ (1) mV mV/V Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 © VREF (at 25qC) ¹ T2  T1 § · 6 VDEV r¨ ¸ 10 © VREF (at 25q C) ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ ¬ © R2 ¹ ¼ 5 XB431-LM 7.7 XB431Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL VREF PARAMETER TEST CONDITIONS Reference Voltage VZ = VREF, IZ = 10 mA (See Figure 32 ) MIN TYP MAX TA = 25°C 1.228 1.24 1.252 TA = Full Range 1.221 Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10 mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF VDEV 1.259 UNIT V 4 12 IZ = 10 mA (see Figure 33 ) VZ from VREF to 6 V R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ −1.5 −2.7 mV/V Reference Input Current R1 = 1 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.50 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.05 0.3 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) IZ(OFF) Off-State Current VZ = 6 V, VREF = 0V (see Figure 34 ) Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1mA to 15mA Frequency = 0 Hz (see Figure 32) 'VREF 'VZ rZ (1) mV 55 80 µA 0.001 0.1 μA 0.25 0.4 Ω Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 © VREF (at 25qC) ¹ T2  T1 § · 6 VDEV r¨ ¸ 10 © VREF (at 25q C) ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ R2 ¹¼ ¬ © 6 XB431-LM 7.8 XB431 Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C 1.228 1.24 1.252 V TA = Full Range 1.215 1.265 V VREF Reference Voltage VZ = VREF, IZ = 10mA (See Figure 32 ) VDEV Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF 6 20 IZ = 10mA (see Figure 33 ) VZ from VREF to 6 V R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ −1.5 −2.7 Reference Input Current R1 = 10 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.5 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.1 0.4 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) IZ(OFF) Off-State Current VZ = 6 V, VREF = 0 V (see Figure 34 ) Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1 mA to 15 mA Frequency = 0 Hz (see Figure 32) 'VREF 'VZ rZ (1) mV mV/V 55 80 µA 0.001 0.1 μA 0.25 0.4 Ω Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 © VREF (at 25qC) ¹ T2  T1 § · 6 VDEV r¨ ¸ 10 © VREF (at 25q C) ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ R2 ¹¼ ¬ © 7 XB431-LM 7.9 XB431 Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C 1.234 1.24 1.246 V TA = Full Range 1.227 1.253 V VREF Reference Voltage VZ = VREF, IZ = 10 mA (See Figure 32 ) VDEV Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10 mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF 4 12 IZ = 10 mA (see Figure 33 ) VZ from VREF to 6 V R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ −1.5 −2.7 mV/V Reference Input Current R1 = 10 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.50 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.05 0.3 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) IZ(OFF) Off-State Current VZ = 6 V, VREF = 0V (see Figure 34 ) Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1mA to 15mA Frequency = 0 Hz (see Figure 32) 'VREF 'VZ rZ (1) mV 55 80 µA 0.001 0.1 μA 0.25 0.4 Ω Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 © VREF (at 25qC) ¹ T2  T1 § · 6 VDEV r¨ ¸ 10 © VREF (at 25q C) ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ R2 ¹¼ ¬ © 8 XB431-LM 7.10 XB431 Electrical Characteristics TA = 25°C unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C 1.234 1.24 1.246 V TA = Full Range 1.224 1.259 V VREF Reference Voltage VZ = VREF, IZ = 10 mA (See Figure 32 ) VDEV Deviation of Reference Input Voltage Over Temperature (1) VZ = VREF, IZ = 10 mA, TA = Full Range (See Figure 32) Ratio of the Change in Reference Voltage to the Change in Cathode Voltage IREF 6 20 IZ = 10 mA (see Figure 33 ) VZ from VREF to 6V R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ −1.5 −2.7 mV/V Reference Input Current R1 = 10 kΩ, R2 = ∞ II = 10 mA (see Figure 33) 0.15 0.50 μA ∝IREF Deviation of Reference Input Current over Temperature R1 = 10 kΩ, R2 = ∞, II = 10 mA, TA = Full Range (see Figure 33) 0.1 0.4 μA IZ(MIN) Minimum Cathode Current for Regulation VZ = VREF(see Figure 32) IZ(OFF) Off-State Current VZ = 6 V, VREF = 0 V (see Figure 34 ) Dynamic Output Impedance (2) VZ = VREF, IZ = 0.1 mA to 15 mA Frequency = 0 Hz (see Figure 32) 'VREF 'VZ rZ (1) mV 55 80 µA 0.001 0.1 μA 0.25 0.4 Ω Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature range. See the following: The average temperature coefficient of the reference input voltage, ∝VREF, is defined as: v VREF ppm qC § V  VMin · 6 r ¨ Max ¸ 10 © VREF (at 25qC) ¹ T2  T1 § · 6 VDEV r¨ ¸ 10 © VREF (at 25q C) ¹ T2  T1 Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C. v VREF (2) § 6.0 mV · 6 ¨ ¸ 10 © 1240 mV ¹ 125qC 39 ppm / qC The dynamic output impedance, rZ, is defined as: rZ 'VZ 'IZ When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall circuit, rZ, is defined as: rZ 'VZ ª § R1 · º # «rZ ¨ 1  ¸» 'IZ R2 ¹¼ ¬ © 9 XB431-LM 7.11 Typical Performance Characteristics Figure 1. Reference Voltage vs. Junction Temperature Figure 2. Reference Input Current vs. Junction Temperature Figure 3. Cathode Current vs. Cathode Voltage 1 Figure 4. Cathode Current vs. Cathode Voltage 2 Figure 5. Off-State Cathode Current vs. Junction Temperature Figure 6. Delta Reference Voltage Per Delta Cathode Voltage vs. Junction Temperature 10 XB431 XB431 XB431-LM Typical Performance Characteristics (continued) Figure 13. Reference Impedance vs. Frequency Figure 14. Test Circuit For Reference Impedance vs. Frequency Figure 15. Pulse Response 1 Figure 16. Test Circuit For Pulse Response 1 Figure 18. Test Circuit For Pulse Response 2 Figure 17. Pulse Response 2 12 XB431-LM Typical Performance Characteristics (continued) 15 150: VZ CATHODE CURRENT IZ (mA) TA = 25°C IZ = 15mA 12 IZ STABLE STABLE VZ=2V UNSTABLE REGION 9 + CL - 6 VSUPPLY VZ=3V 3 FOR VZ = VREF, STABLE FOR CL = 1pF TO 10k nF 0 0.001 0.01 0.1 1 10 100 1k 10k LOAD CAPACITANCE CL (nF) Figure 19. XB431 Stability Boundary Condition R1 10k: Figure 20. Test Circuit For VZ = VREF 150: VZ IZ + CL - VSUPPLY R2 Extrapolated from life-test data taken at 125°C; the activation energy assumed is 0.7eV. Figure 22. Percentage Change In VREF vs. Operating Life At 55°C Figure 21. Test Circuit For VZ = 2V, 3V 13 XB431-LM 8 Detailed Description 8.1 Functional Block Diagram 14 XB431-LM 9 Application and Implementation 9.1 Typical Application R1 · § VO | ¨ 1  ¸ VREF © R2 ¹ R1 · § ¨ 1  R2 ¸ VREF © ¹ VO MIN VREF  5 V VO Figure 23. Series Regulator Figure 24. Output Control of a Three-Terminal Fixed Regulator R1 · § VLIMIT | ¨ 1  ¸ VREF © R2 ¹ R1 · § VO | ¨ 1  ¸ VREF © R2 ¹ Figure 26. Crow Bar Figure 25. Higher Current Shunt Regulator 15 XB431-LM Typical Application (continued) R1B · § LOW LIMIT | VREF ¨ 1  ¸  VBE © R2B ¹ R1A · § HIGH LIMIT | VREF ¨ 1  ¸ R2A © ¹ R1B · LED ON WHEN § LOW LIMIT | VREF ¨ 1  ¸ © R2B ¹ LOW LIMIT  V   HIGH LIMIT R1A · § HIGH LIMIT | VREF ¨ 1  ¸ © R2A ¹ Figure 28. Voltage Monitor Figure 27. Overvoltage/Undervoltage Protection Circuit IO DELAY R˜C˜Ün VREF RCL V  (V )  VREF Figure 29. Delay Timer Figure 30. Current Limiter or Current Source Figure 31. Constant Current Sink 16 XB431-LM 17 16
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