AS1362-BTTT-25

Datasheet AS1361/AS1362 150mA/300mA, Ultra-Low-Noise, High-PSRR Low Dropout Regulators, with POK 1 General Description 2 Key Features The AS1361/AS1362 are ultra-low-noise, low-dropout linear regulators specifically designed to deliver up to 150/300mA continuous output current, and can achieve a low 140mV dropout for 300mA load current. The LDOs are designed and optimized to work with low-cost, smallcapacitance ceramic capacitors. The devices are available as the standard products listed in Table 1. Table 1. Standard Products ! Preset Output Voltages: 1.5 to 4.5V (in 50mV steps) ! Output Noise: 9µVRMS @ 100Hz to 100kHz ! Power-Supply Rejection Ratio: 92dB @ 1kHz ! Low Dropout: 140mV @ 300mA Load ! Power-OK Output ! Stable with 1µF Ceramic Capacitor for any Load Model Load Current Output Voltage ! Guaranteed 150/300mA Output AS1361 150mA Preset – 1.5 to 4.5V ! 1.25V Internal Reference AS1362 300mA Preset – 1.5 to 4.5V ! Extremely-Low Quiescent Current: 40µA An integrated P-channel MOSFET pass transistor allows the devices to maintain extremely low quiescent current (40µA). ! Excellent Load/Line Transient ! Overcurrent and Thermal Protection The AS1361/AS1362 uses an advanced architecture to achieve ultra-low output voltage noise of 9µVRMS and a power-supply rejection-ratio of better than 80dB (up to 10kHz). ! TSOT23 6-pin Package 3 Applications The devices are ideal for mobile phones, wireless phones, PDAs, handheld computers, mobile phone base stations, Bluetooth portable radios and accessories, wireless LANs, digital cameras, personal audio devices, and any other portable, battery-powered application. An active-Low, open-drain power-ok output indicates if the output voltage is within regulation. The AS1361/AS1362 requires only 1µF output capacitor for stability at any load. When the LDO is disabled, current consumption drops below 500nA. The devices are available in a TSOT23 6-pin package. Figure 1. Typical Application Circuit Input 2 to 5.5V OUT IN CIN 1µF On Off Output 1.5 to 4.5V 6 1 IN 1 6 OUT 100kΩ 3 SHDNN AS1361/ AS1362 2 GND www.austriamicrosystems.com 4 GND 2 POK 5 BYPASS CBYPASS 10nF SHDNN 3 AS1361/ AS1362 5 BYPASS 4 POK COUT 1µF Revision 1.03 1 - 15 AS1361/AS1362 Datasheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignments (Top View) IN 1 GND 2 6 OUT AS1361/ AS1362 SHDNN 3 5 BYPASS 4 POK TSOT23 6-pin Pin Descriptions Table 2. Pin Descriptions Pin Number Pin Name 1 IN 2 GND 3 SHDNN Description Unregulated Input Supply. Ground Shutdown. Pull this pin low to disable the LDO. Power-OK Output. Active-Low, open-drain output indicates if the output voltage is within regulation. 0 = VOUT 94% VOUTNOM 4 POK 5 BYPASS Noise Bypass for Low-Noise Operation. Connect a 10nF capacitor from this pin to OUT. Note: This pin is shorted to GND in shutdown mode. 6 OUT Regulated Output Voltage. Bypass this pin with a capacitor to GND. See Capacitor Selection and Regulator Stability on page 12 for more details. www.austriamicrosystems.com Revision 1.03 2 - 15 AS1361/AS1362 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings Parameter Min Max Units IN to GND -0.3 +7 V OUT, SHDNN, POK to GND -0.3 IN + 0.3 V BYPASS to GND -0.3 OUT + 0.3 V Output Short-Circuit Duration Infinite Thermal Resistance ΘJA 201.7 ºC/W +85 ºC Operating Temperature Range -40 Junction Temperature Storage Temperature Range Package Body Temperature www.austriamicrosystems.com -65 +150 ºC +150 ºC +260 ºC Revision 1.03 Comments on PCB The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020D “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). 3 - 15 AS1361/AS1362 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VIN = VOUT +0.5V, CIN = 1µF, COUT = 1µF, CBYPASS = 10nF, TAMB = -40 to +85ºC (unless otherwise specified). Typ values are at TAMB = +25ºC. Limits 100% tested at +25ºC. Limits over operating temperature range guaranteed by design. Table 4. Electrical Characteristics Symbol Parameter VIN Input Voltage Range Condition Output Voltage Accuracy IOUT Maximum Output Current ILIMIT Current Limit Dropout Voltage 1 Min Max Unit 2 Typ 5.5 V IOUT = 1mA, TAMB = +25ºC -0.5 +0.5 IOUT = 100µA to 150mA, TAMB = +25ºC (AS1361) -0.75 +0.75 IOUT = 100µA to 300mA, TAMB = +25ºC (AS1362) -1.0 +1.0 IOUT = 100µA to 150mA, (AS1361) -1.5 +1.5 IOUT = 100µA to 300mA, (AS1362) -2.0 +2.0 AS1361 150 AS1362 300 % mA AS1361, OUT = 90% of nom., TAMB = +25ºC 270 AS1362, OUT = 90% of nom., TAMB = +25ºC 510 VOUT ≥ 3V, IOUT = 150mA 70 95 VOUT ≥ 3V, IOUT = 300mA, AS1362 140 200 2.5V ≤ VOUT < 3V, IOUT = 150mA 90 120 2.5V ≤ VOUT < 3V, IOUT = 300mA, AS1362 170 230 2.0V ≤ VOUT < 2.5V, IOUT = 150mA 140 190 2.0V ≤ VOUT < 2.5V, IOUT = 300mA, AS1362 270 350 mA mV IOUT = 0.05mA 40 90 VIN = VOUTNOM - 0.1V, IOUT = 0mA 150 250 Line Regulation VIN = (VOUT +0.5V) to 5.5V, IOUT = 0.1mA 0.02 %/V VLDR Load Regulation IOUT = 1 to 150/300mA 0.0005 %/mA ISHDNN Shutdown Supply Current IQ Quiescent Current VLNR PSRR Ripple Rejection Output Noise Voltage (RMS) SHDNN = 0V 9 f = 1kHz, IOUT = 10mA 92 f = 10kHz, IOUT = 10mA 80 f = 100kHz, IOUT = 10mA 62 f = 100Hz to 100kHz, ILOAD = 0 to 150/300mA 9 500 µA nA dB µV Shutdown 2 RLOAD = 50Ω 300 µs SHDNN Logic Low Level VIN = 2 to 5.5V 0.4 V SHDNN Logic High Level VIN = 2 to 5.5V 1.5 IOUT = 0, VOUTRISING 90 Shutdown Exit Delay V Power-OK Output VPOK VOL Power-OK Voltage Threshold Hysteresis, IOUT = 0 94 98 1.5 % VOUT POK Output Voltage Low ISINK = 1mA 0.3 V POK Output Leakage Current VOUT in regulation 1 µA www.austriamicrosystems.com Revision 1.03 4 - 15 AS1361/AS1362 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 4. Electrical Characteristics (Continued) Symbol Parameter Condition Min Typ Max Unit Thermal Protection TSHDNM ΔTSHDN M Thermal Shutdown Temperature 160 ºC Thermal Shutdown Hysteresis 15 ºC 1. Dropout is defined as VIN - VOUT when VOUT is 100mV below the value of VOUT for VIN = VOUT + 0.5V. 2. Time needed for VOUT to reach 90% of final value. Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. www.austriamicrosystems.com Revision 1.03 5 - 15 AS1361/AS1362 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VIN = VOUT + 0.5V, CIN = COUT = 1µF, CBYPASS = 10nF, TAMB = 25°C (unless otherwise specified). Figure 3. Output Voltage vs. Input Voltage Figure 4. Output Voltage Accuracy vs. Load Current 3.5 . 0.5 0.4 Output Voltage Deviation (%) Output Voltage (V) . 3 IOUT = 150mA 2.5 IOUT = 300mA 2 1.5 1 0.5 0 0.3 0.2 0.1 Temp = -45°C 0 -0.1 Temp = 25°C -0.2 Temp = 85°C -0.3 -0.4 -0.5 0 1 2 3 4 5 6 0 50 Input Voltage (V) 100 150 200 250 300 Load Current (mA) Figure 5. Output Voltage Accuracy vs. Temperature Figure 6. Dropout Voltage vs. Load Current 1 . 140 Dropout Voltage (mV) . Output Voltage Deviation (%) 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 100 Temp = 85°C Temp = 25°C 80 60 Temp = -45°C 40 20 -0.8 -1 -40 120 0 -15 10 35 60 85 0 Temperature (°C) 50 100 150 200 250 300 Load Current (mA) Figure 7. Dropout Voltage vs. Output Voltage Dropout Voltage (mV) . 80 70 60 50 40 30 20 10 0 2 2.2 2.4 2.6 2.8 3 3.2 Output Voltage (V) www.austriamicrosystems.com Revision 1.03 6 - 15 AS1361/AS1362 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 8. Ground Pin Current vs. Input Voltage Figure 9. Ground Pin Current vs. Load Current 80 100 IOUT= 300mA 75 IOUT = 150mA 50 IOUT = 0mA 25 . 125 75 Ground Pin Current (µA) Ground Pin Current (µA) . 150 70 65 60 55 50 45 40 35 0 0 1 2 3 4 5 0 6 50 100 150 200 250 300 Load Current (mA) Input Voltage (V) Figure 10. Ground Pin Current vs. Temperature Figure 11. PSRR vs. Frequency; IOUT = 10mA 100 45 80 PSRR (dB) Ground Pin Current (µA) . 50 40 35 30 25 -40 60 40 20 -15 10 35 60 0 0.01 85 Temperature (°C) Figure 12. Output Noise Spectral Density vs. Freq. 100 10000 Figure 13. Output Noise vs. Bypass Capacitance 10000 15 . 14 . 13 12 1000 Noise (µVrms) Output Noise Density (nV/ Hz) 1 Frequency (kHz) 100 11 10 9 8 7 6 10 0.01 5 0.1 1 10 100 1 Frequency (kHz) www.austriamicrosystems.com 10 100 Capacitance (nF) Revision 1.03 7 - 15 AS1361/AS1362 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 200µs/Div 2V/Div SHDNN 2V/DIV VOUT POK 20mV/DIV VIN VOUT 2V/Div Figure 17. Enter & Exit Shutdown Delay 500mV/Div Figure 16. Line Transient Response 200µs/Div www.austriamicrosystems.com 20mA/Div IOUT VOUT 200µs/Div 20mV/DIV 20mA/Div Figure 15. Load Transient Response near Dropout, VIN = 3.4V, VOUT = 3.3V 20mV/DIV VOUT IOUT Figure 14. Load Transient Response, VIN = 3.8V, VOUT = 3.3V 200µs/Div Revision 1.03 8 - 15 AS1361/AS1362 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS1361/AS1362 are ultra-low-noise, low-dropout, low-quiescent current linear-regulators specifically designed for space-limited applications. The devices are available with preset output voltages from 1.5 to 4.5V in 50mV increments. These devices can supply loads up to 150/300mA. As shown in Figure 18, the AS1361/AS1362 consist of an integrated bandgap core and noise bypass circuitry, error amplifier, P-channel MOSFET pass transistor, and internal feedback voltage-divider. The output voltage is fed back through an internal resistor voltage-divider connected to pin OUT. An external bypass capacitor connected to pin BYPASS reduces noise at the output. Additional blocks include a current limiter, thermal sensor, and shutdown logic. Internal Voltage Reference The 1.25V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. Internal P-Channel Pass Transistor The AS1361/AS1362 feature a 0.5Ω (typ) P-channel MOSFET pass transistor, which provides several advantages over similar designs using a PNP pass transistor, including prolonged battery life. The P-channel MOSFET does not require a base driver, thus quiescent current is dramatically reduced. The AS1361/AS1362 LDOs do not exhibit problems associated with typical PNP-based LDOs, and consume only 40µA of quiescent current in light load and 220µA in dropout (see Typical Operating Characteristics on page 6). Output Voltage The AS1361/AS1362 deliver preset output voltages from 1.5 to 4.5V, in 50mV increments (see Ordering Information on page 14). Shutdown The AS1361/AS1362 feature a low-power shutdown mode that reduces quiescent current to