74LVC2G06GXZ

74LVC2G06 Inverters with open-drain outputs Rev. 8 — 12 December 2016 Product data sheet 1. General description The 74LVC2G06 provides two inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits             Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard:  JESD8-7 (1.65 V to 1.95 V)  JESD8-5 (2.3 V to 2.7 V)  JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V 24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and 40 C to +125 C 74LVC2G06 Nexperia Inverters with open-drain outputs 3. Ordering information Table 1. Ordering information Type number 74LVC2G06GW Package Temperature range Name Description Version 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC2G06GV 40 C to +125 C TSOP6 plastic surface-mounted package (TSOP6); 6 leads SOT457 74LVC2G06GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1  1.45  0.5 mm SOT886 74LVC2G06GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1  1  0.5 mm SOT891 74LVC2G06GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9  1.0  0.35 mm SOT1115 74LVC2G06GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0  1.0  0.35 mm SOT1202 74LVC2G06GX 40 C to +125 C X2SON6 plastic thermal extremely thin small outline package; SOT1255 no leads; 6 terminals; body 1  0.8  0.35 mm 4. Marking Table 2. Marking Type number Marking code[1] 74LVC2G06GW V6 74LVC2G06GV V06 74LVC2G06GM V6 74LVC2G06GF V6 74LVC2G06GN V6 74LVC2G06GS V6 74LVC2G06GX V6 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram  $ <  $   < <  $ <  $   < $ *1' PQE Fig 1. Logic symbol 74LVC2G06 Product data sheet PQD PQE Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 December 2016 Fig 3. Logic diagram (one driver) © Nexperia B.V. 2017. All rights reserved 2 of 19 74LVC2G06 Nexperia Inverters with open-drain outputs 6. Pinning information 6.1 Pinning /9&* /9&* $   < *1'   9&& $   < $   < *1'   9&& $   < DDE 7UDQVSDUHQWWRSYLHZ DDE Fig 4. Pin configuration SOT363 and SOT457 Fig 5. Pin configuration SOT886 /9&* /9&* $  $   < *1'   9&& $   < *1' <    $ DDJ  < DDD 7UDQVSDUHQWWRSYLHZ Fig 6. 9&&  7UDQVSDUHQWWRSYLHZ Pin configuration SOT891, SOT1115 and SOT1202 Fig 7. Pin configuration SOT1255 (X2SON6) 6.2 Pin description Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output 74LVC2G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 December 2016 © Nexperia B.V. 2017. All rights reserved 3 of 19 74LVC2G06 Nexperia Inverters with open-drain outputs 7. Functional description Table 4. Function table[1] Input nA Output nY L Z H L [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current Conditions input voltage IOK output clamping current VO < 0 V VO output voltage Active mode Power-down mode IO output current Max Unit +6.5 V 50 - [1] 0.5 +6.5 50 - [1] 0.5 +6.5 V [1][2] 0.5 +6.5 V - 50 mA VI < 0 V VI Min 0.5 VO = 0 V to 6.5 V mA V mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 and X2SON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Conditions Min Typ Max Unit 1.65 - 5.5 V 0 - 5.5 V Active mode 0 - 5.5 V Power-down mode; VCC = 0 V 0 - 5.5 V 40 - +125 - - 20 ns/V - - 10 ns/V Tamb ambient temperature t/V input transition rise and VCC = 1.65 V to 2.7 V fall rate VCC = 2.7 V to 5.5 V 74LVC2G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 December 2016 © C Nexperia B.V. 2017. All rights reserved 4 of 19 74LVC2G06 Nexperia Inverters with open-drain outputs 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ[1] Max Unit Tamb = 40 C to +85 C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage 0.65  VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.65 V to 1.95 V 0.35  VCC V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.3 V 0.3  VCC V VI = VIH or VIL IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V - - 0.55 V - 0.1 1 A IO = 32 mA; VCC = 4.5 V [2] II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - 0.1 2 A IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - 0.1 2 A ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - 0.1 4 A ICC additional supply current per pin; VI = VCC  0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - 5 500 A CI input capacitance - 2.5 - pF 74LVC2G06 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 December 2016 © Nexperia B.V. 2017. All rights reserved 5 of 19 74LVC2G06 Nexperia Inverters with open-drain outputs Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Typ[1] Max 0.65  VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.65 V to 1.95 V - - Conditions Unit Tamb = 40 C to +125 C HIGH-level input voltage VIH LOW-level input voltage VIL LOW-level output voltage VOL VCC = 1.65 V to 1.95 V 0.35  VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.10 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.80 V 0.3  VCC V VI = VIH or VIL II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 2 A IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - - 2 A ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - - 4 A ICC additional supply current per pin; VI = VCC  0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - - 500 A [1] All typical values are measured at Tamb = 25 C. [2] These typical values are measured at VCC = 3.3 V. 74LVC2G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 December 2016 © Nexperia B.V. 2017. All rights reserved 6 of 19 74LVC2G06 Nexperia Inverters with open-drain outputs 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9. Symbol Parameter 40 C to +85 C Conditions power dissipation capacitance CPD Unit Min Max Min Max VCC = 1.65 V to 1.95 V 1.0 3.2 6.5 1.0 8.2 ns VCC = 2.3 V to 2.7 V 0.5 2.0 3.9 0.5 4.9 ns VCC = 2.7 V 1.0 2.6 4.2 1.0 5.3 ns VCC = 3.0 V to 3.6 V 0.5 2.3 3.4 0.5 4.3 ns VCC = 4.5 V to 5.5 V 0.5 1.6 2.9 0.5 3.7 ns - 5.9 - - - pF [2] propagation delay nA to nY; see Figure 8 tpd 40 C to +125 C Typ[1] VI = GND to VCC; VCC = 3.3 V [3] [1] Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLZ and tPZL. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 12. Waveforms 9, 90 Q$LQSXW *1' W 3=/ W 3/= 9&& Q