XL13700

XD13700 DIP16 / XL13700 SOP16 1 Features 3 Description • • • • • • The XD13700 series consists of two currentcontrolled transconductance amplifiers, each with differential inputs and a push-pull output. The two amplifiers share common supplies but otherwise operate independently. Linearizing diodes are provided at the inputs to reduce distortion and allow higher input levels. The result is a 10-dB signal-tonoise improvement referenced to 0.5 percent THD. High impedance buffers are provided which are especially designed to complement the dynamic range of the amplifiers. The output buffers of the XD13700 differ from those of the XL13700 in that their input bias currents (and thus their output DC levels) are independent of IABC. This may result in performance superior to that of theXL13700 in audio applications. 1 gm Adjustable Over 6 Decades Excellent gm Linearity Excellent Matching Between Amplifiers Linearizing Diodes for reduced output distortion High Impedance Buffers High Output Signal-to-Noise Ratio 2 Applications • • • • • • • • Current-Controlled Amplifiers Stereo Audio Amplifiers Current-Controlled Impedances Current-Controlled Filters Current-Controlled Oscillators Multiplexers Timers Sample-and-Hold Circuits Device Information(1) PART NUMBER 13700 Connection Diagram 1 1 PACKAGE BODY SIZE (NOM) SOIC (16) 3.91 mm × 9.90 mm PDIP (16) 6.35 mm × 19.304 mm XD13700 DIP16 / XL13700 SOP16 5 Pin Configuration and Functions D or NFG Package 16-Pin SOIC or PDIP Top View Pin Functions PIN I/O DESCRIPTION NAME NO. Amp bias input 1, 16 A Current bias input Buffer input 7, 10 A Buffer amplifier input Buffer output 8, 9 A Buffer amplifier output Diode bias 2, 15 A Linearizing diode bias input Input+ 3, 14 A Positive input Input– 4, 13 A Negative input Output 5, 12 A Unbuffered output V+ 11 P Positive power supply V– 6 P Negative power supply 2 XD13700 DIP16 / XL13700 SOP16 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Supply voltage DC input voltage MAX UNIT 36 VDC or ±18 V −VS V +VS Differential input voltage ±5 V Diode bias current (ID) 2 mA Amplifier bias current (IABC) 2 mA Buffer output current (2) 20 mA Power dissipation (3) TA = 25°C – XD13700 570 mW 150 °C Output short circuit duration Continuous −65 Storage temperature, Tstg (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Buffer output current should be limited so as to not exceed package dissipation. (3) For operation at ambient temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and a thermal resistance, junction to ambient, as follows: XD13700, 90°C/W; XL13700, 110°C/W. 6.2 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) V+ (single-supply configuration) MIN MAX 9.5 32 UNIT V V V+ (dual-supply configuration) 4.75 16 V– (dual-supply configuration) –16 –4.75 V 0 70 °C Operating temperature, TA XD13700 6.3 Thermal Information XD13700 THERMAL METRIC (1) D (SOIC) NFG (PDIP) UNIT 16 PINS 16 PINS RθJA Junction-to-ambient thermal resistance 83.0 43.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 44.0 34.9 °C/W RθJB Junction-to-board thermal resistance 40.5 28.3 °C/W ψJT Junction-to-top characterization parameter 11.5 19.1 °C/W ψJB Junction-to-board characterization parameter 40.2 28.2 °C/W 3 XD13700 DIP16 / XL13700 SOP16 6.4 Electrical Characteristics These specifications apply for VS = ±15 V, TA = 25°C, amplifier bias current (IABC) = 500 μA, pins 2 and 15 open unless otherwise specified. The inputs to the buffers are grounded and outputs are open. PARAMETER TYP MAX Over specified temperature range 0.4 4 IABC = 5 μA 0.3 4 VOS including diodes Diode bias current (ID) = 500 μA 0.5 5 mV Input offset change 5 μA ≤ IABC ≤ 500 μA 0.1 3 mV 0.1 0.6 μA 0.4 5 1 8 9600 13000 Input offset voltage (VOS) TEST CONDITIONS MIN Input offset current Input bias current Forward transconductance (gm) Over specified temperature range 6700 Over specified temperature range 5400 gm tracking 0.3 RL = 0, IABC = 5 μA Peak output current Supply current UNIT mV μA μS dB 5 RL = 0, IABC = 500 μA 350 RL = 0, Over Specified Temp Range 300 IABC = 500 μA, both channels CMRR Common-mode range 500 650 μA 2.6 mA 80 110 dB ±12 ±13.5 V Crosstalk Referred to input (1) 20 Hz < f < 20 kHz 100 dB Differential input current IABC = 0, input = ±4 V 0.02 100 Leakage current IABC = 0 (refer to test circuit) 0.2 100 Input resistance 10 Open-loop bandwidth Slew rate Unity gain compensated Buffer input current See (1) Peak buffer output voltage See (1) nA nA 26 kΩ 2 MHz 50 0.5 V/μs 2 10 μA V PEAK OUTPUT VOLTAGE Positive RL = ∞, 5 μA ≤ IABC ≤ 500 μA 12 14.2 V Negative RL = ∞, 5 μA ≤ IABC ≤ 500 μA −12 −14.4 V VOS SENSITIVITY (1) Positive ΔVOS/ΔV+ 20 150 μV/V Negative ΔVOS/ΔV− 20 150 μV/V These specifications apply for VS = ±15 V, IABC = 500 μA, ROUT = 5-kΩ connected from the buffer output to −VS and the input of the buffer is connected to the transconductance amplifier output. 4 XD13700 DIP16 / XL13700 SOP16 6.5 Typical Characteristics Figure 1. Input Offset Voltage Figure 2. Input Offset Current Figure 3. Input Bias Current Figure 4. Peak Output Current Figure 5. Peak Output Voltage and Common Mode Range Figure 6. Leakage Current 5 XD13700 DIP16 / XL13700 SOP16 Typical Characteristics (continued) Figure 7. Input Leakage Figure 8. Transconductance Figure 9. Input Resistance Figure 10. Amplifier Bias Voltage vs. Amplifier Bias Current Figure 11. Input and Output Capacitance Figure 12. Output Resistance 6 XD13700 DIP16 / XL13700 SOP16 Typical Characteristics (continued) Figure 13. Distortion vs. Differential Input Voltage Figure 14. Voltage vs. Amplifier Bias Current Figure 15. Output Noise vs Frequency 7 XD13700 DIP16 / XL13700 SOP16 7 Detailed Description 7.1 Overview The XD13700 is a two channel current controlled differential input transconductance amplifier with additional output buffers. The inputs include linearizing diodes to reduce distortion, and the output current is controlled by a dedicated pin. The outputs can sustain a continuous short to ground. 7.2 Functional Block Diagram Figure 16. One Operational Transconductance Amplifier 7.3 Feature Description 7.3.1 Circuit Description The differential transistor pair Q4 and Q5 form a transconductance stage in that the ratio of their collector currents is defined by the differential input voltage according to the transfer function: (1) where VIN is the differential input voltage, kT/q is approximately 26 mV at 25°C and I5 and I4 are the collector currents of transistors Q5 and Q4 respectively. With the exception of Q12 and Q13, all transistors and diodes are identical in size. Transistors Q1 and Q2 with Diode D1 form a current mirror which forces the sum of currents I4 and I5 to equal IABC: I4 + I5 = IABC (2) where IABC is the amplifier bias current applied to the gain pin. For small differential input voltages the ratio of I4 and I5 approaches unity and the Taylor series of the In function is approximated as: (3) (4) 8 XD13700 DIP16 / XL13700 SOP16 Feature Description (continued) Collector currents I4 and I5 are not very useful by themselves and it is necessary to subtract one current from the other. The remaining transistors and diodes form three current mirrors that produce an output current equal to I5 minus I4 thus: (5) The term in brackets is then the transconductance of the amplifier and is proportional to IABC. 7.3.2 Linearizing Diodes For differential voltages greater than a few millivolts, Equation 3 becomes less valid and the transconductance becomes increasingly nonlinear. Figure 19 demonstrates how the internal diodes can linearize the transfer function of the amplifier. For convenience assume the diodes are biased with current sources and the input signal is in the form of current IS. Since the sum of I4 and I5 is IABC and the difference is IOUT, currents I4 and I5 is written as follows: (6) Since the diodes and the input transistors have identical geometries and are subject to similar voltages and temperatures, the following is true: (7) Notice that in deriving Equation 7 no approximations have been made and there are no temperature-dependent terms. The limitations are that the signal current not exceed ID / 2 and that the diodes be biased with currents. In practice, replacing the current sources with resistors will generate insignificant errors. 7.4 Device Functional Modes Use in single ended or dual supply systems requires minimal changes. The outputs can support a sustained short to ground. Note that use of the XD13700 in ±5 V supply systems requires will reduce signal dynamic range; this is due to the PNP transistors having a higher VBE than the NPN transistors. 7.4.1 Output Buffers Each channel includes a separate output buffer which consists of a Darlington pair transistor that can drive up to 20mA. 9 XD13700 DIP16 / XL13700 SOP16 8 Application and Implementation 8.1 Application Information An OTA is a versatile building block analog component that can be considered an ideal transistor. The XD13700 can be used in a wide variety of applications, from voltage-controlled amplifiers and filters to VCOs. The 2 wellmatched, independent channels make the XL13700 well suited for stereo audio applications. 8.2 Typical Application Figure 17. Voltage Controlled Amplifier 8.2.1 Design Requirements For this example application, the system requirements provide a volume control for a 1 VP input signal with a THD < 0.1% using ±15 V supplies. The volume control varies between -13 V and 15 V and needs to provide an adjustable gain range of >30dB. 8.2.2 Detailed Design Procedure Using the linearizing diodes is recommended for most applications, as they greatly reduce the output distortion. It is required that the diode bias current, ID be greater than twice the input current, IS. As the input voltage has a DC level of 0 V, the Diode Bias input pins are 1 diode drop above 0 V, which is +0.7 V. Tying the bias to the clean V+ supply, results in a voltage drop of 14.3 V across RD. Using the recommended 1mA for ID is appropriate here, and with VS=+15 V, the voltage drop is 14.3 V, and so using the standard value of 13-kΩ is acceptable and will provide the desired gain control. To obtain the