S-8259AAF-M6T1U

S-8259A Series www.ablic.com BATTERY MONITORING IC FOR 1-CELL PACK © ABLIC Inc., 2015-2019 Rev.1.1_02 The S-8259A Series is an IC including high-accuracy voltage detection circuits and delay circuits. The S-8259A Series is suitable for monitoring overcharge and overdischarge for 1-cell lithium-ion / lithium polymer rechargeable battery packs.  Features • High-accuracy voltage detection circuit Overcharge detection voltage 3.500 V to 4.600 V (5 mV step) Accuracy ±20 mV Overcharge release voltage 3.100 V to 4.600 V*1 Accuracy ±50 mV Overdischarge detection voltage 2.000 V to 3.400 V (10 mV step) Accuracy ±50 mV Overdischarge release voltage 2.000 V to 3.400 V*2 Accuracy ±100 mV • Detection delay times are generated only by an internal circuit (external capacitors are unnecessary). • CO pin output logic: Active "H", active "L" • Wide operation temperature range: Ta = −40°C to +85°C • Low current consumption During operation: 1.5 μA typ., 3.0 μA max. (Ta = +25°C) During overdischarge: 2.0 μA max. (Ta = +25°C) • Lead-free (Sn 100%), halogen-free *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (Overcharge hysteresis voltage can be selected from a range of 0 V to 0.4 V in 50 mV step.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (Overdischarge hysteresis voltage can be selected from a range of 0.1 V to 0.7 V in 100 mV step.)  Applications • Lithium-ion rechargeable battery pack • Lithium polymer rechargeable battery pack  Package • SOT-23-6 1 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Block Diagram 1. CO pin output logic active "H" VDD Overdischarge detection comparator DO Overcharge detection comparator Control logic VSS Delay circuit Oscillator CO VM Figure 1 2 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02 2. CO pin output logic active "L" VDD Overdischarge detection comparator DO Overcharge detection comparator Control logic VSS Delay circuit Oscillator CO VM Figure 2 3 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Product Name Structure 1. Product name S-8259A xx - M6T1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and IC packing specifications*1 M6T1: SOT-23-6, Tape Serial code*2 Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Package Package Name SOT-23-6 4 Table 1 Package Drawing Codes Dimension Tape MP006-A-P-SD MP006-A-C-SD Reel MP006-A-R-SD BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02 3. Product name list Table 2 Product Name S-8259AAA-M6T1U S-8259AAB-M6T1U S-8259AAC-M6T1U S-8259AAD-M6T1U S-8259AAE-M6T1U S-8259AAG-M6T1U S-8259AAH-M6T1U S-8259AAI-M6T1U S-8259AAJ-M6T1U S-8259AAK-M6T1U S-8259AAL-M6T1U S-8259AAM-M6T1U S-8259AAN-M6T1U S-8259AAO-M6T1U S-8259AAP-M6T1U S-8259AAQ-M6T1U Overcharge Detection Voltage [VCU] Overcharge Overdischarge Overdischarge Overcharge Overcharge Overdischarge Detection Release Detection Release Detection CO Pin Release Delay Time Delay Time Voltage Voltage Voltage Delay Time Output Logic*1 [tCU] [VCL] [VDL] [VDU] [tDL] [tCL] 4.275 V 4.250 V 3.900 V 4.200 V 4.200 V 4.175 V 4.100 V 3.800 V 4.100 V 4.200 V 2.300 V 2.500 V 2.000 V 2.500 V 2.800 V 2.600 V 3.000 V 2.300 V 3.000 V 3.000 V 3.650 V 4.425 V 4.350 V 4.250 V 4.375 V 3.475 V 4.050 V 3.600 V 4.200 V 4.250 V 4.170 V 3.650 V 4.325 V 4.350 V 4.250 V 4.375 V 3.475 V 4.050 V 3.600 V 4.200 V 4.150 V 3.770 V 2.500 V 2.600 V 2.600 V 2.300 V 2.800 V 2.800 V 2.500 V 2.900 V 3.300 V 2.800 V 2.800 V 3.000 V 2.900 V 3.000 V 2.600 V 3.000 V 2.880 V 3.000 V 2.980 V 3.400 V 3.000 V 3.400 V 1.0 s 1.0 s 1.0 s 256 ms 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 256 ms 32 ms 128 ms 32 ms 2.0 s 4.0 s 4.0 s 32 ms 4.0 s 4.0 s 4.0 s 64 ms 128 ms 256 ms 256 ms 1.0 s 1.0 s 32 ms 64 ms 64 ms 128 ms 1.0 s 128 ms 128 ms 1.0 s 1.0 s Active "L" Active "L" Active "L" Active "L" Active "L" Active "L" Active "L" Active "L" Active "L" Active "L" 32 ms 128 ms 32 ms 32 ms Active "H" Active "L" Active "H" Active "H" 128 ms 256 ms Active "L" Active "L" 128 ms 256 ms 128 ms 32 ms 256 ms 1.0 s *1. CO pin output logic: Active "H", active "L" Remark 1. Please contact our sales representatives for products other than the above. 2. The delay times can be changed within the range listed in Table 3. For details, please contact our sales representatives. Table 3 Delay Time Overcharge detection delay time Overcharge release delay time overdischarge detection delay time Symbol Selection Range Remark tCU 128 ms 256 ms 512 ms 1.0 s 2.0 s 4.0 s tCL 32 ms 64 ms 128 ms 1.0 s 2.0 s 4.0 s tDL 32 ms 64 ms 128 ms 256 ms − − Select a value from the left. Select a value from the left. Select a value from the left. 5 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Pin Configuration 1. SOT-23-6 Table 4 Top view 6 5 4 1 2 3 Figure 3 Pin No. Symbol 1 DO 2 VM 3 CO 4 NC*1 Description Output pin for overdischarge detection (CMOS output) Negative power supply input pin for CO pin Output pin for overcharge detection (CMOS output) No connection 5 VDD Input pin for positive power supply 6 VSS Input pin for negative power supply *1. The NC pin is electrically open. The NC pin can be connected to VDD pin or VSS pin. 6 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Absolute Maximum Ratings Table 5 (Ta = +25°C unless otherwise specified) Item Symbol Input voltage between VDD pin and VSS pin VM pin input voltage DO pin output voltage CO pin output voltage Power dissipation Operation ambient temperature VDS VVM VDO VCO PD Topr Storage temperature Tstg Applied Pin Absolute Maximum Rating Unit VSS − 0.3 to VSS + 6 VDD − 28 to VDD + 0.3 VSS − 0.3 to VDD + 0.3 VVM − 0.3 to VDD + 0.3 VDD VM DO CO − − 650*1 −40 to +85 V V V V mW °C − −55 to +125 °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 700 Power Dissipation (PD) [mW] Caution 600 500 400 300 200 100 0 0 50 100 150 Ambient Temperature (Ta) [°C] Figure 4 Power Dissipation of Package (When Mounted on Board) 7 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Electrical Characteristics 1. Ta = +25°C Item Table 6 Symbol Condition Min. (Ta = +25°C unless otherwise specified) Test Typ. Max. Unit Circuit Detection Voltage Overcharge detection voltage VCU − *1 Ta = −10°C ~ +60°C VCL ≠ VCU VCL = VCU − VDL ≠ VDU VCU − 0.020 VCU VCU + 0.020 VCU − 0.025 VCU VCL − 0.050 VCL − 0.025 VDL − 0.050 VDU − 0.100 VCL VCL VDL VDU V 1 VCU + 0.025 V 1 VCL + 0.050 VCL + 0.020 VDL + 0.050 VDU + 0.100 V V V V 1 1 2 2 Overcharge release voltage VCL Overdischarge detection voltage Overdischarge release voltage Input Voltage Operation voltage between VDD pin and VSS pin Input Current VDL VDU VDSOP − 1.5 − 6.0 V − Current consumption during operation Current consumption during overdischarge Output Resistance CO pin resistance "H" 1 CO pin resistance "L" 1 DO pin resistance "H" DO pin resistance "L" CO pin resistance "H" 2 CO pin resistance "L" 2 Delay Time Overcharge detection delay time Overcharge release delay time Overdischarge detection delay time IOPE IOPED VDD = 3.4 V, VVM = 0 V VDD = 1.5 V, VVM = 0 V − − 1.5 − 3.0 2.0 μA μA 3 3 RCOH1 RCOL1 RDOH RDOL RCOH2 RCOL2 − − − − 5 5 5 5 1 1 10 10 10 10 4 4 20 20 20 20 − − kΩ kΩ kΩ kΩ MΩ MΩ 4 4 4 4 4 4 − − − tCU × 0.7 tCL × 0.7 tDL × 0.7 tCU tCL tCU × 1.3 tCL × 1.3 tDL × 1.3 − − − 5 5 5 tCU tCL tDL Active "L" Active "H" tDL *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. 8 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02 2. Ta = −40°C to +85°C*1 Table 7 (Ta = −40°C to +85°C*1 unless otherwise specified) Item Detection Voltage Overcharge detection voltage Symbol Condition Min. Typ. Max. Unit Test Circuit − VCU − 0.045 VCL − 0.080 VCU VCL VCU + 0.030 VCL + 0.060 V V 1 1 − VCL − 0.050 VDL − 0.080 VDU − 0.130 VCL VDL VDU VCL + 0.030 VDL + 0.060 VDU + 0.110 V V V 1 2 2 − 1.5 − 6.0 V − − − 1.5 − 4.0 3.0 μA μA 3 3 − − − − 2.5 2.5 2.5 2.5 0.5 0.5 10 10 10 10 4 4 30 30 30 30 − − kΩ kΩ kΩ kΩ MΩ MΩ 4 4 4 4 4 4 − − − tCU × 0.5 tCL × 0.5 tDL × 0.5 tCU tCL tDL tCU × 2.5 tCL × 2.5 tDL × 2.5 − − − 5 5 5 VCU Overcharge release voltage VCL Overdischarge detection voltage Overdischarge release voltage Input Voltage Operation voltage between VDD pin and VSS pin Input Current Current consumption during operation Current consumption during overdischarge Output Resistance CO pin resistance "H" 1 CO pin resistance "L" 1 DO pin resistance "H" DO pin resistance "L" CO pin resistance "H" 2 CO pin resistance "L" 2 Delay Time Overcharge detection delay time Overcharge release delay time Overdischarge detection delay time VDL VDU VCL ≠ VCU VCL = VCU VDL ≠ VDU VDSOP IOPE IOPED RCOH1 RCOL1 RDOH RDOL RCOH2 RCOL2 tCU tCL tDL VDD = 3.4 V, VVM = 0 V VDD = 1.5 V, VVM = 0 V Active "L" Active "H" *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. 9 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Test Circuits Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) are judged by VVM + 1.0 V, and the output voltage levels "H" and "L" at DO pin (VDO) are judged by VSS + 1.0 V. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. 1. Overcharge detection voltage, overcharge release voltage (Test circuit 1) 1. 1 Active "H" Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between VCU and VCL. 1. 2 Active "L" Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage V1 is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between VCU and VCL. 2. Overdischarge detection voltage, overdischarge release voltage (Test circuit 2) Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when the voltage V1 is gradually decreased from the starting condition of V1 = 3.4 V. Overdischarge release voltage (VDU) is defined as the voltage V1 at which VDO goes from "L" to "H" when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference between VDU and VDL. 3. Current consumption during operation (Test circuit 3) The current consumption during operation (IOPE) is the current that flows through VDD pin (IDD) under the set condition of V1 = 3.4 V. 4. Current consumption during overdischarge (Test circuit 3) The current consumption during overdischarge (IOPED) is IDD under the set condition of V1 = 1.5 V. 5. CO pin resistance "H" 1 (Test circuit 4) 5. 1 Active "H" The CO pin resistance "H" 1 (RCOH1) is the resistance between VDD pin and CO pin under the set conditions of V1 = 4.7 V, V2 = 4.3 V. 5. 2 Active "L" The CO pin resistance "H" 1 (RCOH1) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V, V2 = 3.0 V. 6. CO pin resistance "L" 1 (Test circuit 4) 6. 1 Active "H" The CO pin resistance "L" 1 (RCOL1) is the resistance between VM pin and CO pin under the set conditions of V1 = 3.4 V, V2 = 0.4 V. 6. 2 Active "L" The CO pin resistance "L" 1 (RCOL1) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.7 V, V2 = 0.4 V. 10 Rev.1.1_02 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series 7. DO pin resistance "H" (Test circuit 4) The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V, V3 = 3.0 V. 8. DO pin resistance "L" (Test circuit 4) The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V, V3 = 0.4 V. 9. CO pin resistance "H" 2 (Active "L") (Test circuit 4) The CO pin resistance "H" 2 (RCOH2) is the resistance between VDD pin and CO pin under the set conditions of V1 = 4.7 V, V2 = 0 V. 10. CO pin resistance "L" 2 (Active "H") (Test circuit 4) The CO pin resistance "L" 2 (RCOL2) is the resistance between VDD pin and CO pin under the set conditions of V1 = 4.7 V, V2 = 4.7 V. 11. Overcharge detection delay time (Test circuit 5) 11. 1 Active "H" The overcharge detection delay time (tCU) is the time needed for VCO to go to "H" just after the voltage V1 increases and exceeds VCU under the set condition of V1 = 3.4 V. 11. 2 Active "L" The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases and exceeds VCU under the set condition of V1 = 3.4 V. 12. Overcharge release delay time (Test circuit 5) 12. 1 Active "H" The overcharge release delay time (tCL) is the time needed for VCO to go to "L" just after the voltage V1 decreases and falls below VCL under the set condition of V1 = 4.7 V. 12. 2 Active "L" The overcharge release delay time (tCL) is the time needed for VCO to go to "H" just after the voltage V1 decreases and falls below VCL under the set condition of V1 = 4.7 V. 13. Overdischarge detection delay time (Test circuit 5) The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and falls below VDL under the set condition of V1 = 3.4 V. 11 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series R1 = 330 Ω Rev.1.1_02 VDD VDD V1 S-8259A Series V1 C1 = 0.1 μF VSS VSS VM DO CO V VDO V VCO V VCO COM COM Figure 5 Test Circuit 1 Figure 6 Test Circuit 2 VDD VDD V1 V1 S-8259A Series VSS S-8259A Series VSS VM DO VM CO DO CO A IDO A ICO V3 V2 COM COM Figure 7 Test Circuit 3 VDD V1 S-8259A Series VSS VM DO Oscilloscope CO Oscilloscope COM Figure 9 Test Circuit 5 12 VM DO CO V VDO IDD A S-8259A Series Figure 8 Test Circuit 4 Rev.1.1_02 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series  Operation Remark Refer to " Connection Example". 1. Normal status The S-8259A Series monitors the voltage of the battery connected between VDD pin and VSS pin to control charging and discharging. When the battery voltage is in the range from overdischarge detection voltage (VDL) to overcharge detection voltage (VCU), CO pin and DO pin both output the release signals. This condition is called the normal status. 2. Overcharge status When the battery voltage becomes higher than VCU during charging in the normal status and the condition continues for the overcharge detection delay time (tCU) or longer, CO pin outputs the overcharge detection signal. This condition is called the overcharge status. When the battery voltage falls below the overcharge release voltage (VCL) and the condition continues for the overcharge release delay time (tCL) or longer, the S-8259A Series releases the overcharge status. 3. Overdischarge status When the battery voltage falls below VDL during discharging in the normal status and the condition continues for the overdischarge detection delay time (tDL) or longer, DO pin outputs the overdischarge detection signal. This condition is called the overdischarge status. When the battery voltage exceeds the overdischarge release voltage (VDU), the S-8259A Series releases the overdischarge status. 13 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Timing Chart 1. Overcharge detection, overdischarge detection VCU VCL Battery voltage VDU VDL VDD DO pin voltage VSS VDD CO pin voltage (Active "H") VVM VDD CO pin voltage (Active "L") VVM Overcharge release delay time (tCL) Overcharge detection delay time (tCU) Status *1 (1) (2) *1. (1): Normal status (2): Overcharge status (3): Overdischarge status Figure 10 14 Overdischarge detection delay time (tDL) (1) (3) (1) BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Connection Example R1 VDD Battery DO C1 S-8259A Series VSS CO VM Figure 11 Symbol Part R1 Resistor C1 Capacitor Table 8 Constants for External Components Purpose Min. Typ. Max. ESD protection, 150 Ω 330 Ω 1 kΩ For power fluctuation 0.068 μF 0.1 μF 1.0 μF For power fluctuation Remark − − Caution 1. The constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the connection example. In addition, the connection example and the constants do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constants. 15 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Precautions • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 16 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Characteristics (Typical Data) 1. Current consumption 1. 1 IOPE vs. Ta 4.0 IOPE [μA] 3.0 2.0 1.0 0.0 −40 −25 0 25 Ta [°C] 50 75 85 2. Detection voltage 2. 2 VCL vs. Ta 4.31 4.24 4.29 4.21 VCL [V] VCU [V] 2. 1 VCU vs. Ta 4.27 4.25 4.23 4.15 4.12 −40 −25 4.09 0 25 Ta [°C] 50 75 85 2. 3 VDL vs. Ta 2.80 2.34 2.70 2.30 2.26 2.22 −40 −25 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 2. 4 VDU vs. Ta 2.38 VDU [V] VDL [V] 4.18 2.60 2.50 −40 −25 2.40 0 25 Ta [°C] 50 75 85 −40 −25 17 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02 3. Delay time 3. 1 tCU vs. Ta 3. 2 tCL vs. Ta 2.6 80 64 1.8 tCL [ms] tCU [s] 2.2 1.4 1.0 32 0.6 0.2 48 16 −40 −25 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 −40 −25 0 25 Ta [°C] 50 75 85 3. 3 tDL vs. Ta 320 tDL [ms] 256 192 128 64 −40 −25 4. Output resistance 4. 1 RCOH1 vs. VCO 4. 2 RCOL1 vs. VCO 30 RCOL1 [kΩ] RCOH1 [kΩ] 30 20 10 0 1 2 3 VCO [V] 4 5 4. 3 RDOH vs. VDO 0 1 2 3 VCO [V] 4 5 1 2 3 VDO [V] 4 5 4. 4 RDOL vs. VDO 30 30 20 20 RDOL [kΩ] RDOH [kΩ] 10 0 0 10 0 10 0 0 18 20 1 2 3 VDO [V] 4 5 0 BATTERY MONITORING IC FOR 1-CELL PACK S-8259A Series Rev.1.1_02  Marking Specifications 1. SOT-23-6 Top view 6 5 (1) to (3): (4): 4 Product code (Refer to Product name vs. Product code) Lot number (1) (2) (3) (4) 1 2 3 Product name vs. Product code Product Name S-8259AAA-M6T1U S-8259AAB-M6T1U S-8259AAC-M6T1U S-8259AAD-M6T1U S-8259AAE-M6T1U S-8259AAG-M6T1U S-8259AAH-M6T1U S-8259AAI-M6T1U S-8259AAJ-M6T1U S-8259AAK-M6T1U S-8259AAL-M6T1U S-8259AAM-M6T1U S-8259AAN-M6T1U S-8259AAO-M6T1U S-8259AAP-M6T1U S-8259AAQ-M6T1U Product Code (1) (2) (3) H H H H H H H H H H H H H H H H 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 A B C D E G H I J K L M N O P Q 19 2.9±0.2 1.9±0.2 6 0.95 4 5 1 2 3 +0.1 0.15 -0.05 0.95 0.35±0.15 No. MP006-A-P-SD-2.1 TITLE SOT236-A-PKG Dimensions No. MP006-A-P-SD-2.1 ANGLE UNIT mm ABLIC Inc. 4.0±0.1(10 pitches:40.0±0.2) +0.1 ø1.5 -0 +0.2 ø1.0 -0 2.0±0.05 0.25±0.1 4.0±0.1 1.4±0.2 3.2±0.2 3 2 1 4 5 6 Feed direction No. MP006-A-C-SD-3.1 TITLE SOT236-A-Carrier Tape No. MP006-A-C-SD-3.1 ANGLE UNIT mm ABLIC Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. MP006-A-R-SD-2.1 TITLE SOT236-A-Reel No. MP006-A-R-SD-2.1 ANGLE QTY UNIT mm ABLIC Inc. 3,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com