TP65H300G4LSG

TP65H300G4LSG 650V SuperGaN™ FET in PQFN (source tab) Description Features The TP65H300G4LSG 650V, 240 mΩ gallium nitride (GaN) FET is a normally-off device using Transphorm’s Gen IV platform. It combines a state-of-the-art high voltage GaN HEMT with a low voltage silicon MOSFET to offer superior reliability and performance. The Gen IV SuperGaN™ platform uses advanced epi and patented design technologies to simplify manufacturability while improving efficiency over silicon via lower gate charge, output capacitance, crossover loss, and reverse recovery charge. Related Literature • • • • AN0003: Printed Circuit Board Layout and Probing AN0007: Recommendations for Vapor Phase Reflow AN0009: Recommended External Circuitry for GaN FETs AN0012: PQFN Tape and Reel Information Product Series and Ordering Information Part Number Package Package Configuration TP65H300G4LSG-TR* 8x8 PQFN Source * “-TR” suffix refers to tape and reel. Refer to AN0012 for details. TP65H300G4LSG PQFN (top view) S D June 17, 2020 tp65h300g4lsg.1 Benefits • Enables AC-DC bridgeless totem-pole PFC designs — Increased power density — Reduced system size and weight — Overall lower system cost • Achieves increased efficiency in both hard- and softswitched circuits • Easy to drive with commonly-used gate drivers • GSD pin layout improves high speed design Applications • • • • Consumer Power adapters Low power SMPS Lighting Key Specifications VDSS (V) 650 V(TR)DSS (V) 725 RDS(on) (mΩ) max* 312 QRR (nC) typ 23 QG (nC) typ 9.6 * Dynamic RDS(on); see Figures 18 and 19 G Cascode Schematic Symbol • JEDEC-qualified GaN technology • Dynamic RDS(on) production tested • Robust design, defined by — Intrinsic lifetime tests — Wide gate safety margin — Transient over-voltage capability • Enhanced inrush current capability • Very low QRR • Reduced crossover loss Cascode Device Structure © 2019 Transphorm Inc. Subject to change without notice. 1 TP65H300G4LSG Absolute Maximum Ratings (Tc=25°C unless otherwise stated.) Symbol VDSS V(TR)DSS VGSS PD ID IDM TC TJ TS TSOLD Parameter Limit Value Unit Drain to source voltage (TJ = -55°C to 150°C) 650 Transient drain to source voltage a 725 Gate to source voltage ±18 Maximum power dissipation @TC=25°C 21 W Continuous drain current @TC=25°C b 6.5 A Continuous drain current @TC=100°C b 4.1 A Pulsed drain current (pulse width: 10µs) 30 A Case -55 to +150 °C Junction -55 to +150 °C -55 to +150 °C 260 °C Maximum Unit 6 °C/W 50 °C/W Operating temperature Storage temperature Reflow soldering temperature c V Notes: a. In off-state, spike duty cycle D