SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Description
Features
The SiT3373 is a 220.000001 MHz to 725 MHz
differential MEMS VCXO engineered for low-jitter
applications. Utilizing SiTime’s unique DualMEMS®
temperature
sensing
and
TurboCompensation®
technology, the SiT3373 delivers exceptional dynamic
performance by providing resistance to airflow, thermal
gradients, shock and vibration. This device also
integrates multiple on-chip regulators to filter power
supply noise, eliminating the need for a dedicated
external LDO.
◼
The SiT3373 can be factory programmed for any
combination of frequency, stability, voltage, output
signaling, and pull range. Programmability enables
designers to optimize clock configurations while
eliminating long lead times and customization costs
associated with quartz devices where each frequency is
custom built.
The wide frequency range and programmability makes
this device ideal for telecom, networking, and industrial
applications that require a variety of pullable frequencies
and operate in noisy environments.
◼
◼
◼
◼
◼
Any frequency between 220.000001 MHz and 725 MHz
accurate to 6 decimal places
(For frequencies 1 MHz to 220 MHz, refer
to SiT3372)
Widest pull range options: ±25, ±50, ±80, ±100, ±150,
±200, ±400, ±800, ±1600, ±3200 ppm
0.225 ps RMS phase jitter (typ) over 12 kHz to 20 MHz
bandwidth
Frequency stability as low as ±15 ppm
Wide temperature range support from -40°C to 105°C
Industry-standard packages: 7.0 x 5.0 mm,
5.0 x 3.2 mm, 3.2 x 2.5 mm packages
Applications
◼
◼
◼
Cable Modem Termination System (CMTS), Video,
Broadcasting System, Audio, Industrial Sensors,
Remote Radio Head (RRH)
SATA, SAS, 10/40/100/400 Gbps Ethernet, Fibre Channel,
PCI-Express
Optical Transport Network (OTN)
Refer to Manufacturing Notes for proper reflow profile,
tape and reel dimension, and other manufacturing
related information.
Block Diagram
3.2 x 2.5 mm Package Pinout
Figure 1. SiT3373 Block Diagram
Rev 1.07
VIN
1
6
VDD
NC
2
5
OUT-
GND
3
4
OUT+
Figure 2. Pin Assignments (Top view)
(Refer to Table 6 for Pin Descriptions)
20 July 2021
www.sitime.com
SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Ordering Information
SiT3373AC -1B2-33NH 220.123456T
Part Family
Packaging
“SiT3373”
“T”, “Y”, “D” or “E”
Refer to table below for packing method
Leave Blank for Bulk[1]
Revision Letter
“A” is the revision of Silicon
Frequency
220.000001 MHz to 725.000000 MHz
Temperature Range
“C”: Extended Commercial, -20 to 70°C
“ I ” : Industrial, -40 to 85°C
“B”: -40 to 95°C
“E”: Extended Industrial, -40 to 105°C
Pull Range Options[2]
“M”: ±25 ppm
“B”: ±50 ppm
“C”: ±80 ppm
“E”: ±100 ppm
“G”: ±150 ppm
“H”: ±200 ppm
“X”: ±400 ppm
“Y”: ±800 ppm
“Z”: ±1600 ppm
“U”: ±3200 ppm
Signalling Type
“1”: LVPECL
“2”: LVDS
“4”: HCSL
Package Size
“B”: 3.2 x 2.5 mm
“C”: 5.0 x 3.2 mm with center pad
“E”: 7.0 x 5.0 mm with center pad
[3]
Feature Pin
“N”: No Connect
“E”: Output Enable
Frequency Stability
“H”:
“2”:
“9”:
“3”:
Voltage Supply
±15 ppm
±25 ppm
±35 ppm
±50 ppm
“25”: 2.5 V ±10%
“28”: 2.8 V ±10%
“30”: 3.0 V ±10%
“33”: 3.3 V ±10%
Notes:
1. Bulk is available for sampling only.
2. Contact SiTime for custom pull range options.
3. “E”: Output Enable function is only available in 7.0 x 5.0 mm and 5.0 x 3.2 mm packages.
Table 1. Ordering Codes for Supported Tape & Reel Packing Method
Device Size
(mm x mm)
8 mm T&R
(3ku)
8 mm T&R
(1ku)
7.0 x 5.0
–
–
5.0 x 3.2
–
–
3.2 x 2.5
D
E
T
Rev 1.07
12 mm T&R
(3ku)
12 mm T&R
(1ku)
16 mm T&R
(3ku)
16 mm T&R
(1ku)
–
–
T
Y
T
Y
–
–
Y
–
–
Page 2 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
TABLE OF CONTENTS
Description....................................................................................................................................................................................1
Features .......................................................................................................................................................................................1
Applications ..................................................................................................................................................................................1
Block Diagram ..............................................................................................................................................................................1
Ordering Information .....................................................................................................................................................................2
Electrical Characteristics ..............................................................................................................................................................4
Waveform Diagrams ...................................................................................................................................................................10
Timing Diagrams ........................................................................................................................................................................11
Termination Diagrams ................................................................................................................................................................12
LVPECL ...............................................................................................................................................................................12
LVDS ...................................................................................................................................................................................13
HCSL ...................................................................................................................................................................................13
Dimensions and Patterns ― 3.2 x 2.5 mm .................................................................................................................................14
Dimensions and Patterns ― 5.0 x 3.2 mm .................................................................................................................................14
Dimensions and Patterns ― 7.0 x 5.0 mm .................................................................................................................................15
Additional Information .................................................................................................................................................................16
Revision History ..........................................................................................................................................................................17
Rev 1.07
Page 3 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Electrical Characteristics
Table 2. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with standard
output termination shown in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
220.000001
–
725
MHz
Accurate to 6 decimal places
Frequency Stability
Frequency Stability
F_stab
-15
–
+15
ppm
-25
–
+25
ppm
-35
–
+35
ppm
-50
–
+50
ppm
Inclusive of initial tolerance, operating temperature, rated
power supply voltage, load variations, and first year aging
at 25°C, with VIN voltage at Vdd/2.
±15 ppm is only guaranteed for pull range up to ±100 ppm.
Temperature Range
Operating Temperature Range
T_use
-20
–
+70
°C
Extended Commercial
-40
–
+85
°C
Industrial
-40
–
+95
°C
-40
–
+105
°C
Extended Industrial
Supply Voltage
Supply Voltage
Vdd
2.97
3.30
3.63
V
2.70
3.00
3.30
V
2.52
2.80
3.08
V
2.25
2.50
2.75
V
Voltage Control Characteristics
Pull Range
PR
±25, ±50, ±80, ±100, ±150, ±200,
±400, ±800, ±1600, ±3200
ppm
See the APR (Absolute Pull Range) Table 11.
Contact SiTime for custom pull range options
Upper Control Voltage
VC_U
90%
–
–
Vdd
Voltage at which maximum frequency deviation is guaranteed
Lower Control Voltage
VC_L
–
–
10%
Vdd
Voltage at which minimum frequency deviation is guaranteed
Control Voltage Input Impedance
VC_z
–
10
–
MΩ
Control Voltage Input Bandwidth
V_c
–
10
–
kHz
Pull Range Linearity
Lin
–
–
1.0
%
Frequency Change Polarity
–
Contact SiTime for other input bandwidth options
–
Positive Slope
Input Characteristics
Input Voltage High
VIH
70%
–
–
Vdd
Pin 2, OE
Input Voltage Low
VIL
–
–
30%
Vdd
Pin 2, OE
Input Pull-up Impedance
Z_in
–
100
-
kΩ
Pin 2, OE logic high or logic low
Output Characteristics
Duty Cycle
DC
45
–
55
%
Startup and OE Timing
Start-up Time
OE Enable/Disable Time
Rev 1.07
T_start
–
–
3.0
ms
Measured from the time Vdd reaches its rated minimum value.
T_oe
–
–
3.8
µs
f = 322.265625 MHz. Measured from the time OE pin reaches
rated VIH and VIL to the time clock pins reach 90% of swing
and high-Z. See Figure 9 and Figure 10
Page 4 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 3. Electrical Characteristics – LVPECL Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Idd
–
–
97
mA
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE Disable Supply Current
I_OE
–
–
63
mA
OE = Low
Output Disable Leakage Current
I_leak
–
0.15
–
A
OE = Low
I_driver
–
–
32
mA
Maximum average current drawn from OUT+ or OUT-
Current Consumption
Maximum Output Current
Output Characteristics
Output High Voltage
VOH
Vdd-1.15
–
Vdd-0.7
V
See Figure 5
Output Low Voltage
VOL
Vdd-1.9
–
Vdd-1.5
V
See Figure 5
V_Swing
1.2
1.6
2.0
V
See Figure 6
–
225
290
ps
20% to 80%, see Figure 6
Output Differential Voltage Swing
Rise/Fall Time
Tr, Tf
Jitter – 7.0 x 5.0 mm Package
RMS Period Jitter[4]
T_jitt
RMS Phase Jitter (random)
T_phj
–
1.0
1.6
ps
f = 322.265625 MHz, Vdd = 3.3 V or 2.5 V
–
0.220
0.270
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.220
0.300
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -40 to 95°C and -40 to 105°C
–
0.1
–
ps
f = 156.25 or 322.265625 MHz, IEEE802.3-2005 10 GbE jitter
mask integration bandwidth = 1.875 MHz to 20 MHz,
all Vdd levels
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm Packages
RMS Period Jitter[4]
T_jitt
RMS Phase Jitter (random)
T_phj
–
1.0
1.6
ps
f = 322.265625 MHz, Vdd = 3.3 V or 2.5 V
–
0.225
0.282
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.225
0.315
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -40 to 95°C and -40 to 105°C
–
0.1
–
ps
f = 322.265625 MHz, IEEE802.3-2005 10 GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
Notes:
4. Measured according to JESD65B.
Rev 1.07
Page 5 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 4. Electrical Characteristics – LVDS Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
Idd
–
–
89
mA
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE Disable Supply Current
I_OE
–
–
67
mA
OE = Low
Output Disable Leakage Current
I_leak
–
0.15
–
A
OE = Low
Output Characteristics
250
–
450
mV
See Figure 7
–
–
50
mV
See Figure 7
1.125
–
1.375
V
See Figure 7
ΔVOS
–
–
50
mV
See Figure 7
Rise/Fall Time
Tr, Tf
–
370
470
ps
Measured with 2 pF capacitive loading to GND, 20% to 80%,
see Figure 8
RMS Period Jitter[5]
T_jitt
–
0.92
1.6
ps
f = 322.265625 MHz, Vdd = 3.3V or 2.5V
RMS Phase Jitter (random)
T_phj
–
0.215
0.265
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.215
0.280
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -40 to 95°C and -40 to 105°C
–
0.1
–
ps
f = 322.265625 MHz, IEEE802.3-2005 10 GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels
Differential Output Voltage
VOD
Delta VOD
ΔVOD
Offset Voltage
VOS
Delta VOS
Jitter – 7.0 x 5.0 mm package
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm packages
RMS Period Jitter[5]
T_jitt
–
0.92
1.6
ps
f = 322.265625 MHz, Vdd = 3.3 V or 2.5 V
RMS Phase Jitter (random)
T_phj
–
0.235
0.282
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.235
0.310
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -40 to 95°C and -40 to 105°C
–
0.1
–
ps
f = 322.265625 MHz, IEEE802.3-2005 10 GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels
Notes:
5. Measured according to JESD65B.
Rev 1.07
Page 6 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 5. Electrical Characteristics – HCSL Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Idd
–
–
102
mA
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE Disable Supply Current
I_OE
–
–
67
mA
OE = Low
Output Disable Leakage Current
I_leak
–
0.15
–
A
OE = Low
Current Consumption
Output Characteristics
Output High Voltage
VOH
0.6
–
0.90
V
See Figure 5
Output Low Voltage
VOL
-0.05
–
0.08
V
See Figure 5
V_Swing
1.2
1.4
1.8
V
See Figure 6
Rise/Fall Time
Tr, Tf
–
360
470
ps
Measured with 2 pF capacitive loading to GND, 20% to 80%,
see Figure 6
RMS Period Jitter[6]
T_jitt
–
1.0
1.6
ps
f = 322.265625 MHz, Vdd = 3.3 V or 2.5 V
RMS Phase Jitter (random)
T_phj
–
0.215
0.265
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, Pull Range = ±100 ppm
–
0.215
0.282
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.1
–
ps
f = 322.265625 MHz, IEEE802.3-2005 10 GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs, all
Vdd levels
Output Differential Voltage Swing
Jitter – 7.0 x 5.0 mm package
Jitter – 5.0 x 3.2 mm and 3.2 x 2.5 mm packages
RMS Period Jitter[6]
T_jitt
–
1.0
1.6
ps
RMS Phase Jitter (random)
T_phj
–
0.235
0.282
0.215
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -20 to 70°C and -40 to 85°C
–
0.235
0.305
0.215
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs, pull range = ±100 ppm.
Temperature ranges -40 to 95°C and -40 to 105°C
–
0.1
–
0.1
f = 322.265625 MHz, Vdd = 3.3 V or 2.5 V
f = 322.265625 MHz, IEEE802.3-2005 10 GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, includes spurs,
all Vdd levels
Notes:
6. Measured according to JESD65B.
Rev 1.07
Page 7 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 6. Pin Description
Pin
Symbol
1
VIN
Functionality
Input
No Connect
(NC)
2
NC/OE
Output Enable
(OE)
Control Voltage
No Connect: Leave floating or connect to GND for better heat dissipation.
NC for all 3.2 x 2.5 mm package options.
H[7,8]: specified frequency output
L: output is high impedance. Only output driver is disabled.
OE function only available on 7050 and 5032 packages. Pin 2 on 3225 package is NC.
3
GND
Power
Vdd Power Supply Ground
4
OUT+
Output
Oscillator output
5
OUT-
Output
Complementary oscillator output
6
VDD
Power
Power supply voltage [9]
Top View
Top View
VIN
1
6
VDD
VIN
1
6
VDD
NC/OE [1]
2
5
OUT-
NC [2]
2
5
OUT-
GND
3
4
OUT+
GND
3
4
OUT+
Figure 3. Pin Assignments
(7.0 x 5.0 mm and
5.0 x 3.2 mm packages)
Figure 4. Pin Assignments
(3.2 x 2.5 mm package)
Notes:
7. A pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
8. OE mode is only available in the 7050 and 5032 packages. 3225 package is NC.
9. A capacitor of value 0.1 µF or higher between VDD and GND is required. An additional 10 µF capacitor between VDD and GND is required for the best
phase jitter performance.
Rev 1.07
Page 8 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 7. Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Min.
Continuous Power Supply Voltage Range (Vdd)
-0.5
Max.
Unit
4.0
V
Vdd + 0.3V
V
150
°C
Maximum Junction Temperature
145
°C
Soldering Temperature (follow standard Pb-free soldering guidelines)
260
°C
Input Voltage, Maximum (any input pin)
Input Voltage, Minimum (any input pin)
-0.3
Storage Temperature
-65
V
Table 8. Thermal Considerations[10]
Package
JA, 4 Layer Board (°C/W)
JC, Bottom (°C/W)
3225, 6-pin
80
30
5032, 6-pin
53[11]
20
7050, 6-pin
52[11]
19
Notes:
10. Refer to JESD51 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table.
11. Value for JA assumes the center pad is soldered down.
Table 9. Maximum Operating Junction Temperature[12]
Max Operating Temperature (ambient)
Maximum Operating Junction Temperature:
3225 Package
Maximum Operating Junction Temperature:
5032, 7050 Packages
70°C
105°C
95°C
85°C
130°C
110°C
95°C
130°C
120°C
105°C
145°C
130°C
Notes:
12. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 10. Environmental Compliance
Value
Unit
Mechanical Shock Resistance
MIL-STD-883F, Method 2002
10,000
g
Mechanical Vibration Resistance
MIL-STD-883F, Method 2007
70
g
Soldering Temperature (follow standard Pb free soldering guidelines)
MIL-STD-883F, Method 2003
260
°C
Moisture Sensitivity Level
MSL1 @ 260°C
Electrostatic Discharge (HBM)
HBM, JESD22-A114
2,000
V
Charge-Device Model ESD Protection
JESD220C101
750
V
Parameter
Test Conditions
JESD78 Compliant
Latch-up Tolerance
Rev 1.07
Page 9 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Waveform Diagrams
OUT-
VOH
OUT+
VOL
GND
Figure 5. LVPECL, HCSL Voltage Levels per Differential Pin (i.e. OUT+, or OUT-)
V
80%
80%
V_ Swing
0V
t
20%
20%
Tr
Tf
Figure 6. LVPECL, HCSL Voltage Levels across Differential Pair (i.e. OUT+ minus OUT-)
Rev 1.07
Page 10 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Waveform Diagrams (continued)
OUT-
VOD
OUT+
VOS
GND
Figure 7. LVDS Voltage Levels per Differential Pin (i.e. OUT+, or OUT-)
V
80%
80%
0V
t
20%
20%
Tr
Tf
Figure 8. LVDS Differential Waveform (i.e. OUT+ minus OUT-)
Timing Diagrams
Vdd
OE Voltage
Vdd
VIH
VIL
T_oe_hw
OE Voltage
T_oe_hw
OUT-
OUT-
90%
HZ
HZ
OUT+
OUT+
GND
GND
Figure 9. Hardware OE Enable Timing
Rev 1.07
Figure 10. Hardware OE Disable Timing
Page 11 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Termination Diagrams
LVPECL
OUT+
Shunt Bias Termination
network
0.1μF
Zo = 50Ω
D+
OUT-
Zo = 50Ω
D-
LVPECL
0.1μF
RB
RB
VDD
50 Ω
50 Ω
RB
3.3 V 100 Ω
VT
2.5 V 48.7 Ω
Figure 11. LVPECL with AC-coupled termination
VDD
Thevenin-equivalent
Termination network
R1
LVPECL
R1
OUT+
Zo = 50Ω
D+
OUT-
Zo = 50Ω
D-
VDD
R1
R2
R2
3.3 V 127 Ω
82.5 Ω
2.5 V 250 Ω
62.5 Ω
R2
Figure 12. LVPECL DC-coupled load termination with Thevenin equivalent network
Y-Bias Termination
network
LVPECL
OUT+
Zo = 50Ω
D+
OUT-
Zo = 50Ω
D-
R1
VDD
R1
R2
R3
3.3 V
50 Ω
50 Ω
50 Ω
2.5 V
50 Ω
50 Ω
18 Ω
C1
0.1μF
R2
R3
Figure 13. LVPECL with Y-Bias termination
OUT+
Shunt Bias Termination
network
Zo = 50Ω
D+
OUT-
Zo = 50Ω
D-
LVPECL
50 Ω
50 Ω
VT=VDD-2V
Figure 14. LVPECL with DC-coupled parallel shunt load termination
Rev 1.07
Page 12 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Termination Diagrams (continued)
LVDS
LVDS
Zo = 50Ω
OUT+
OUT+
100 Ω
Zo = 50Ω
OUT-
OUT-
Figure 15. LVDS single DC termination at the load
LVDS
0.1μF
Zo = 50Ω
OUT+
OUT+
100 Ω
100 Ω
0.1μF
Zo = 50Ω
OUT-
OUT-
Figure 16. LVDS double AC termination with capacitor close to the load
LVDS
Zo = 50Ω
OUT+
OUT+
100 Ω
100 Ω
Zo = 50Ω
OUT-
OUT-
Figure 17. LVDS double DC termination
HCSL
R1
OUT+
OUT-
Zo = 50Ω
D+
Zo = 50Ω
D-
R2
50Ω
50Ω
R1 = R2 = 33 Ω
Figure 18. HCSL interface termination
Rev 1.07
Page 13 of 17
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Dimensions and Patterns ― 3.2 x 2.5 mm
Package Size – Dimensions (Unit: mm)[13]
3.2 x 2.5 x 0.85 mm
Recommended Land Pattern (Unit: mm)[14]
3.2 x 2.5 x 0.85 mm
1.00
1.6
2.25
0.65
1.05
Dimensions and Patterns ― 5.0 x 3.2 mm
Package Size – Dimensions (Unit: mm)[13]
5.0 x 3.2 x 0.85 mm[15]
Recommended Land Pattern (Unit: mm)[14]
5.0 x 3.2 x 0.85 mm[15]
Notes:
13. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the
device.
14. A capacitor of value 0.1 µF or higher between VDD and GND is required. An additional 10 µF capacitor between VDD and GND is required for the best
phase jitter performance.
15. The center pad is internally connected to the GND pin. Soldering down the center pad to the GND is recommended for best thermal dissipation, but is
optional.
Rev 1.07
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Dimensions and Patterns ― 7.0 x 5.0 mm
Package Size – Dimensions (Unit: mm)[16]
7.0 x 5.0 x 0.85 mm[18]
Recommended Land Pattern (Unit: mm)[17]
7.0 x 5.0 x 0.85 mm[18]
Notes:
16. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the
device.
17. A capacitor of value 0.1 µF or higher between VDD and GND is required. An additional 10 µF capacitor between VDD and GND is required for the best
phase jitter performance.
18. The center pad is internally connected to the GND pin. Soldering down the center pad to the GND is recommended for best thermal dissipation, but is
optional.
Rev 1.07
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 11. APR Table
Absolute pull range (APR) = Nominal pull range (PR) - frequency stability (F_stab) - aging[19]
Frequency Stability
Nominal Pull Range
±15
±25
±35
±50
—
APR (ppm)
±25
±5
—
—
±50
±30
±20
±10
—
±80
±60
±50
±40
±25
±100
±80
±70
±60
±45
±150
—
±120
±110
±95
±200
—
±170
±160
±145
±400
—
±370
±360
±345
±800
—
±770
±760
±745
±1600
—
±1570
±1560
±1545
±3200
—
±3170
±3160
±3145
Note:
19. Aging includes solder down shift and 20-year aging.
Additional Information
Table 12. Additional Information
Document
Description
Download Link
ECCN #: EAR99
Five character designation used on the commerce
Control List (CCL) to identify dual use items for export
control purposes.
—
HTS Classification Code:
8542.39.0000
A Harmonized Tariff Schedule (HTS) code developed by
the World Customs Organization to classify/define
internationally traded goods.
—
Part number Generator
Tool used to create the part number based on desired
features.
https://www.sitime.com/part-number-generator
Time Machine II
MEMS oscillator programmer
http://www.sitime.com/support/time-machine-oscillator-programmer
Manufacturing Notes
Tape & Reel dimension, reflow profile and other
manufacturing related info
https://www.sitime.com/sites/default/files/gated/Manufacturing-Notesfor-SiTime-Products.pdf
Qualification Reports
RoHS report, reliability reports,
composition reports
http://www.sitime.com/support/quality-and-reliability
Performance Reports
Additional performance data such as phase noise,
current consumption, and jitter for selected
frequencies
http://www.sitime.com/support/performance-measurement-report
Termination Techniques
AN10029Termination design recommendations
http://www.sitime.com/support/application-notes
Layout Techniques
AN10006 Layout recommendations
http://www.sitime.com/support/application-notes
Evaluation Boards
SiT6085EB, SiT6086EB and SiT6097EB for Differential
Oscillators
https://www.sitime.com/support/user-guides
Rev 1.07
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SiT3373 220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Revision History
Table 13. Revision History
Revision
1.0
1.01
Release Date
13-Oct-2017
2-Feb-2018
1.03
1.04
1.05
10-May-2018
29-Oct-2018
7-Jun-2020
1.06
17-Mar-2021
1.07
20-Jul-2021
Change Summary
Initial release
Corrected ppm ordering codes.
Corrected minor formatting errors.
Added Additional Information table.
Added Extended Industrial temperature range (-40°C – 95°C and -40°C – 105°C )
Updated the Part Ordering info with added 5.0 x 3.2 mm package
±15 ppm option
Formatting updates
Corrected typos
Updated package Dimensions Drawings
Updated Table 8 Thermal Considerations for 5032 package
Added Evaluation Boards SiT6085EB reference in Additional Information
Rearranged layout, added Description, Block Diagram and TOC
Added HTS classification code
Clarified ±15 ppm pull range up to ±100 ppm
Modified maximum junction temperatures
Removed I_driver HCSL specification as not applicable
Updated L1 and Dimple Width package dimensions for 3.2 x 2.5 mm package
Updated trademarks and changed rev table date format
Updated pin direction in package dimensions for 3.2 x 2.5 mm package
SiTime Corporation, 5451 Patrick Henry Drive, Santa Clara, CA 95054, USA | Phone: +1-408-328-4400 | Fax: +1-408-328-4439
© SiTime Corporation 2017-2021. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liabi lity for any loss, damage or
defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or
accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv)
improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
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usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any SiTime product and any product documentation. Products sold by
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BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR
FACILITIES OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products does
not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale of
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