74LVC373APW,118

74LVC373A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 3 — 22 November 2012 Product data sheet 1. General description The 74LVC373A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable input (pin LE) and an output enable input (pin OE) are common to all internal latches. When pin LE is HIGH, data at the D-inputs (pins D0 to D7) enters the latches. In this condition, the latches are transparent, that is, a latch output will change each time its corresponding D-input changes. When pin LE is LOW, the latches store the information that was present at the D-inputs one set-up time preceding the HIGH-to-LOW transition of pin LE. When pin OE is LOW, the contents of the eight latches are available at the Q-outputs (pins Q0 to Q7). When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input pin OE does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. The 74LVC373A is functionally identical to the 74LVC573A, but has a different pin arrangement. 2. Features and benefits       5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels High-impedance outputs when VCC = 0 V Complies with JEDEC standard:  JESD8-7A (1.65 V to 1.95 V)  JESD8-5A (2.3 V to 2.7 V)  JESD8-C/JESD36 (2.7 V to 3.6 V)  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-B exceeds 200 V  CDM JESD22-C101E exceeds 1000 V  Specified from 40 C to +85 C and 40 C to +125 C 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74LVC373AD 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 SOT163-1 mm 74LVC373ADB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74LVC373APW 40 C to +125 C 74LVC373ABQ 40 C to +125 C Version DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5  4.5  0.85 mm SOT764-1 4. Functional diagram 1 18 D7 Q7 19 17 D6 Q6 16 14 D5 Q5 15 13 D4 Q4 12 8 D3 Q3 9 7 D2 Q2 6 4 D1 Q1 5 3 D0 Q0 2 LE 11 3 EN C1 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 OE mna881 11 Fig 1. Logic symbol 74LVC373A Product data sheet 1 mna880 Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 2 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 3 D0 Q0 2 4 D1 Q1 5 7 D2 Q2 6 8 D3 Q3 9 13 D4 14 D5 Q5 15 17 D6 Q6 16 18 D7 Q7 19 LATCH 1 to 8 3-STATE OUTPUTS Q4 12 LE LE LE 11 LE D 1 OE Q Fig 3. Functional diagram D0 Fig 4. D1 D Q D2 D LE LE Q D3 D LE LE mna189 LE mna882 Q D4 D LE LE Logic diagram for one latch Q D5 D LE LE Q D6 D LE LE Q D7 D LE LE Q D LE LE Q LE LE LE OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mna883 Fig 5. Logic diagram 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 3 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 5. Pinning information 1 OE terminal 1 index area OE 1 20 VCC 20 VCC 5.1 Pinning Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q0 2 19 Q7 D0 3 18 D7 Q1 5 17 D6 Q2 6 15 Q5 16 Q6 D2 7 14 D5 D3 8 Q3 9 Q1 5 Q2 6 D2 7 373A 15 Q5 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 LE GND(1) 13 D4 12 Q4 LE 11 4 GND 10 D1 16 Q6 373A 001aad089 Transparent top view 001aad090 (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 6. Pin configuration for SO20 and (T)SSOP20 Fig 7. Pin configuration for DHVQFN20 5.2 Pin description Table 2. Pin description Symbol Pin Description OE 1 output enable input (active LOW) LE 11 latch enable input (active HIGH) D[0:7] 3, 4, 7, 8, 13, 14, 17, 18 data input Q[0:7] 2, 5, 6, 9, 12, 15, 16, 19 latch output GND 10 ground (0 V) VCC 20 supply voltage 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 4 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 6. Functional description Table 3. Functional table[1] Operating modes Input Internal latch Output OE LE Dn Enable and read register (transparent mode) L H L L H H H H Latch and read register L L l L L L L h H H H L l L Z H L h H Z Latch register and disable outputs [1] Qn L L H = HIGH voltage level h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition L = LOW voltage level l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition Z = High-impedance OFF-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current output voltage VO Conditions Min Max Unit 0.5 +6.5 V 50 - mA 0.5 +6.5 V - 50 mA HIGH or LOW-state [2] 0.5 VCC + 0.5 V 3-state [2] 0.5 +6.5 V VI < 0 [1] VO > VCC or VO < 0 IO output current - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot VO = 0 V to VCC Tamb = 40 C to +125 C [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. [3] For (T)SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K. 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 5 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage Conditions functional VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 1.65 - 3.6 V 1.2 - - V 0 - 5.5 V HIGH or LOW-state 0 - VCC V 3-state 0 - 5.5 V in free air 40 - +125 C VCC = 1.65 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 3.6 V 0 - 10 ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 1.2 V Product data sheet 40 C to +125 C Max Min Max Unit 1.08 - - 1.08 - V 0.65  VCC - - 0.65  VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V 0.12 V VCC = 1.65 V to 1.95 V VCC = 1.2 V - - 0.12 - VCC = 1.65 V to 1.95 V - - 0.35  VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC  0.2 - - VCC  0.3 - V IO = 4 mA; VCC = 1.65 V 1.2 - - 1.05 - V IO = 8 mA; VCC = 2.3 V 1.8 - - 1.65 - V IO = 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V IO = 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V IO = 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V IO = 100 A; VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V - 0.1 5 - 20 A 0.35  VCC V VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 3.6 V VI = VIH or VIL input leakage VCC = 3.6 V; VI = 5.5 V or GND current 74LVC373A Typ[1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 6 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Min Typ[1] Max Min Max Unit IOZ OFF-state output current VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND; - 0.1 5 - 20 A IOFF power-off leakage supply VCC = 0 V; VI or VO = 5.5 V - 0.1 10 - 20 A ICC supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 10 - 40 A ICC additional supply current per input pin; VCC = 2.7 V to 3.6 V; VI = VCC  0.6 V; IO = 0 A - 5 500 - 5000 A CI input capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 5.0 - - - pF [1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 C. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 12. Symbol Parameter tpd propagation delay 40 C to +85 C Conditions Dn to Qn; see Figure 8 Max - 14 - - - ns 1.5 6.5 15.8 1.5 18.2 ns 1.0 3.4 8.2 1.0 9.4 ns VCC = 2.7 V 1.5 3.4 7.8 1.5 10.0 ns 1.5 2.9 6.8 1.5 8.5 ns - 16 - - - ns VCC = 1.65 V to 1.95 V 2.2 7.3 16.8 2.2 19.3 ns VCC = 2.3 V to 2.7 V 1.5 3.9 8.6 1.5 10.0 ns [2] VCC = 1.2 V VCC = 2.7 V 1.5 3.5 8.2 1.5 10.5 ns VCC = 3.0 V to 3.6 V 1.5 3.3 7.2 1.5 9.0 ns - 17 - - - ns OE to Qn; see Figure 10 VCC = 1.2 V Product data sheet Min VCC = 1.65 V to 1.95 V LE to Qn; see Figure 9 74LVC373A Max VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V enable time Typ[1] [2] VCC = 1.2 V ten 40 C to +125 C Unit Min [2] VCC = 1.65 V to 1.95 V 1.5 6.8 17.6 1.5 20.3 ns VCC = 2.3 V to 2.7 V 1.5 3.8 9.7 1.5 11.2 ns VCC = 2.7 V 1.5 3.8 8.7 1.5 11.0 ns VCC = 3.0 V to 3.6 V 1.5 3.1 7.7 1.5 10.0 ns All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 7 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 12. Symbol Parameter 40 C to +85 C Conditions Min tdis disable time OE to Qn; see Figure 10 pulse width set-up time tsu hold time th Max 40 C to +125 C Unit Min Max [2] VCC = 1.2 V tW Typ[1] - 8.0 - - - ns VCC = 1.65 V to 1.95 V 2.3 4.3 10.3 2.3 11.9 ns VCC = 2.3 V to 2.7 V 1.0 2.4 5.8 1.0 6.8 ns VCC = 2.7 V 1.5 3.2 7.1 1.5 9.0 ns VCC = 3.0 V to 3.6 V 1.5 3.0 6.1 1.5 8.0 ns VCC = 1.65 V to 1.95 V 5.0 - - 5.0 - ns VCC = 2.3 V to 2.7 V 4.0 - - 4.0 - ns LE HIGH; see Figure 9 VCC = 2.7 V 3.0 - - 3.0 - ns VCC = 3.0 V to 3.6 V 3.0 1.5 - 3.0 - ns VCC = 1.65 V to 1.95 V 4.0 - - 4.0 - ns Dn to LE; see Figure 11 VCC = 2.3 V to 2.7 V 3.0 - - 3.0 - ns VCC = 2.7 V 2.0 - - 2.0 - ns VCC = 3.0 V to 3.6 V 2.0 0.0 - 2.0 - ns VCC = 1.65 V to 1.95 V 3.0 - - 3.0 - ns VCC = 2.3 V to 2.7 V 2.0 - - 2.0 - ns VCC = 2.7 V 1.5 - - 1.5 - ns 1.5 0.3 - 1.5 - ns - - 1.0 - 1.5 ns VCC = 1.65 V to 1.95 V - 16.6 - - pF VCC = 2.3 V to 2.7 V - 19.2 - - pF VCC = 3.0 V to 3.6 V - 21.6 - - pF Dn to LE; see Figure 11 VCC = 3.0 V to 3.6 V tsk(0) output skew time VCC = 3.0 V to 3.6 V [3] CPD power dissipation capacitance per latch; VI = GND to VCC [4] [1] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] [4] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching (CL  VCC2  fo) = sum of the outputs 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 8 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 11. AC waveforms VI VM Dn input GND tPLH tPHL VOH VM Qn output VOL mna884 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Input (Dn) to output (Qn) propagation delays VI LE input VM GND tW t PHL t PLH VOH VM Qn output VOL mna885 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Latch Enable input (LE) pulse width, the latch enable input to output (Qn) propagation delays 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 9 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state VI OE input VM GND t PLZ t PZL VCC Qn output LOW-to-OFF OFF-to-LOW V M VX VOL t PZH t PHZ VOH VY Qn output HIGH-to-OFF OFF-to-HIGH VM GND output enabled output enabled output disabled mna886 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 10. 3-state enable and disable times VI VM Dn input GND th th t su t su VI LE input VM GND mna887 Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 11. Data set-up and hold times for the Dn input to the LE input Table 8. Measurement points Supply voltage Input VCC VI VM VM VX VY 1.2 V VCC 0.5  VCC 0.5  VCC VOL + 0.15 V VOH  0.15 V 1.65 V to 1.95 V VCC 0.5  VCC 0.5  VCC VOL + 0.15 V VOH  0.15 V 2.3 V to 2.7 V VCC 0.5  VCC 0.5  VCC VOL + 0.15 V VOH  0.15 V 2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V 3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V 74LVC373A Product data sheet Output All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 10 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 12. Test circuit for measuring switching times Table 9. Test data Supply voltage Input VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 1.2 V VCC  2 ns 30 pF 1 k open 2  VCC GND 1.65 V to 1.95 V VCC  2 ns 30 pF 1 k open 2  VCC GND 2.3 V to 2.7 V VCC  2 ns 30 pF 500  open 2  VCC GND 2.7 V 2.7 V  2.5 ns 50 pF 500  open 2  VCC GND 3.0 V to 3.6 V 2.7 V  2.5 ns 50 pF 500  open 2  VCC GND 74LVC373A Product data sheet Load VEXT All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 11 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 12. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 13. Package outline SOT163-1 (SO20) 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 12 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8o o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 14. Package outline SOT339-1 (SSOP20) 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 13 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig 15. Package outline SOT360-1 (TSSOP20) 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 14 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 16. Package outline SOT764-1 (DHVQFN20) 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 15 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC373A v.3 20121122 Product data sheet - 74LVC373A v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Table 4, Table 5, Table 6, Table 7, Table 8 and Table 9: values added for lower voltage ranges. 74LVC373A v.2 20030519 Product specification - 74LVC373A v.1 74LVC373A v.1 19980729 Product specification - - 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 16 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74LVC373A Product data sheet Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 17 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74LVC373A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 22 November 2012 © Nexperia B.V. 2017. All rights reserved 18 of 19 74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 22 November 2012