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74HCT573BQ-Q100,11

74HCT573BQ-Q100,11

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    DHVQFN20_4.5X2.5MM_EP

  • 描述:

    八进制d型透明锁存器;3-state

  • 数据手册
  • 价格&库存
74HCT573BQ-Q100,11 数据手册
74HC573-Q100; 74HCT573-Q100 Octal D-type transparent latch; 3-state Rev. 5 — 10 March 2020 Product data sheet 1. General description The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Input levels: • For 74HC573-Q100: CMOS level • For 74HCT573-Q100: TTL level Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors and microcomputers 3-state non-inverting outputs for bus-oriented applications Common 3-state output enable input Multiple package options ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2 000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 3. Ordering information Table 1. Ordering information Type number Package 74HC573D-Q100 Temperature range Name Description Version -40 °C to +125 °C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 -40 °C to +125 °C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 -40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 -40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm SOT764-1 74HCT573D-Q100 74HC573DB-Q100 74HCT573DB-Q100 74HC573PW-Q100 74HCT573PW-Q100 74HC573BQ-Q100 74HCT573BQ-Q100 4. Functional diagram 2 D0 Q0 19 3 D1 Q1 18 4 D2 Q2 17 5 D3 6 D4 7 D5 Q5 14 8 D6 Q6 13 9 D7 Q7 12 LATCH 1 to 8 3-STATE OUTPUTS Q3 16 Q4 15 11 LE 1 OE mna809 Fig. 1. Functional diagram D0 D1 D Q D2 D Q D3 D Q D4 D Q D5 D Q D6 D Q D7 D Q D Q LATCH 1 LATCH 2 LATCH 3 LATCH 4 LATCH 5 LATCH 6 LATCH 7 LATCH 8 LE LE LE LE LE LE LE LE LE OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aae075 Fig. 2. Logic diagram 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 2 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 11 C1 1 1 2 D0 3 4 5 6 7 8 9 OE Q0 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 11 Fig. 3. 2 D1 LE EN1 19 19 1D 3 18 4 17 16 5 16 15 6 15 14 7 14 8 13 9 12 18 17 13 12 mna807 mna808 Logic symbol Fig. 4. IEC logic symbol 5. Pinning information 5.1. Pinning 1 OE terminal 1 index area 1 D0 2 20 VCC 19 Q0 D1 3 18 Q1 D2 4 17 Q2 D3 5 16 Q3 D4 6 15 Q4 D5 7 14 Q5 D6 8 13 Q6 D7 9 12 Q7 GND 10 11 LE Pin configuration SOT163-1 (SO20), SOT339-1 (SSOP20) and SOT360-1 (TSSOP20) 74HC_HCT573_Q100 Product data sheet 19 Q0 D1 3 18 Q1 D2 4 17 Q2 D3 5 16 Q3 D4 6 15 Q4 D5 7 D6 8 D7 9 14 Q5 GND(1) 13 Q6 12 Q7 aaa-003604 Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. aaa-003603 Fig. 5. 2 LE 11 OE D0 GND 10 74HC573-Q100 74HCT573-Q100 20 VCC 74HC573-Q100 74HCT573-Q100 Fig. 6. Pin configuration SOT764-1 (DHVQFN20) All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 3 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 5.2. Pin description Table 2. Pin description Symbol Pin Description OE 1 3-state output enable input (active LOW) D0, D1, D2, D3, D4, D5, D6, D7 2, 3, 4, 5, 6, 7, 8, 9 data input GND 10 ground (0 V) LE 11 latch enable input (active HIGH) Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 19, 18, 17, 16, 15, 14, 13, 12 3-state latch output VCC 20 supply voltage 6. Functional description Table 3. Function table H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition; Z = high-impedance OFF-state. Operating mode Input Control Internal latches Output OE LE Dn Enable and read register (transparent mode) L H L L L H H H Latch and read register L l L L h H H l L Z h H Z Latch register and disable outputs H L L Qn 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage -0.5 +7 V IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V - ±20 mA IO output current VO = -0.5 V to (VCC + 0.5 V) - ±35 mA ICC supply current - +70 mA IGND ground current -70 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [1] For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C. For SOT339-1 (SSOP20) packages: Ptot derates linearly with 10.0 mW/K above 100 °C. For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C. For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C. 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 4 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC573-Q100 74HCT573-Q100 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V VI = VIH or VIL HIGH-level output voltage IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = -6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = -7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V VI = VIH or VIL LOW-level output voltage IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC573-Q100 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 5 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Min Typ Max Min Max Min Unit Max II input leakage VI = VCC or GND; VCC = 6.0 V current - - ±0.1 - ±1.0 - ±1.0 μA IOZ OFF-state VI = VIH or VIL; VCC = 6.0 V; output current VO = VCC or GND - - ±0.5 - ±5.0 - ±10.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - CI input capacitance - 3.5 - 160 μA pF 74HCT573-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH VI = VIH or VIL; VCC = 4.5 V HIGH-level output voltage IO = -20 μA 4.4 4.5 - 4.4 - 4.4 - V 3.98 4.32 - 3.84 - 3.7 - V IO = -6 mA VOL VI = VIH or VIL; VCC = 4.5 V LOW-level output voltage IO = 20 μA IO = 6.0 mA - 0 0.1 - 0.1 - 0.1 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage VI = VCC or GND; VCC = 5.5 V current - - ±0.1 - ±1.0 - ±1.0 μA IOZ OFF-state VI = VIH or VIL; VCC = 5.5 V; output current VO = VCC or GND - - ±0.5 - ±5.0 - ±10 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 μA ΔICC VI = VCC - 2.1 V; additional supply current other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A per input pin; Dn inputs - 35 126 - 158 - 172 μA per input pin; LE input - 65 234 - 293 - 319 μA per input pin; OE input - 125 450 - 563 - 613 μA - 3.5 - - - - - pF CI input capacitance 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 6 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Fig. 11. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 47 150 - 190 - 225 ns VCC = 4.5 V - 17 30 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 14 - - - - - ns - 14 26 - 33 - 38 ns VCC = 2.0 V - 50 150 - 190 - 225 ns VCC = 4.5 V - 18 30 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 15 - - - - - ns - 14 26 - 33 - 38 ns VCC = 2.0 V - 44 140 - 175 - 210 ns VCC = 4.5 V - 16 28 - 35 - 42 ns VCC = 6.0 V - 13 24 - 30 - 36 ns VCC = 2.0 V - 55 150 - 190 - 225 ns VCC = 4.5 V - 20 30 - 38 - 45 ns VCC = 6.0 V - 16 26 - 33 - 38 ns VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns VCC = 6.0 V - 4 10 - 13 - 15 ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 50 11 - 65 - 75 - ns VCC = 4.5 V 10 4 - 13 - 15 - ns VCC = 6.0 V 9 3 - 11 - 13 - ns VCC = 2.0 V 5 3 - 5 - 5 - ns VCC = 4.5 V 5 1 - 5 - 5 - ns VCC = 6.0 V 5 1 - 5 - 5 - ns - 26 - - - - - pF 74HC573-Q100 tpd propagation delay Dn to Qn; see Fig. 7 [1] VCC = 6.0 V LE to Qn; see Fig. 8 [1] VCC = 6.0 V ten tdis tt tW tsu th CPD enable time disable time OE to Qn; see Fig. 9 OE to Qn; see Fig. 9 transition time Qn; see Fig. 7 pulse width set-up time hold time power dissipation capacitance 74HC_HCT573_Q100 Product data sheet [2] [3] [4] LE HIGH; see Fig. 8 Dn to LE; see Fig. 10 Dn to LE; see Fig. 10 CL = 50 pF; f = 1 MHz; VI = GND to VCC [5] All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 7 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 4.5 V - 20 35 - 44 - 53 ns VCC = 5 V; CL = 15 pF - 17 - - - - - ns VCC = 4.5 V - 18 35 - 44 - 53 ns VCC = 5 V; CL = 15 pF - 15 - - - - - ns - 17 30 - 38 - 45 ns - 18 30 - 38 - 45 ns - 5 12 - 15 - 18 ns 16 5 - 20 - 24 - ns 13 7 - 16 - 20 - ns 9 4 - 11 - 15 - ns - 26 - - - - - pF 74HCT573-Q100 tpd propagation delay Dn to Qn; see Fig. 7 [1] LE to Qn; see Fig. 8 ten enable time OE to Qn; see Fig. 9 [1] [2] VCC = 4.5 V OE to Qn; see Fig. 9 tdis disable time tt transition time Qn; see Fig. 7 [3] VCC = 4.5 V [4] VCC = 4.5 V tW pulse width LE HIGH; see Fig. 8 VCC = 4.5 V tsu set-up time Dn to LE; see Fig. 10 VCC = 4.5 V th hold time Dn to LE; see Fig. 10 VCC = 4.5 V CPD [1] [2] [3] [4] [5] power dissipation capacitance CL = 50 pF; f = 1 MHz; VI = GND to VCC - 1.5 V [5] tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of outputs. 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 8 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 10.1. Waveforms Dn input VM t PLH t PHL 90 % VM Qn output 10 % t TLH t THL 001aae082 Measurement points are given in Table 8. Fig. 7. Propagation delay data input (Dn) to output (Qn) and output transition time LE input VM tW t PHL t PLH 90 % VM Qn output 10 % t THL t TLH 001aae083 Measurement points are given in Table 8. Fig. 8. Pulse width latch enable input (LE), propagation delay latch enable input (LE) to output (Qn) and output transition time VI OE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM 10% VOL tPHZ VOH tPZH 90% output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled 001aae307 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 9. Enable and disable times 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 9 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state VM LE input t su t su th th VM Dn input 001aae084 Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig. 10. Set-up and hold times for data input (Dn) to latch input (LE) Table 8. Measurement points Type Input Output VM VM 74HC573-Q100 0.5VCC 0.5VCC 74HCT573-Q100 1.3 V 1.3 V VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VCC G VI DUT VCC VO RT RL S1 open CL 001aad983 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig. 11. Test circuit for measuring switching times Table 9. Test data Type Input Load VI tr, tf CL 74HC573-Q100 VCC 6 ns 74HCT573-Q100 3V 6 ns 74HC_HCT573_Q100 Product data sheet S1 position RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 15 pF, 50 pF 1 kΩ open GND VCC 15 pF, 50 pF 1 kΩ open GND VCC All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 10 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 11. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c y HE v M A Z 20 11 Q A2 A (A 3 ) A1 pin 1 index θ Lp L 1 10 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.1 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 12. Package outline SOT163-1 (SO20) 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 11 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 pin 1 index A (A 3) A1 θ Lp L 1 10 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8o 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig. 13. Package outline SOT339-1 (SSOP20) 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 12 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm D SOT360-1 E A X c HE y v M A Z 11 20 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 14. Package outline SOT360-1 (TSSOP20) 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 13 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm B D SOT764-1 A A A1 E c detail X terminal 1 index area terminal 1 index area e1 C e b 2 9 v w C A B C y1 C y L 1 10 Eh e 20 11 19 12 X Dh 0 2.5 5 mm scale Dimensions (mm are the original dimensions) Unit mm A(1) A1 b max 1.00 0.05 0.30 nom 0.90 0.02 0.25 min 0.80 0.00 0.18 c D(1) Dh E(1) Eh e e1 L v 0.2 4.6 4.5 4.4 3.15 3.00 2.85 2.6 2.5 2.4 1.15 1.00 0.85 0.5 3.5 0.5 0.4 0.3 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT764-1 --- MO-241 --- sot764-1_po European projection Issue date 03-01-27 14-12-12 Fig. 15. Package outline SOT764-1 (DHVQFN20) 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 14 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state 12. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT573_Q100 v.5 20200310 Product data sheet - Modifications: • • • • • 74HC_HCT573_Q100 v.4 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 1 updated. Section 2 updated. Section 7: Derating values for Ptot total power dissipation updated. 74HC_HCT573_Q100 v.4 20150126 Modifications: • 74HC_HCT573_Q100 v.3 20130305 Modifications: • 74HC_HCT573_Q100 v.2 20120816 Product data sheet - 74HC_HCT573_Q100 v.1 74HC_HCT573_Q100 v.1 20120802 Product data sheet - - 74HC_HCT573_Q100 Product data sheet Product data sheet - 74HC_HCT573_Q100 v.3 Table 7: Power dissipation capacitance condition for 74HCT573-Q100 is corrected. Product data sheet - 74HC_HCT573_Q100 v.2 74HC573DB-Q100 and 74HCT573DB-Q100 added. All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 15 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 14. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 16 / 17 74HC573-Q100; 74HCT573-Q100 Nexperia Octal D-type transparent latch; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 4 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................5 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 7 10.1. Waveforms.................................................................9 11. Package outline........................................................ 11 12. Abbreviations............................................................ 15 13. Revision history........................................................15 14. Legal information......................................................16 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 10 March 2020 74HC_HCT573_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 March 2020 © Nexperia B.V. 2020. All rights reserved 17 / 17
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