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XL258-KR

XL258-KR

  • 厂商:

    XINLUDA(信路达)

  • 封装:

    VSSOP8

  • 描述:

    通用放大器 VSSOP-8

  • 数据手册
  • 价格&库存
XL258-KR 数据手册
Single Supply Dual Operational Amplifiers Utilizing the circuit designs perfected for Quad Operational Amplifiers, these dual operational amplifiers feature low power drain, acommon mode input voltage range extending to ground/VEE, and single supply or split supply operation. These amplifiers have several distinct advantages over standard operational amplifier types in single supply applications. They can operate at supply voltages as low as 3.0 V or as high as 32 V, with quiescent currents about one−fifth of those associated with the MC1741 (on a per amplifier basis). The common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many applications. The output voltage range also includes the negative power supply voltage. Features • • • • • • • • Short Circuit Protected Outputs True Differential Input Stage Single Supply Operation: 3.0 V to 32 V Low Input Bias Currents Internally Compensated Common Mode Range Extends to Negative Supply Single and Split Supply Operation ESD Clamps on the Inputs Increase Ruggedness of the Device without Affecting Operation PIN CONNECTIONS Output A Inputs A 1 2 3 VEE/Gnd 4 8 7 − + 6 − + 5 VCC Output B Inputs B (Top View) 1 www.xinluda.com 258 358 2904 3.0 V to VCC(max) VCC VCC 1.5 V to VCC(max) 1 1 2 2 1.5 V to VEE(max) VEE VEE/Gnd Single Supply Split Supplies Figure 1. Output Bias Circuitry Common to Both Amplifiers VCC Q15 Q16 Q22 Q14 Q13 40 k Q19 5.0 pF Q12 Q24 25 Q23 Q20 Q18 Inputs Q11 Q9 Q21 Q17 Q6 Q2 Q25 Q7 Q5 Q1 Q8 Q3 Q4 Q10 Q26 2.4 k 2.0 k VEE/Gnd Figure 2. Representative Schematic Diagram (One−Half of Circuit Shown) 2 www.xinluda.com 258 358 2904 MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.) Symbol Value VCC VCC, VEE 32 ±16 Input Differential Voltage Range (Note 1) VIDR ±32 Vdc Input Common Mode Voltage Range (Note 2) VICR −0.3 to 32 Vdc Output Short Circuit Duration tSC Continuous Junction Temperature TJ 150 °C RJA 238 212 161 °C/W Storage Temperature Range Tstg −65 to +150 °C ESD Protection at any Pin Human Body Model Machine Model Vesd Rating Power Supply Voltages Single Supply Split Supplies Thermal Resistance, Junction−to−Air (Note 3) Unit Vdc Case 846A Case 751 Case 626 Operating Ambient Temperature Range V 2000 200 TA 258 358 2904 °C -40 to +85 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Split Power Supplies. 2. For supply voltages less than 32 V the absolute maximum input voltage is equal to the supply voltage. 3. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active. 3 www.xinluda.com 258 358 2904 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.) 258 358 Min Typ Max Min Typ Max − − − 2.0 − − 5.0 7.0 7.0 − − − 2.0 − − 7.0 9.0 9.0 VIO/T − 7.0 − − 7.0 − IIO − − − − 3.0 − −45 −50 30 100 −150 −300 − − − − 5.0 − −45 −50 50 150 −250 −500 IIO/T − 10 − − 10 − Input Common Mode Voltage Range (Note 6), VCC = 30 V VCC = 30 V, TA = Thigh to Tlow VICR 0 − 28.3 0 − 28.3 0 − 28 0 − 28 Differential Input Voltage Range VIDR − − VCC − − VCC Large Signal Open Loop Voltage Gain RL = 2.0 k, VCC = 15 V, For Large VO Swing, TA = Thigh to Tlow (Note 5) AVOL 50 25 100 − − − 25 15 100 − − − CS − −120 − − −120 − Common Mode Rejection RS ≤ 10 k CMR 70 85 − 65 70 − Power Supply Rejection PSR 65 100 − 65 100 − Output Voltage−High Limit TA = Thigh to Tlow (Note 5) VCC = 5.0 V, RL = 2.0 k, TA = 25°C VCC = 30 V, RL = 2.0 k VCC = 30 V, RL = 10 k VOH 3.3 26 27 3.5 − 28 − − − 3.3 26 27 3.5 − 28 − − − Output Voltage−Low Limit VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 5) VOL − 5.0 20 − 5.0 20 Output Source Current VID = +1.0 V, VCC = 15 V TA = Thigh to Tlow (LM358A Only) IO+ 20 40 − 20 40 − Output Sink Current VID = −1.0 V, VCC = 15 V TA = Thigh to Tlow (LM358A Only) VID = −1.0 V, VO = 200 mV IO− 10 20 − 10 20 − 12 50 − 12 50 − Output Short Circuit to Ground (Note 7) ISC − 40 60 − 40 60 Power Supply Current (Total Device) TA = Thigh to Tlow (Note 5) VCC = 30 V, VO = 0 V, RL = ∞ VCC = 5 V, VO = 0 V, RL = ∞ ICC − − 1.5 0.7 3.0 1.2 − − 1.5 0.7 3.0 1.2 Characteristic Input Offset Voltage VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V, VO ] 1.4 V, RS = 0  TA = 25°C TA = Thigh (Note 5) TA = Tlow (Note 5) Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow (Note 5) Input Offset Current TA = Thigh to Tlow (Note 5) Input Bias Current TA = Thigh to Tlow (Note 5) Average Temperature Coefficient of Input Offset Current TA = Thigh to Tlow (Note 5) Channel Separation 1.0 kHz ≤ f ≤ 20 kHz, Input Referenced Symbol VIO IIB 4. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC − 1.7 V. 5. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. 4 www.xinluda.com 258 358 2904 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25°C, unless otherwise noted.) 2904 Min Typ Max − − − 2.0 − − 7.0 10 10 VIO/T − 7.0 − IIO − − − − 5.0 45 −45 −50 50 200 −250 −500 IIO/T − 10 − Input Common Mode Voltage Range (Note 9), VCC = 30 V VCC = 30 V, TA = Thigh to Tlow VICR 0 − 28.3 0 − 28 Differential Input Voltage Range VIDR − − VCC Large Signal Open Loop Voltage Gain RL = 2.0 k, VCC = 15 V, For Large VO Swing, TA = Thigh to Tlow (Note 8) AVOL 25 15 100 − − − CS − −120 − Common Mode Rejection RS ≤ 10 k CMR 50 70 − Power Supply Rejection PSR 50 100 − Output Voltage−High Limit TA = Thigh to Tlow (Note 8) VCC = 5.0 V, RL = 2.0 k, TA = 25°C VCC = 30 V, RL = 2.0 k VCC = 30 V, RL = 10 k VOH 3.3 26 27 3.5 − 28 − − − Output Voltage−Low Limit VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 8) VOL − 5.0 20 Output Source Current VID = +1.0 V, VCC = 15 V IO+ 20 40 − Output Sink Current VID = −1.0 V, VCC = 15 V VID = −1.0 V, VO = 200 mV IO− 10 − 20 − − − Output Short Circuit to Ground (Note 10) ISC − 40 60 Power Supply Current (Total Device) TA = Thigh to Tlow (Note 8) VCC = 30 V, VO = 0 V, RL = ∞ VCC = 5 V, VO = 0 V, RL = ∞ ICC − − 1.5 0.7 3.0 1.2 Characteristic Input Offset Voltage VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V, VO ] 1.4 V, RS = 0  TA = 25°C TA = Thigh (Note 8) TA = Tlow (Note 8) Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow (Note 8) Input Offset Current TA = Thigh to Tlow (Note 8) Input Bias Current TA = Thigh to Tlow (Note 8) Average Temperature Coefficient of Input Offset Current TA = Thigh to Tlow (Note 8) Channel Separation 1.0 kHz ≤ f ≤ 20 kHz, Input Referenced Symbol VIO IIB 7. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC − 1.7 V. 8. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. 5 www.xinluda.com 258 358 2904 CIRCUIT DESCRIPTION The 358 series is made using two internally compensated, two−stage operational amplifiers. The first stage of each consists of differential input devices Q20 and Q18 with input buffer transistors Q21 and Q17 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q20 and Q18. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single−ended converter. The second stage consists of a standard current source load amplifier stage. Each amplifier is biased from an internal−voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. 1.0 V/DIV VCC = 15 Vdc RL = 2.0 k TA = 25°C 5.0 s/DIV Figure 3. Large Signal Voltage Follower Response AVOL, OPEN LOOP VOLTAGE GAIN (dB) 20 VI , INPUT VOLTAGE (V) 18 16 14 12 10 Negative 8.0 Positive 6.0 4.0 2.0 0 120 VCC = 15 V VEE = Gnd TA = 25°C 100 80 60 40 20 0 -20 0 2.0 4.0 6.0 8.0 10 12 14 16 VCC/VEE, POWER SUPPLY VOLTAGES (V) 18 1.0 20 10 100 1.0 k 10 k 100 k 1.0 M f, FREQUENCY (Hz) Figure 4. Input Voltage Range Figure 5. Large−Signal Open Loop Voltage Gain 6 www.xinluda.com 258 358 2904 550 RL = 2.0 k VCC = 15 V VEE = Gnd Gain = -100 RI = 1.0 k RF = 100 k 12 10 8. VO , OUTPUT VOLTAGE (mV) VOR , OUTPUT VOLTAGE RANGE (V pp ) 14 06. 04. 02. VCC = 30 V VEE = Gnd TA = 25°C CL = 50 pF 500 Input 450 400 Output 350 300 250 200 0 0 1.0 0 10 100 f, FREQUENCY (kHz) 1000 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 t, TIME (ms) Figure 6. Large−Signal Frequency Response Figure 7. Small Signal Voltage Follower Pulse Response (Noninverting) TA = 25°C RL = R 2.1 I IB , INPUT BIAS CURRENT (nA) I CC , POWER SUPPLY CURRENT (mA) 2.4 1.8 1.5 1.2 0.9 0.6 0.3 0 0 5.0 10 15 20 25 VCC, POWER SUPPLY VOLTAGE (V) 30 90 80 70 35 Figure 8. Power Supply Current versus Power Supply Voltage 0 2.0 4.0 6.0 8.0 10 12 14 16 VCC, POWER SUPPLY VOLTAGE (V) 18 20 Figure 9. Input Bias Current versus Supply Voltage 7 www.xinluda.com 258 358 2904 50 k R1 VCC VCC R2 5.0 k - 10 k 1/2 XL1403 2.5 V VCC - Vref VO 358 1/2 VO 358 + + fo = 1 Vref = VCC 2 VO = 2.5 V (1 + R1 ) R2 R 1 CR + 1/2 C For: fo = 1.0 kHz R = 16 k C = 0.01 F C Figure 11. Wien Bridge Oscillator Figure 10. Voltage Reference e1 R R Hysteresis R2 358 VOH R1 - a R1 R1 1/2 eo 358 + 358 Vin - 1 CR 1/2 + R eo = C (1 + a + b) (e2 - e1) H= Figure 12. High Impedance Differential Amplifier R2 - - 100 k 1/2 + 358 + - R3 = TN R2 1/2 C1 = 10 C Vref = 1 V 2 CC 358 + Vref Bandpass Output Vref 1 2  RC R1 = QR R2 = R1 TBP C C R Vref fo = 100 k 358 VinH R1 (VOH - VOL) R1 + R2 R 1/2 R2 VinL Figure 13. Comparator with Hysteresis R C1 VOL R1 (V - V ) + Vref R1 + R2 OH ref VinH = Vin VO R1 (V - V )+ Vref VinL = R1 + R2 OL ref 358 e2 VO + Vref 1/2 b R1 1 2  RC For: fo Q TBP TN Vref R3 R1 - C1 1/2 Notch Output 358 + Vref = 1.0 kHz = 10 =1 =1 Where: TBP = Center Frequency Gain TN = Passband Notch Gain R C R1 R2 R3 = 160 k = 0.001 F = 1.6 M = 1.6 M = 1.6 M Figure 14. Bi−Quad Filter 8 www.xinluda.com 258 358 2904 VCC C Vin R1 R3 C - 1/2 358 + R2 Vref Given: VO CO CO = 10 C 1 Vref = 2 VCC fo = center frequency A(fo) = gain at center frequency Choose value fo, C Vref = Vref 1 V 2 CC Triangle Wave Output + 300 k R3 1/2 358 - 75 k R1 100 k 358 - Square Wave Output R1 + RC 4 CRf R1 Q  fo C R1 = R3 2 A(fo) R2 = R1 R3 4Q2 R1 -R3 For less than 10% error from operational amplifier. Qo fo < 0.1 BW Where fo and BW are expressed in Hz. Rf f = R3 = + 1/2 Vref C Then: R2 if, R3 = R2 R1 R2 + R1 If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 16. Multiple Feedback Bandpass Filter Figure 15. Function Generator 9 www.xinluda.com SOP8封装尺寸图 10 www.xinluda.com DIP8封装尺寸图 11 www.xinluda.com VSSOP8封装尺寸图 Xinluda reserves the right to change the above information without prior notice. 12 www.xinluda.com
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