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74HCU04D

74HCU04D

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    SOIC14_150MIL

  • 描述:

    六角无缓冲逆变器

  • 数据手册
  • 价格&库存
74HCU04D 数据手册
74HCU04 Hex unbuffered inverter Rev. 7 — 8 December 2015 Product data sheet 1. General description The 74HCU04 is a hex unbuffered inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Complies with JEDEC standard JESD7A  Balanced propagation delays  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HCU04D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74HCU04DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74HCU04PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74HCU04BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm SOT762-1 74HCU04 Nexperia Hex unbuffered inverter 4. Functional diagram    $ <   $ <    $ <   $ <   $ <   $ <           PQD Fig 1.       $ < PQD Logic symbol Fig 2. PQD IEC logic symbol Fig 3. Logic diagram (one inverter) 5. Pinning information  $ WHUPLQDO LQGH[DUHD <   $  < $   $ <  $   <  <   $ $ $   < <  <   $ *1'   <  $ 9&&   <    9&&  <  <  $ *1' +&8  9&& +&8 $ DDO 7UDQVSDUHQWWRSYLHZ DDO (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig 4. Pin configuration SO14 and (T)SSOP14 74HCU04 Product data sheet Fig 5. Pin configuration DHVQFN14 All information provided in this document is subject to legal disclaimers. Rev. 7 — 8 December 2015 © Nexperia B.V. 2017. All rights reserved 2 of 17 74HCU04 Nexperia Hex unbuffered inverter 5.1 Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level Input Output nA nY L H H L 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V - 20 mA - 50 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - IGND ground current 50 - mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot SO14, (T)SSOP14 and DHVQFN14 packages [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 74HCU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 8 December 2015 © Nexperia B.V. 2017. All rights reserved 3 of 17 74HCU04 Nexperia Hex unbuffered inverter 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Typ Max Unit 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). 25 C 40 C to +85 C 40 C to +125 C Unit Symbol Parameter Conditions Min Typ Max Min Max Min Max VIH HIGH-level input voltage VCC = 2.0 V 1.7 1.4 - 1.7 - 1.7 - V VCC = 4.5 V 3.6 2.6 - 3.6 - 3.6 - V VCC = 5.5 V 4.8 3.4 - 4.8 - 4.8 - V VIL VOH VOL LOW-level input voltage VCC = 2.0 V - 0.6 0.3 - 0.3 - 0.3 V VCC = 4.5 V - 1.9 0.9 - 0.9 - 0.9 V VCC = 5.5 V - 2.6 1.2 - 1.2 - 1.2 V HIGH-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V 1.8 2.0 - 1.8 - 1.8 - V IO = 20 A; VCC = 4.5 V 4.0 4.5 - 4.0 - 4.0 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 20 A; VCC = 6.0 V 5.5 6.0 - 5.5 - 5.5 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V LOW-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V - 0 0.2 - 0.2 - 0.2 V IO = 20 A; VCC = 4.5 V - 0 0.5 - 0.5 - 0.5 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 20 A; VCC = 6.0 V - 0 0.5 - 0.5 - 0.5 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V - - 0.1 - 1.0 - 1.0 A II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 2 - 20 - 20 A CI input capacitance - 3.5 - - - - - pF 74HCU04 Product data sheet VI = VCC or GND; VCC = 6.0 V All information provided in this document is subject to legal disclaimers. Rev. 7 — 8 December 2015 © Nexperia B.V. 2017. All rights reserved 4 of 17 74HCU04 Nexperia Hex unbuffered inverter 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 7. Symbol Parameter propagation delay tpd transition time tt power dissipation capacitance CPD [1] tpd is the same as tPHL, tPLH. [2] tt is the same as tTHL, tTLH. [3] 25 C Conditions 40 C to +85 C 40 C to Unit +125 C Typ Max Max Max VCC = 2.0 V; CL = 50 pF 19 70 90 105 ns VCC = 4.5 V; CL = 50 pF 7 14 18 21 ns nA to nY; see Figure 6 [1] VCC = 5.0 V; CL = 15 pF 5 - - - ns VCC = 6.0 V; CL = 50 pF 6 12 15 18 ns VCC = 2.0 V; CL = 50 pF 19 75 95 110 ns VCC = 4.5 V; CL = 50 pF 7 15 19 22 ns VCC = 6.0 V; CL = 50 pF 6 13 16 19 ns 10 - - - pF [2] see Figure 6 per inverter; VI = GND to VCC [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HCU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 8 December 2015 © Nexperia B.V. 2017. All rights reserved 5 of 17 74HCU04 Nexperia Hex unbuffered inverter 11. Waveforms 9, 90 Q$LQSXW 90 *1' W 3+/ W 3/+ 92+ 9&&  38/6( *(1(5$725 90 90 Q
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