GU160X32-800A

Dot Graphic VFD Module q q q q q q q GU160X32-800A 160 x 32 Dot Graphic Operating Temp -40° C to +85° C Single 5V Supply. High Brightness Blue Green Display Selectable Parallel (i80/M68)/Serial Interface Twin Screen Graphic RAM 16 Level Brightness Control Function The module includes the Vacuum Fluorescent Display glass, driver and control ASIC, with integral refresh Graphic RAM and logic for parallel and synchronous serial interfaces. The high speed 8 bit parallel interface is 5V CMOS compatible suitable for connection to a host CPU bus. Brightness control and power down functions are provided. A full data sheet is available. 20.17 37.0 45.0 25.1 101.45 35.0 12.42 4.0 1.75 150.5 154.0 133.0 10.8 ± 1mm 1 77.0 PWR (JST-B3B-XH-A) ELECTRICAL SPECIFICATION Parameter Symbol Value Power Supply Voltage VCC 5.0VDC +/- 5% Power Supply Current ICC 550mADC typ. Logic High Input VIH 4.0 VDC min. Logic Low Input VIL 1.0VDC max. Logic High Output VOH 4.7VDC min. Logic Low Output VOL 0.3 VDC max. Reset Input Voltage VRH 4.0 VDC min. Reset Input Voltage VRL 0.6 VDC max. BLOCK DIAGRAM Condition GND=0V VCC= 5V IIH = 2uA IIL = -600uA IOH = -300uA IOL = 300uA IRH = 5uA IRL = -600uA OPTICAL and ENVIRONMENTAL SPECIFICATIONS Parameter Value Display Area (XxY mm) 101.45 x 20.17 Dot Size/Pitch (XxY mm) 0.485 x 0.485/0.635 x 0.635 Luminance 350 cd/m2 Min. Colour of Illumination Blue-Green (Filter for colours) Operating Temperature -40°C to +85°C Storage Temperature -40°C to +85°C Operating Humidity (non condensing) 20 to 80% RH @ 25°C C/D 1 1 1 1 1 1 1 1 0 Dimensions in mm & subject to tolerances. Mounting holes 3.5mm dia. IDC (IMSA-9032B-26P) The power on rise time should be less than 100ms.The inrush current at power on can be 2 x ICC. SOFTWARE COMMANDS Instruction Set Display On/Off / Layer Merge Set Display Brightness Clear Display Set Cursor XY Address Set Display Start X Address Set Write Address Mode Scroll Display Vertically Up/Down Read Cursor XY Address Write Data TIMING PARAMETERS (min) i80/M68 Parameters Time Write /WR/EN Cycle Time 400ns Write /WR/EN Pulse Width 100ns Set Up To Write /WR/EN 30ns Hold after Write /WR/EN 20ns SCROLLING GRAPHIC DISPLAY 10.0 max 1.6 Instruction Byte 20H-2FH 40H-4FH 52H-5FH 60H-67H 70H-7FH 80H-8FH B0H-BFH D4H-D7H 00H-FFH No. Bytes 2 1 1 3 2 1 1 3 1 Serial Parameters Time SCK Cycle Time 200ns SCK Pulse Width 80ns Set Up To SCK, /CSS=’L’ 40ns Delay After 8th bit, /CSS=’H’ 150ns The pattern in GRAM can be scrolled around the display. Horizontal scroll is achieved by increment/decrement of the Display Start X Address. The vertical scroll process considers layer 0, then layer 1 as a continuous 64 bit high vertical area within RAM. NORITAKE ITRON VFD MODULES D0~D7 SO SI WR (R/W) RD (ENCK) CSS C/D FRP /RES DISPLAY CONTROLLER BD VFD GRAPHIC RAM VCC DC/DC + AC Conv. GND FILAMENT (AC) ANODE + GRID (DC) GRAPHIC RAM X ADDRESS 00H………………………….FFH BYTE FORMAT D0 D1 D2 D3 D4 D5 D6 D7 0H 1H GRAM Layer 0 2H Y ADDRESS …………….FFH GRAM Layer 1 3H 6H The Graphic RAM is composed of 16384 bits arranged as (256 x 32 bits) x 2 and the 7H access is operated by 8 bit vertical data IDC DATA CONNECTOR Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 i80 M68 Serial Pin Sig D7 D7 X D6 D6 X D5 D5 X D4 D4 X D3 D3 X D2 D2 X D1 D1 SO D0 D0 SI /WR R//W X C//D C//D C//D /RD ENCK SCK /CSS /CSS /CSS FRP FRP FRP 2 4 6 8 10 12 14 16 18 20 22 24 26 3 PIN POWER CONNECTOR Pin Sig 1 Vcc GND 2 Test (Factory only) GND 3 GND GND PCB JUMPERS (O)pen (L)ink GND GND Interface J1 J2 Serial L O/L GND O O GND i80 Parallel O L GND M68 Parallel GND CONTACT GND Noritake Sales Office Tel Nos GND Nagoya Japan: +81 (0)52-561-9867 Canada: +1-416-291-2946 GND Chicago USA: +1-847-439-9020 /RES Munchen (D): +49 (0)89-3214-290 Subject to change without notice. IUK Doc Ref: 03469 Iss:1 23/7/01 Itron UK: +44 (0)1493 601144 Rest Europe: +49 (0)61-0520-9220 www.noritake-itron.com 160 x 32 Dot Graphic