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LPM3414B3F

LPM3414B3F

  • 厂商:

    LPSEMI(微源)

  • 封装:

    SOT-23

  • 描述:

    -

  • 数据手册
  • 价格&库存
LPM3414B3F 数据手册
Preliminary Datasheet LPM3414 20V/3A N-Channel Enhancement Mode Field Effect Transistor General Description Features The LPM3414 is N-channel logic enhancement mode  20V/3A, RDS(ON)<62mΩ(max.)@VGS=4.5V power field effect transistor, which are produced by  20V/2.5A, RDS(ON)<86mΩ(max.)@VGS=2.5V using high cell density, DMOS trench technology.  Super high density cell design for extremely low RDS(ON) This high density process is especially tailored to minimize on-state resistance.  SOT23 Package These devices are particularly suitable for low voltage applications, notebook computer power management and other battery powered circuits where high-side switching is needed. Order Information LPM3414 □ □ □ Applications  Portable Media Players/MP3 players  Cellular and Smart mobile phone  LCD  DSC Sensor  Wireless Card F: Pb-Free Marking Information Package Type B3: SOT23-3 Device Marking Package LPM3413 Please see website. Shipping Pin Configurations Pin Description (SOT-23) TOP VIEW D Pin Number Pin Description 1 Gate Pin 2 Source Pin 3 Drain Pin G D S G SOT23L(Top View) LPM3414-01 May.-2014 S Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 4 Preliminary Datasheet LPM3414 Absolute Maximum Ratings Absolute Maximum Ratings TA=25℃ Unless Otherwise noted Parameter Symbol Maximum Units Drain-Source Voltage VDS 20 V Gate-Source Voltage VGS ±8 V ID 3 Continuous Drain Current TA=25℃ TA=70℃ 2.5 Pulsed Drain Current Power Dissipation TA=25℃ IDM 12 PD 1.4 TA=70℃ A W 0.9 Junction and Storage Temperature Range TJ, TSTG -55 to 150 ℃ Thermal Characteristics Parameter Maximum Junction-to-Ambient LPM3414-01 May.-2014 Email: marketing@lowpowersemi.com Symbol Typ. Units RθJA 125 ℃/W www.lowpowersemi.com Page 2 of 4 Preliminary Datasheet LPM3414 Electrical Characteristics Symbol Parameter Condition Min. ID=250μ A,VGS=0V 20 Typ. Max. Units STATIC PARAMETER BVDSS Drain-Source Breakdown Voltage IDSS Zero-Gate Voltage Drain Current IGSS Gate-Body Leakage Current VGS(th) Gate Threshold Voltage RDS(ON) Static Drain-Source On-Resistance V VDS=16V,VGS=0V 1 TJ=55℃ 5 VDS=0V,VGS=±8V 100 nA 0.6 1 V VGS=4.5V, ID=3A 41 50 TJ=125℃ 58 70 VGS=2.5V, ID=3A 52 62 mΩ VGS=1.8V, ID=2.5A 67 86 mΩ VDS=VGS,ID=250μA 0.4 gFS Forward Transconductance VDS=5V,ID=3A 11 VSD Diode Forward Voltage IS=1A,VGS=0V 0.76 IS Maximum Body-Diode Continuous Current μA mΩ S 1 V 2 A DYNAMIC PARAMETERS Ciss Input Capacitance CDSS Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS=10V,VGS=0V f = 1MHz VDS=0V,VGS=0V f = 1MHz 436 pF 66 pF 44 pF 3 Ω 6.2 nC 1.6 nC 0.5 nC 5.5 nS SWITCHING PARAMETERS Qg Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge t D(ON) Turn-On Delay Time tr Turn-On Rise Time VDS=10V,VGS=5V 6.3 nS t D(OFF) Turn-Off Delay Time RL=2.7Ω 40 nS tf Turn-Off Fall Time 12.7 nS trr Body-Diode Reverse Recovery Time IF=3A,d I/dt=100/μS 12.3 nS Qrr Body-Diode Reverse Recovery Charge IF=3A,d I/dt=100/μS 3.5 nC LPM3414-01 May.-2014 VDS=10V,VGS=4.5V ID=3A Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 4 Preliminary Datasheet LPM3414 Packaging Information LPM3414-01 May.-2014 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 4
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