AS1371-BTDT-30

Datasheet AS1371 4 0 0 m A , L o w I n p u t Vo l ta g e , L o w Q u i e s c e n t C u r r e n t L D O 1 General Description The AS1371 low input voltage, positive voltage regulator is designed to deliver up to 400mA while consuming typically only 15µA of quiescent current. The device operates from input voltages of 1.2V to 3.6V, and is available in fixed output voltages between 0.6V and 3.3V (programmable in 50mV steps). Operation at the full 400mA load current is dependent upon the maximum power dissipation available from package and environment. The low input voltage and ultra-low dropout voltage (20mV @ 100mA load and 80mV @ 400mA load) supports single primary cell operation in small applications, when operated with minimum input-tooutput voltage differentials. In addition, the regulator provides a power management life extension by operating from pre-existing 1.8V and 2.5V outputs to provide low output voltages for new generation portable processor cores. The device features stable output voltage with ceramic capacitors down to a value of 1µF, strict output voltage regulation tolerances (±1%), and good line- and loadregulation. The AS1371 is available in a 6-pin 2x2 TDFN package and is qualified for -40°C to +85°C operation. 2 Key Features ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! Ultra-Low Dropout Voltage: 20mV @ 100mA load Operating Input Voltage Range: 1.2V to 3.6V Output Voltages: 0.6V to 3.3V in 50mV steps Max. Output Current: 400mA Output Voltage Accuracy: ±1% Low Shutdown Current: 10nA Low Quiescent Current: 50µA @ max load Integrated Overtemperature/Overcurrent Protection Under-Voltage Lockout Feature Chip Enable Input Power-OK and Low Battery Detection Sense Input Option Minimal External Components Required Operating Temperature Range: -40°C to +85°C 6-pin 2x2 TDFN Package 3 Applications The devices are ideal for powering cordless and mobile phones, MP3 players, CD and DVD players, PDAs, hand-held computers, digital cameras, and any other hand-held and/or battery-powered device. Figure 1. AS1371 - Typical Application Diagram Input 1.2V to 3.6V CIN 1µF ON OFF IN OUT Output 0.6V to 3.3V 100kΩ COUT 1µF AS1371 EN POK GND SENSE www.austriamicrosystems.com Revision 1.04 1 - 14 AS1371 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) IN 1 6 OUT POK 2 AS1371 Exposed Pad 5 SENSE EN 3 4 GND Pin Descriptions Table 1. Pin Descriptions Pin Name IN POK EN GND SENSE OUT GND Pin Number 1 2 3 4 5 6 Exposed Pad Description LDO Input. Input voltage range: 1.2V to 3.6V. Bypass with 1µF to GND. Power-OK Output. Active-low, open-drain output indicates an out-ofregulation condition. Connect a 100kΩ pull-up resistor to pin OUT for logic levels. Leave this pin unconnected if the Power-OK feature is not used. Active-High Enable Input. A logic low reduces the supply current to < 1µA. Connect to pin IN for normal operation. Ground. This pin also functions as a heat sink. Solder it to a large pad or to the circuit-board ground plane to maximize power dissipation. Sense Input. Represents the input for the Power-OK behaviour. If connected to GND the POK output is related to OUT. LDO Output. Bypass with 1µF to GND. Exposed Pad. This pin also functions as a heat sink. Solder it to a large pad or to the circuit-board ground plane to maximize power dissipation. Internally it is connected GND. www.austriamicrosystems.com Revision 1.04 2 - 14 AS1371 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter IN and EN to GND POK and OUT to GND Output Short-Circuit Duration Thermal Resistance θJA Junction Temperature TJ Operating Temperature Range Storage Temperature Range -40 -65 Min -0.3 -0.3 Indefinite +78.6 +150 +85 +150 Max +5.0 VIN + 0.3 Units V V V ºC/W ºC ºC ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD020D “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Internally limited Notes Package Body Temperature +260 ºC www.austriamicrosystems.com Revision 1.04 3 - 14 AS1371 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VIN = VOUT (Nominal) + 0.5V, EN = IN, CIN = COUT = 1µF, TAMB = -40°C to +85ºC (unless otherwise specified). Typical Values are at TAMB = +25ºC. Table 3. Electrical Characteristics Symbol VIN VOUT Parameter Input Voltage Output Voltage Available in 50mV steps, see Ordering Information on page 13 TAMB = +25ºC, IOUT = 1mA, VOUT > 1V Output Voltage Accuracy TAMB = -40 to +85ºC, IOUT = 1mA, VOUT > 1V Conditions Min 1.2 0.6 -1 -2.7 400 650 IOUT = 0mA IOUT = 400mA IOUT = 100mA IOUT = 400mA IOUT = 1mA IOUT = 1mA to 400mA f = 10Hz to 100kHz, IOUT = 10mA f = 10kHz, IOUT = 10mA -15 15 50 20 80 0 0.003 100 50 +15 50 20 Typ Max 3.6 3.3 +1 % +2.7 mA mA µA Units V V IOUT ILIM IQ Maximum Output Current Current Limit Quiescent Current 1 VIN-VOUT ΔVLNR ΔVLDR Dropout Voltage mV mV %/mA µVRMS dB Line Regulation Load Regulation Output Voltage Noise PSRR Shutdown tON IOFF VIH VIL IEN 2 Output Voltage AC Power-Supply Rejection Ratio Exit Delay from Shutdown Enable Supply Current 3,4 90 EN = GND, TAMB = +25ºC EN = GND, TAMB = +85ºC 1.0 0.01 0.04 150 1 µs µA Enable Input Threshold EN = IN or GND, TAMB = +25ºC EN = IN or GND, TAMB = +85ºC 0.4 0.03 0.2 100 V Enable Input Bias Current nA Power-OK Output VPOK Power-OK Voltage Threshold Power-OK Sense Voltage Threshold POK Output Voltage Low POK Output Leakage Current 5 SENSE = GND, VPOKFALLING SENSE = GND, Hysteresis VOUT = 1.05V, VSENSE falling Hysteresis ISINK = 100µA 0 ≤ VPOK ≤ 3.6V, TAMB = +25ºC, VOUT in regulation 90 94 1 97 % VOUT VSENSE VOL IPOK 650 800 50 950 mV V µA 0.4 1 www.austriamicrosystems.com Revision 1.04 4 - 14 AS1371 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Thermal Protection TSHDN ΔTSHDN Thermal Shutdown Temperature Thermal Shutdown Hysteresis 150 15 ºC ºC Parameter Conditions Min Typ Max Units 1. Dropout voltage = VIN - VOUT when VOUT is 100mV < VOUT for VIN = VOUT(NOM) +0.5V (applies only to output voltages ≥ 1.3V). 2. The rise and fall time of the shutdown signal must not exceed 1ms. 3. The delay time is defined as time required to set VOUT to 95% of its final nominal value. 4. Guaranteed by design. 5. The functionality is proven by production test, limits are guaranteed by design. Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. www.austriamicrosystems.com Revision 1.04 5 - 14 AS1371 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VOUT = 1.8V, VIN = 2.3V, IOUT = 1mA, TAMB = +25°C (unless otherwise specified). Figure 3. Output Voltage vs. Temperature 1.9 1.875 Figure 4. Line Regulation, VOUT vs. VIN; 1.9 1.875 Output Voltage (V) 1.825 1.8 1.775 1.75 1.725 1.7 -40 no load Iout = 10mA Output Voltage (V) 1.85 1.85 1.825 1.8 1.775 1.75 1.725 1.7 - 40°C + 25°C + 85°C -20 0 20 40 60 80 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 Temperature (°C) Figure 5. Load Regulation, VOUT vs. IOUT; 1.9 1.875 Input Voltage (V) Figure 6. Quiescent Current vs. Input Voltage 100 90 no load Iout = 100mA Iout = 400mA Output Voltage (V) 1.85 1.825 1.8 1.775 1.75 1.725 1.7 0 50 100 150 200 250 300 350 400 - 40°C + 25°C + 85°C Quiescent Current (µA) 80 70 60 50 40 30 20 10 0 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 Output Current (mA) Figure 7. POK Voltage Threshold vs. Temperature 100 99 Input Voltage (V) Figure 8. Dropout Voltage vs. Output Current 100 90 Output Voltage (% of Voutnom) 97 96 95 94 93 92 91 90 -40 POK rising POK f alling Dropout Voltage (mV) 98 80 70 60 50 40 30 20 10 0 - 40°C + 25°C + 85°C -20 0 20 40 60 80 0 50 100 150 200 250 300 350 400 Temperature (°C) www.austriamicrosystems.com Revision 1.04 Output Current (mA) 6 - 14 AS1371 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 9. Line Transient Response; VIN = 2.3V to 2.8V, no load Figure 10. Load Transient Response; IOUT = 0mA to 100mA 500mV/Div 500mV/DIV 100ms/Div 100ms/Div Figure 11. Turn ON Figure 12. Turn OFF 1V/Div 500mV/DIV VOUT 20µs/Div 20µs/Div www.austriamicrosystems.com Revision 1.04 500mV/DIV VOUT 1V/Div EN EN 500mV/DIV VOUT VOUT 50mA/Div VIN IOUT 7 - 14 AS1371 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS1371 is a low-dropout, low-quiescent-current linear regulator intended for LDO regulator applications where output current load requirements range from no load to 400mA. All devices come with fixed output voltage from 0.6V to 3.3V. (see Ordering Information on page 13). The AS1371 also features a Power-OK output to indicate when the output is within 10% (max) of final value, and also an Enable pin. Shutdown current for the whole regulator is typically 10nA. The device features integrated short-circuit and over current protection. Under-Voltage lockout prevents erratic operation when the input voltage is slowly decaying (e.g. in a battery powered application). Thermal Protection shuts down the device when die temperature reaches 150°C. This is a useful protection when the device is under sustained short circuit conditions. As illustrated in Figure 13, the devices comprise voltage reference, error amplifier, P-channel MOSFET pass transistor, Power-OK detect logic, internal voltage divider, current limiter, thermal sensor and shutdown logic. The bandgap reference is connected to the inverting input of the error amplifier. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the P-channel MOSFET gate is pulled lower, allowing more current to pass to the output, and increases the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. The output voltage feeds back through an internal resistor voltage divider connected to pin OUT. Figure 13. AS1371 - Block Diagram AS1371 IN EN Thermal Overload Protection Shutdown/ Power-On Control Logic Error Amplifier + OUT Bandgap Voltage & Current Reference Trimmable Reference Voltage SENSE POK Power-OK Compare Logic NMOS GND Output Voltages Standard products are factory-set with output voltages from 0.6V to 3.3V. A two-digit suffix of the part number identifies the nominal output (see Ordering Information on page 13). Non-standard devices are available. For more information contact: http://www.austriamicrosystems.com/contact-us www.austriamicrosystems.com Revision 1.04 8 - 14 AS1371 Datasheet - D e t a i l e d D e s c r i p t i o n Power-OK and Low-Battery-Detect Functionality The AS1371’s power-ok or low-battery-detect circuitry is built around an N-channel MOSFET. The circuitry monitors the voltage on pin SENSE and if the voltage goes out of regulation (e.g. during dropout, current limit or thermal shutdown) the pin POK goes low. The pin SENSE can be connected to a resistive-divider to monitor a particular definable voltage and compare it with an internal voltage reference. If the SENSE pin is connected to GND an internal resistive-divider is activated and connected to the output. Therefore, the Power-OK functionality can be realised with no additional external components. The Power-OK feature is not active during shutdown and provides a power-on-reset function that can operate down to VIN = 1.2V. A capacitor to GND may be added to generate a power-on-reset delay. To obtain a logic-level output, connect a pull-up resistor from pin POK to pin OUT. Larger values for this resistor will help to minimize current consumption; a 100kΩ resistor is perfect for most applications (see Figure 1 on page 1). For the circuit shown in the left of Figure 14 on page 11, the input bias current into SENSE is very low, permitting largevalue resistor-divider networks while maintaining accuracy. Place the resistor-divider network as close to the device as possible. Use a defined resistor for R2 and then calculate R1 as: V IN R 1 = R 2 × ⎛ ------------------ – 1⎞ ⎝ V SENSE ⎠ Where: VSENSE .... Is the internal sense reference voltage. For values see Table 3 on page 4. R2 .... Is the predefined resistor in the resistor divider. (EQ 1) In case of the SENSE pin is connected to GND, an internal resistor-divider network is activated and compares the output voltage with a 94% (typ.) voltage threshold. For this particular Power-OK application, no external resistive components are necessary. Current Limiting The AS1371 include current limiting circuitry to protect against short-circuit conditions. The circuitry monitors and controls the gate voltage of the P-channel MOSFET, limiting the output current to 400mA. The P-channel MOSFET output can be shorted to ground for an indefinite period of time without damaging the device. Thermal-Overload Protection The devices are protected against thermal runaway conditions by the integrated thermal sensor circuitry. Thermal shutdown is an effective instrument to prevent die overheating since the power transistor is the principle heat source in the device. If the junction temperature exceeds 150ºC with 15ºC hysteresis, the thermal sensor starts the shutdown logic, at which point the P-channel MOSFET is switched off. After the device temperature has dropped by approximately 15ºC, the thermal sensor will turn the P-channel MOSFET on again. Note that this will be exhibited as a pulsed output under continuous thermal-overload conditions. Note: The absolute maximum junction-temperature of +150ºC should not be exceeding during continual operation. www.austriamicrosystems.com Revision 1.04 9 - 14 AS1371 Datasheet - D e t a i l e d D e s c r i p t i o n Operating Region and Power Dissipation Maximum power dissipation is determined by the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of air flow. The power dissipation of the device is calculated by: P = I OUT × ( V IN – V OUT ) Maximum power dissipation is calculated by: T J – T AMB P MAX = -----------------------θ JB + θ JA Where: TJ - TAMB is the temperature difference between the device die junction and the surrounding air. (EQ 3) (EQ 2) θJB is the thermal resistance of the package. θJA is the thermal resistance through the circuit board, copper traces, and other materials to the surrounding. Note: Pin GND is a multi-function pin providing a connection to the system ground and acting as a heat sink. This pin should be connected to the system ground using a large pad or a ground plane. www.austriamicrosystems.com Revision 1.04 10 - 14 AS1371 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information Capacitor Selection and Regulator Stability Ceramic capacitors are highly recommended as they offer distinct advantages over their tantalum and aluminum electrolytic components. For stable operation with load currents up to 400mA over the entire device temperature range, use a 1µF (min) ceramic output capacitor with an ESR