PDM2-S24-S12-S

Additional Resources: Product Page | 3D Model | PCB Footprint date 09/07/2022 page 1 of 6 SERIES: PDM2-S │ DESCRIPTION: DC-DC CONVERTER FEATURES • • • • • • • • • 2 W isolated output smaller package single/dual unregulated output 1,500 Vdc isolation short circuit protection extended temperature range (-40~105°C) antistatic protection up to 8kV high efficiency at light load efficiency up to 86% MODEL input voltage output voltage output current output power ripple and noise2 efficiency typ (Vdc) range (Vdc) (Vdc) min (mA) max (mA) max (W) typ (mVp-p) typ (%) PDM2-S5-S3-S 5 4.5~5.5 3.3 40 400 1.32 75 79 PDM2-S5-S5-S 5 4.5~5.5 5 40 400 2 75 84 PDM2-S5-S12-S1 5 4.5~5.5 12 17 167 2 75 84 1 PDM2-S5-S15-S 5 4.5~5.5 15 13 133 2 75 84 PDM2-S5-S24-S1 5 4.5~5.5 24 8 83 2 75 84 PDM2-S5-D3-S 5 4.5~5.5 ±3.3 ±30 ±303 2 75 71 PDM2-S5-D5-S1 5 4.5~5.5 ±5 ±20 ±200 2 75 80 1 PDM2-S5-D12-S 5 4.5~5.5 ±12 ±8 ±83 2 75 84 PDM2-S5-D15-S1 5 4.5~5.5 ±15 ±7 ±67 2 75 82 1 PDM2-S5-D24-S 5 4.5~5.5 ±24 ±4 ±42 2 75 84 PDM2-S12-S3-S 12 10.8~13.2 3.3 40 400 1.32 75 79 PDM2-S12-S5-S 12 10.8~13.2 5 40 400 2 75 82 PDM2-S12-S12-S1 12 10.8~13.2 12 17 167 2 75 84 PDM2-S12-S15-S 12 10.8~13.2 15 13 133 2 75 85 PDM2-S12-D3-S 12 10.8~13.2 ±3.3 ±20 ±200 1.32 75 80 1 1 1 PDM2-S12-D5-S 12 10.8~13.2 ±5 ±20 ±200 2 75 80 1 PDM2-S12-D12-S 12 10.8~13.2 ±12 ±8 ±83 2 75 84 PDM2-S12-D15-S1 12 10.8~13.2 ±15 ±7 ±67 2 75 84 PDM2-S15-D15-S 15 13.5~16.5 ±15 ±7 ±67 2 75 84 PDM2-S24-S3-S 24 21.6~26.4 3.3 40 400 1.32 75 79 PDM2-S24-S5-S 24 21.6~26.4 5 40 400 2 75 80 PDM2-S24-S12-S1 24 21.6~26.4 12 17 167 2 75 84 1 PDM2-S24-S15-S 24 21.6~26.4 15 13 133 2 75 86 PDM2-S24-S24-S1 24 21.6~26.4 24 8 83 2 75 86 PDM2-S24-D3-S 24 21.6~26.4 ±3.3 ±30 ±303 1.32 75 80 1 1 Notes: 1. UL approved 2. Ripple and noise are measured at 20 MHz BW by “parallel cable” method with 1 μF ceramic and 10 μF electrolytic capacitors on the output. cui.com Additional Resources: Product Page | 3D Model | PCB Footprint CUI Inc │ SERIES: PDM2-S │ DESCRIPTION: DC-DC CONVERTER MODEL (CONTINUED) input voltage PDM2-S24-D5-S1 date 09/07/2022 │ page 2 of 6 output voltage output current output power ripple and noise2 efficiency typ (Vdc) range (Vdc) (Vdc) min (mA) max (mA) max (W) typ (mVp-p) typ (%) 24 21.6~26.4 ±5 ±20 ±200 2 60 80 1 PDM2-S24-D12-S 24 21.6~26.4 ±12 ±8 ±83 2 60 84 PDM2-S24-D15-S1 24 21.6~26.4 ±15 ±7 ±67 2 75 84 Notes: 1. UL approved 2. Ripple and noise are measured at 20 MHz BW by “parallel cable” method with 1 μF ceramic and 10 μF electrolytic capacitors on the output. PART NUMBER KEY PDM2 - SXX - XXX -S Base Number Output S = single D = dual Input Voltage INPUT Output Voltage Packaging Style SIP parameter conditions/description min typ max units operating input voltage 5 Vdc input models 12 Vdc input models 15 Vdc input models 24 Vdc input models 4.5 10.8 13.5 21.6 5 12 15 24 5.5 13.2 16.5 26.4 Vdc Vdc Vdc Vdc surge voltage for maximum of 1 second 5 Vdc input models 12 Vdc input models 15 Vdc input models 24 Vdc input models -0.7 -0.7 -0.7 -0.7 9 18 21 30 Vdc Vdc Vdc Vdc filter capacitance filter max units ±1.5 ±1.2 % % OUTPUT parameter conditions/description min line regulation for Vin change of ±1% 3.3 Vdc output models all other models load regulation measured from 10% load to full load 3.3 Vdc output models 5 Vdc output models 12 Vdc output models 15 Vdc output models 24 Vdc output models voltage accuracy see tolerance envelope curve switching frequency 100% load, nominal input voltage temperature coefficient 100% load typ 18 12 8 7 6 % % % % % 100 kHz ±0.03 %/°C max units 1 s max units PROTECTIONS parameter conditions/description min typ short circuit protection 3 Notes: 3. The supply voltage must be discontinued at the end of the short circuit duration SAFETY AND COMPLIANCE parameter conditions/description isolation voltage input to output, for 1 minute at 1 mA max. 1,500 Vdc isolation resistance input to output at 500 Vdc 1,000 MΩ safety approvals certified to 60950-1: UL 4 Notes: min 4. See specific models noted on page 1 cui.com typ Additional Resources: Product Page | 3D Model | PCB Footprint CUI Inc │ SERIES: PDM2-S │ DESCRIPTION: DC-DC CONVERTER date 09/07/2022 │ page 3 of 6 SAFETY AND COMPLIANCE (CONTINUED) parameter conditions/description conducted emissions CISPR22/EN55022 class B (external circuit required, see Figure 1) min typ radiated emissions CISPR22/EN55022 class B (external circuit required, see Figure 1) ESD IEC/EN61000-4-2, class B, contact ± 8kV for single outputs IEC/EN61000-4-2, class B, contact ± 6kV for dual outputs MTBF as per MIL-HDBK-217F at 25°C RoHS 2011/65/EU max 3,500,000 units hours ENVIRONMENTAL parameter conditions/description min operating temperature see derating curve storage temperature storage humidity non-condensing temperature rise at nominal input, full load, Ta = 25°C typ max units -40 105 °C -55 125 °C 95 25 % °C SOLDERABILITY parameter conditions/description hand soldering 1.5 mm from case for 10 seconds min wave soldering see wave soldering profile typ max units 300 °C 260 °C max units Peak Temp. 260°C Max. Wave Soldering Time 4 Sec. Max. 250 Temperature (°C) 200 10 Sec. Max. 150 100 50 0 Time (sec.) MECHANICAL parameter conditions/description dimensions 19.65 x 7.05 x 10.16 (0.774 x 0.278 x 0.400 inch) min case material plastic (UL94-V0) weight typ mm 2.4 MECHANICAL DRAWING units: mm[inch] tolerance: ±0.25[±0.010] pin section tolerance: ±0.10[±0.004] PIN CONNECTIONS PIN Single Output Dual Output 1 Vin Vin 2 GND GND 4 0V -Vo 5 No Pin 0V 6 +Vo +Vo Note: Grid 2.54*2.54 mm Recommended PCB Layout Top View cui.com g Additional Resources: Product Page | 3D Model | PCB Footprint CUI Inc │ SERIES: PDM2-S │ DESCRIPTION: DC-DC CONVERTER date 09/07/2022 │ page 4 of 6 DERATING CURVES EMC RECOMMENDED CIRCUIT Figure 1 Table 1 Recommended external circuit components Vin (Vdc) C1, C2 CY LDM 5 4.7μF/50V -- 6.8μH 12 4.7μF/50V -- 6.8μH 15 4.7μF/50V -- 6.8μH 4.7μF/50V 1nF/2kV 6.8μH 24 Note: 1. See Table 3 for Cout values. TEST CONFIGURATION Figure 2 Table 2 External components Note: Lin 4.7μH Cin 220μF, ESR < 1.0Ω at 100 kHz 1. Input reflected-ripple current is measured with an inductor Lin and capacitor Cin to simulate source impedance. cui.com Additional Resources: Product Page | 3D Model | PCB Footprint CUI Inc │ SERIES: PDM2-S │ DESCRIPTION: DC-DC CONVERTER date 09/07/2022 │ page 5 of 6 APPLICATION NOTES 1. Output load requirement To ensure this module can operate efficiently and reliably, the minimum output load may not be less than 10% of the full load during operation. If the actual output power is low, connect a resistor at the output end in parallel to increase the load. 2. Overload Protection Under normal operating conditions, the output circuit of this product has no protection against overload. The simplest method to add this is to add a circuit breaker to the circuit. 3. Recommended circuit If you want to further decrease the input/output ripple, you can increase the capacitance accordingly or choose capacitors with low ESR(see Figure 3 & Table 3). However, the capacitance of the output filter capacitor must be appropriate. If the capacitance is too high, a startup problem might arise. For every channel of the output, to ensure safe and reliable operation, the maximum capacitance must be less than the maximum capacitive load (see Table 4). Figure 3 Single output Dual output Table 3 Table 4 Vin (Vdc) Cin (µF) Single Vo (Vdc) Cout (µF) Dual Vo (Vdc) Cout (µF) Single Vout (Vdc) Max. Capacitive Load (μF) Dual Vout (Vdc) Max. Capacitive Load1 (μF) 5 4.7 3.3 10 ±3.3 4.7 3.3 220 3.3 100 12 2.2 5 10 ±5 4.7 5 220 5 100 15 2.2 12 2.2 ±12 1 12 220 12 100 24 1 15 1 ±15 0.47 15 220 15 100 -- -- 24 1 ±24 0.47 220 24 100 24 Note: Notes: 1. 2. 3. 4. 1. For each output. Operation under minimum load will not damage the converter; however, they may not meet all specifications listed. Max. capacitive load tested at input voltage range and full load. It is recommended to use either ceramic capacitors or electrolytic capacitors on the input and the output. Using tantalum capacitors may increase the risk of failure. All specifications measured at: Ta=25°C, humidity