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PICASO

PICASO

  • 厂商:

    4DSYSTEMS

  • 封装:

    TQFP64

  • 描述:

    EMBEDDED GRAPHICS CONTROLLER

  • 数据手册
  • 价格&库存
PICASO 数据手册
Table of Contents PICASO Embedded Graphics Processor DATASHEET Document Revision: 2.2 Document Date: 21st March 2019 PICASO DATASHEET Page 1 of 26 www.4dsystems.com.au Table of Contents Table of Contents 1. Description .............................................................................................................. 3 2. Features ................................................................................................................... 3 3. Applications ............................................................................................................. 4 4. Pin Configuration and Summary ............................................................................... 5 5. Pin Description ......................................................................................................... 8 5.1. Display Interface ...................................................................................................... 8 5.2. SPI Interface – Memory Card ................................................................................... 9 5.3. Serial Ports – UARTS................................................................................................. 9 5.4. Audio Interface ...................................................................................................... 10 5.5. Touch Screen Interface .......................................................................................... 11 5.6. GPIO – General Purpose IO .................................................................................... 11 5.7. System Pins ............................................................................................................ 12 6. 4DGL – Software Language ..................................................................................... 12 7. In Circuit Serial Programming ................................................................................. 13 8. Picaso Architecture ................................................................................................ 13 8.1. PmmC Firmware..................................................................................................... 14 9. System Registers Memory Map .............................................................................. 15 10. Memory Cards – FAT16......................................................................................... 17 11. Hardware Tools .................................................................................................... 17 11.1. Programming Tools .............................................................................................. 17 11.2. Evaluation Display Modules ................................................................................. 18 12. 4D Labs - Workshop4 IDE ...................................................................................... 19 12.1. Designer Environment ......................................................................................... 19 12.2. ViSi Environment .................................................................................................. 19 12.3. ViSi Genie Environment ....................................................................................... 20 12.4. Serial Environment ............................................................................................... 20 13. Reference Design ................................................................................................. 21 14. Package Details .................................................................................................... 22 15. PCB Land Pattern.................................................................................................. 23 16. Specifications and Ratings .................................................................................... 24 17. Revision History ................................................................................................... 25 18. Legal Notice ......................................................................................................... 26 19. Contact Information ............................................................................................. 26 PICASO DATASHEET Page 2 of 26 www.4dsystems.com.au Table of Contents 1. Description 2. Features The Picaso Processor is a custom embedded 4DGL graphics controller designed to interface with many popular OLED and LCD display panels. Powerful graphics, text, image, animation and countless more features are built right inside the chip. It offers a simple plug-n-play interface to many 16-bit 80-Series colour LCD and OLED displays. • • Low-cost OLED, LCD and TFT display graphics user interface solution. Ideal as a standalone embedded graphics processor or interface to any host controller as a graphics co-processor. Connect to any colour display that supports an 80Series 16 bit wide CPU interface. All data and control signals are provided. Built in high performance virtual processor core (EVE) with an extensive byte-code instruction set optimised for 4DGL, the high level 4D Graphics Language. Comprehensive set of built in graphics and multimedia services. Display full colour images, animations, icons and video clips. 14KB of Flash memory for user code storage and 14KB of SRAM for user variables. 13 Digital I/O pins. I2C interface (Master). D0…D15, RD, WR, RS, CS – Display interface FAT16 file services. 2 Asynchronous hardware serial ports SPI interface support for SDHC/SD memory card for multimedia storage and data logging purposes (micro-SD with up to 2GB and SDHC memory cards starting from 4GB and above). 4-Wire Resistive Touch panel interface. Audio support for wave files and complex sound generation with a dedicated 16-bit PWM audio output. 8 x 16 bit timers with 1 millisecond resolution. Single 3.3 Volt Supply @25mA typical. Available in a 64 pin TQFP 10mm x 10mm package. RoHS compliant. Page 3 of 26 www.4dsystems.com.au Picaso is designed to work with minimal design effort as all of the data and control signals are provided by the chip to interface directly to the display. This offers enormous advantage to the designer in development time and cost saving and takes away all of the burden of low level design. Note: If using Picaso, please refer to Section 8.1 for information on customising the PmmC. Please contact Technical Support or Sales before starting. Picaso belongs to a family of processors powered by a highly optimised soft core virtual engine, EVE (Extensible Virtual Engine). EVE is a proprietary, high performance virtual processor with an extensive bytecode instruction set optimised to execute compiled 4DGL programs. 4DGL (4D Graphics Language) was specifically developed from ground up for the EVE engine core. It is a high level language which is easy to learn and simple to understand yet powerful enough to tackle many embedded graphics applications. All of the display built-in driver libraries implement and share the same high-level function interface. This allows your GUI application to be portable to different display controller types. • • • • • • • • • • • • • • • • • PICASO DATASHEET PICASO GRAPHICS PROCESSOR 3. Applications • • • • • • • • • • • • • • General purposes embedded graphics. Elevator control systems. Point of sale terminals. Electronic gauges and metres. Test and measurement and general purpose instrumentation. Industrial control and Robotics. Automotive system displays. GPS navigation systems. Medical Instruments and applications. Home appliances and Smart Home Automation. Security and Access control systems. Gaming equipment. Aviation systems. HMI with touch panels. PICASO DATASHEET Page 4 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 4. Pin Configuration and Summary PIN SYMBOL I/O 1 IO1 I/O 2 XR A 3 YU A 4 SCK O 5 SDI I 6 SDO O 7 RESET I 8 SDCS O 9, 20, 25, 41 10, 19, 26, 38, 57 GND VCC P P Picaso Processor Pin Out DESCRIPTION General Purpose IO1 pin. This pin is 5.0V tolerant. 4-Wire Resistive Touch Screen Right signal. Connect this pin to XR or X+ signal of the touch panel. 4-Wire Resistive Touch Screen Up signal. Connect this pin to YU or Y+ signal of the touch panel. SPI Serial Clock output. SD memory card use only. Connect this pin to the SPI Serial Clock (SCK) signal of the memory card. SPI Serial Data Input. SD memory card use only. Connect this pin to the SPI Serial Data Out (SDO) signal of the memory card. SPI Serial Data Output. SD memory card use only. Connect this pin to the SPI Serial Data In (SDI) signal of the memory card. Master Reset signal. Connect a 4.7K resistor from this pin to VCC. SD Memory-Card Chip Select. SD memory card use only. Connect this pin to the Chip Enable (CS) signal of the memory card. Device Ground. Device Positive Supply. I = Input, O = Output, P = Power, A = Analogue PICASO DATASHEET Page 5 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Picaso Processor Pin Out (continued…) PIN SYMBOL I/O DESCRIPTION 11 12 13 14 15 16 17 18 21 22 23 24 27 28 29 30 D5 D4 D3 D2 D1 D0 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O 31 RX1 I 32 TX1 O 33 TX0 O 34 RX0 I 35 RES O 36 37 39 40 42 43 SDA SCL CLK1 CLK2 BUS6 BUS7 IO5/BUS_ WR I/O O I O I/O I/O 45 AUDENB O 46 AUDIO O 47 XL O 48 YD O 49 DCENB O 50 BUS0 I/O Display Data Bus bit 5. Display Data Bus bit 4. Display Data Bus bit 3. Display Data Bus bit 2. Display Data Bus bit1. Display Data Bus bit 0. Display Data Bus bit 6. Display Data Bus bit 7. Display Data Bus bit 8. Display Data Bus bit 9. Display Data Bus bit 10. Display Data Bus bit 11. Display Data Bus bit 12. Display Data Bus bit 13. Display Data Bus bit 14. Display Data Bus bit 15. Asynchronous Serial port COM1 receive pin, RX1. Connect this pin to external serial device Transmit (Tx) signal. This pin is 5.0V tolerant. Asynchronous Serial port COM1 transmit pin, TX1. Connect this pin to external serial device receive (Rx) signal. This pin is 5.0V tolerant. Asynchronous Serial port Transmit pin, TX. Connect this pin to host microcontroller Serial Receive (Rx) signal. The host receives data from Picaso via this pin. This pin is 5.0V tolerant. Asynchronous Serial port Receive pin, RX. Connect this pin to host microcontroller Serial Transmit (Tx) signal. The host transmits data to Picaso via this pin. This pin is 5.0V tolerant. Display RESET. Picaso initialises the display by strobing this pin LOW. Connect this pin to the Reset (RES) signal of the display. I2C Data In/Out. I2C Clock Output. Device Clock input 1 of a 12MHz crystal. Device Clock input 2 of a 12MHz crystal. General Purpose Parallel I/O BUS(0..7), bit 6. This pin is 5.0V tolerant. General Purpose Parallel I/O BUS(0..7), bit 7. This pin is 5.0V tolerant. General Purpose IO5 pin. Also used for BUS_WR signal to write and latch the data to the parallel GPIO BUS(0..7). Audio Enable. Connect this pin to amplifier control. LOW: Enable external Audio amplifier. HIGH: Disable external Audio amplifier. Pulse Width Modulated (PWM) Audio output. Connect this pin to a 2 stage low pass filter then into an audio amplifier. 4-Wire Resistive Touch Screen Left signal. Connect this pin to XL or Xsignal of the touch panel. 4-Wire resistive touch screen bottom signal. Connect this pin to YD or Ysignal of the touch panel. DC-DC high voltage enable signal. This maybe the high voltage that drives the LCD backlight or the OLED panel supply. High: Enable DC-DC converter. Low : Disable DC-DC converter. General Purpose Parallel I/O BUS(0..7), bit 0. This pin is 5.0V tolerant. 44 I/O I = Input, O = Output, P = Power, A = Analogue PICASO DATASHEET Page 6 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Picaso Processor Pin Out (continued…) PIN SYMBOL I/O DESCRIPTION 51 52 53 54 55 BUS1 BUS2 BUS3 BUS4 BUS5 I/O I/O I/O I/O I/O 56 REF P 58 WR O 59 RD 60 CS O 61 RS O 62 IO4/BUS_RD I/O 63 64 IO3 IO2 I/O I/O General Purpose Parallel I/O BUS(0..7), bit 1. This pin is 5.0V tolerant. General Purpose Parallel I/O BUS(0..7), bit 2. This pin is 5.0V tolerant. General Purpose Parallel I/O BUS(0..7), bit 3. This pin is 5.0V tolerant. General Purpose Parallel I/O BUS(0..7), bit 4. This pin is 5.0V tolerant. General Purpose Parallel I/O BUS(0..7), bit 5. This pin is 5.0V tolerant. Internal voltage regulator filter capacitor. Connect a 4.7uF to 10uF capacitor from this pin to Ground. Display Write strobe signal. Picaso asserts this signal LOW when writing data to the display. Connect this pin to the Write (WR) signal of the display. Display Read strobe signal. Picaso asserts this signal LOW when reading data from the display. Connect this pin to the Read (RD) signal of the display. Display Chip Select. Picaso asserts this signal LOW when accessing the display. Connect this pin to the Chip Select (CS) signal of the display. Display Register Select. LOW: Display index or status register is selected. HIGH: Display GRAM or register data is selected. Connect this pin to the Register Select (RS or A0 or C/D or similar naming convention) signal of the display. General Purpose IO4 pin. Also used for BUS_RD signal to read and latch the data in to the parallel GPIO BUS(0..7). General Purpose IO3 pin. This pin is 5.0V tolerant. General Purpose IO2 pin. This pin is 5.0V tolerant. I = Input, O = Output, P = Power, A = Analogue PICASO DATASHEET Page 7 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR check with your display manufacturer for the correct name and function. 5. Pin Description The Picaso Processor provides both a hardware and a software interface. This section describes in detail the hardware interface pins of the device. Display Interface The Picaso supports LCD and OLED displays with an 80Series 16-bit wide CPU data interface. The connectivity to the display is easy and straight forward. The Picaso generates all of the necessary timing to drive the display. CS 0 0 0 0 1 RS 0 0 1 1 X RD 0 1 0 1 X WR 1 0 1 0 X Operation Read Display Status Register Write Display Index Register Read Display GRAM Data Write Register or GRAM Data No Operation Display Operation Table D0-D15 pins (Display Data Bus): The Display Data Bus (D0-D15) is a 16-bit bidirectional port and all display data writes and reads occur over this bus. Other control signals such as RW, RD CS, and RS synchronise the data transfer to and from the display. CS pin (Display Chip Select): The access to the display is only possible when the Display Chip Select (CS) is asserted LOW. Connect this pin to the Chip Select (CS) signal of the display. RES pin (Display Reset): Display RESET. Picaso initialises the display by strobing this pin LOW. Connect this pin to the Reset (RES) signal of the display. DCENB pin (External DC/DC Enable): DC-DC high voltage enable signal. This maybe the high voltage that drives the LCD backlight or the OLED panel supply. WR pin (Display Write): This is the display write strobe signal. The Picaso asserts this signal LOW when writing data to the display in conjunction with the display data bus (D0D15). Connect this pin to the Write (WR) signal of the display. Item Write Low Pulse Write High Pulse Write Bus Cycle Total Write Data Setup Sym tWL tWH tWT tDS Min 50 50 100 25 Typ - Max - RD pin (Display Read): This is the display read strobe signal. The Picaso asserts this signal LOW when reading data from the display in conjunction with the display data bus (D0D15). Connect this pin to the Read (RD) signal of the display. RS pin (Display Register Select): The RS signal determines whether a register command or data is sent to the display. LOW: Display index or status register is selected. HIGH: Display GRAM or register data is selected. Connect this pin to the Register Select (RS) signal of the display. Different displays utilise various naming conventions such as RS, A0, C/D or similar. Be sure to PICASO DATASHEET Page 8 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Item Read Low Pulse Read High Pulse Read Bus Cycle Total Read Data Hold Sym tRL tRH tRT tDH Min 150 150 300 75 Typ - Max - Serial Ports – UARTS The Picaso Processor has two dedicated hardware Asynchronous Serial ports that can communicate with external serial devices. These are referred to as the COM0 and the COM1 serial ports. The primary features are: SPI Interface – Memory Card The Picaso supports SD, micro-SD and MMC memory cards via its hardware SPI interface. The memory card is used for all multimedia file retrieval such as images, animations and movie clips and the SPI interface is dedicated for this purpose only. The memory card can also be used as general purpose storage for data logging applications (RAW and FAT16 format support). Support is available for micro-SD with up to 2GB capacity and for high capacity HC memory cards starting from 4GB and above. • • • • Full-Duplex 8 bit data transmission and reception. Data format: 8 bits, No Parity, 1 Stop bit. Independent Baud rates from 300 baud up to 256K baud. Single byte transmits and receives or a fully buffered service. The buffered service feature runs in the background capturing and buffering serial data without the user application having to constantly poll any of the serial ports. This frees up the application to service other tasks. SDI pin (SPI Serial Data In): The SPI Serial Data Input (SDI). SD memory card use only. Connect this pin to the SPI Serial Data Out (SDO) signal of the memory card. SDO pin (SPI Serial Data Out): The SPI Serial Data Output (SDI). SD memory card use only. Connect this pin to the SPI Serial Data In (SDI) signal of the memory card. SCK pin (SPI Serial Clock): The SPI Serial Clock output (SCK). SD memory card use only. Connect this pin to the SPI Serial Clock (SCK) signal of the memory card. SDCS pin (SD Memory Card Chip Select): SD Memory-Card Chip Select (SDCS). SD memory card use only. Connect this pin to the Chip Enable (CS) signal of the memory card. PICASO DATASHEET Page 9 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR A single byte serial transmission consists of the start bit, 8-bits of data followed by the stop bit. The start bit is always 0, while a stop bit is always 1. The LSB (Least Significant Bit, Bit 0) is sent out first following the start bit. Figure below shows a single byte transmission timing diagram. Audio Interface The exclusive audio support in the Picaso Processor makes it better than its peers in the Graphics processor range. PWM ensures better sound quality with a volume range of 8 to 127. A simple instruction empowers the user to execute the audio files. Audio operation can be carried out simultaneously with the execution of other necessary instructions. For a complete list of audio commands please refer to the separate document titled: Picaso Internal Functions Manual COM0 is also the primary interface for 4DGL user program downloads and chip configuration PmmC programming. Once the compiled 4DGL application program (EVE byte-code) is downloaded and the user code starts executing, the serial port is then available to the user application. AUDIO pin (Audio PWM output): External Amplifier Output pin. This pin provides a 16bit DAC/PWM audio output to use with an external audio amplifier. Example circuit below provides a low cost implementation. If unused then this pin must be left open or floating. Refer to Section 7. In Circuit Serial Programming for more details on PmmC/Firmware programming. TX0 pin (Serial Transmit COM0): Asynchronous Serial port COM0 transmit pin, TX0. Connect this pin to external serial device receive (Rx) signal. This pin is 5.0V tolerant. RX0 pin (Serial Receive COM0): Asynchronous Serial port COM0 receive pin, RX0. Connect this pin to external serial device transmit (Tx) signal. This pin is 5.0V tolerant. TX1 pin (Serial Transmit COM1): Asynchronous Serial port COM1 transmit pin, TX1. Connect this pin to external serial device receive (Rx) signal. This pin is 5.0V tolerant. Optional Power Audio Circuit AUDENB pin (Audio Enable output): External Amplifier enable pin. This pin provides ON/OFF amplifier control. If unused then this pin must be left open or floating. LOW: Enable external Audio amplifier. HIGH: Disable external Audio amplifier. RX1 pin (Serial Receive COM1): Asynchronous Serial port COM1 receive pin, RX1. Connect this pin to external serial device transmit (Tx) signal. This pin is 5.0V tolerant. PICASO DATASHEET Page 10 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Touch Screen Interface GPIO – General Purpose IO The Picaso supports 4-Wire resistive touch panels. The diagram below shows a simplified interface between the Picaso and a touch panel. There are 13 general purpose Input/Output (GPIO) pins available to the user. These are grouped as IO1..IO5 and BUS0..BUS7. The 5 I/O pins (IO1..IO5), provide flexibility of individual bit operations while the 8 pins (BUS0..BUS7), known as GPIO BUS, serve collectively for byte wise operations. The IO4 and IO5 also act as strobing signals to control the GPIO Bus. GPIO Bus can be read or written by strobing a low pulse (50 nsec duration or greater) the IO4/BUS_RD or IO5/BUS_WR for read or write respectively. For detailed usage refer to the separate document titled: Picaso Internal Functions Manual IO1-IO3 pins (3 x GPIO pins): General purpose I/O pins. Each pin can be individually set for INPUT or an OUTPUT. Power-Up Reset default is all INPUTS. XR pin (Touch Panel X-Read input): 4-Wire Resistive Touch Screen X-Read analog signal. Connect this pin to XR or X+ signal of the touch panel. IO4/BUS_RD pin (GPIO IO4 or BUS_RD pin): General Purpose IO4 pin. Also used for BUS_RD signal to read and latch the data in to the parallel GPIO BUS0..BUS7. XL pin (Touch Panel X-Drive output): 4-Wire Resistive Touch Screen X Drive signal. Connect this pin to XL or X- signal of the touch panel. IO5/BUS_WR pin (GPIO IO5 or BUS_WR pin): General Purpose IO5 pin. Also used for BUS_WR signal to write and latch the data to the parallel GPIO BUS0..BUS7. YU pin (Touch Panel Y-Read input): 4-Wire Resistive Touch Screen Y-Read analog signal. Connect this pin to YU or Y+ signal of the touch panel. BUS0-BUS7 pins (GPIO 8-Bit Bus): 8-bit parallel General purpose I/O Bus. YD pin (Touch Panel Y-Drive output): 4-Wire Resistive Touch Screen Y Drive signal. Connect this pin to YD or Y- signal of the touch panel. PICASO DATASHEET Note: All GPIO pins are 5.0V tolerant. Page 11 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR System Pins 6. 4DGL – Software Language VCC pins (Device Supply Voltage): Device supply voltage pins. These pins must be connected to a regulated supply voltage in the range of 3.0 Volts to 3.6 Volts DC. Nominal operating voltage is 3.3 Volts. GND pins (Device Ground): Device ground pins. These pins must be connected to system ground. RESET pin (Device Master Reset): Device Master Reset pin. An active low pulse of greater than 2 micro-seconds will reset the device. Connect a resistor (1K through to 10K, nominal 4.7K) from this pin to VCC. Only use open collector type circuits to reset the device if an external reset is required. This pin is not driven low by any internal conditions. CLK1, CLK2 pins (Device Oscillator Inputs): CLK1 and CLK2 are the device oscillator pins. Connect a 12MHz AT strip cut crystal with 22pF capacitors from each pin to GND as shown in the diagram below. The Picaso processor belongs to a family of processors powered by a highly optimised soft core virtual engine, EVE (Extensible Virtual Engine). EVE is a proprietary, high performance virtualmachine with an extensive byte-code instruction set optimised to execute compiled 4DGL programs. 4DGL (4D Graphics Language) was specifically developed from ground up for the EVE engine core. It is a high level language which is easy to learn and simple to understand yet powerful enough to tackle many embedded graphics applications. 4DGL is a graphics oriented language allowing rapid application development, and the syntax structure was designed using elements of popular languages such as C, Basic, Pascal and others. Programmers familiar with these languages will feel right at home with 4DGL. It includes many familiar instructions such as IF..ELSE..ENDIF, WHILE..WEND, REPEAT..UNTIL, GOSUB..ENDSUB, GOTO, PRINT as well as some specialised instructions SERIN, SEROUT, GFX_LINE, GFX_CIRCLE and many more. For detailed information pertaining to the 4DGL language, please refer to the following documents: 4DGL Programmer's Reference Manual Picaso Internal Functions Manual To assist with the development of 4DGL applications, the Workshop4 IDE combines a full-featured editor, a compiler, a linker and a downloader into a single PCbased application. It's all you need to code, test and run your applications. PICASO DATASHEET Page 12 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 7. In Circuit Serial Programming 8. Picaso Architecture The Picaso processor is a custom graphics processor. All functionality including the high level commands are built into the chip. This chip level configuration is available as a Firmware/PmmC (Personality-modulemicro-Code) file. The figure below illustrates the Picaso Processors architecture. A PmmC file contains all of the low level micro-code information (analogy of that of a soft silicon) which define the characteristics and functionality of the device. The ability of programming the device with a PmmC file provides an extremely flexible method of customising as well as upgrading it with future enhancements. A PmmC file can only be programmed into the device via its COM0 serial port and an access to this must be provided for on the target application board. This is referred to as In Circuit Serial Programming (ICSP). Figure below provides a typical implementation for the ICSP interface. Picaso is a high level graphics processor which runs the high level 4DGL (4D Graphics Language). It is not a conventional microcontroller with conventional microcontroller architecture, it is a custom graphics processor and therefore low level access to the chip is not required nor available to the User. The PmmC file is programmed into the device with the aid of Workshop4, the 4D Labs IDE software (See Section 12). To provide a link between the PC and the ICSP interface, a specific 4D Programming Cable is required and is available from 4D Systems. 4DGL provides high level functions for the User and does all the low level work in the background in a highly optimised fashion. Using a non-4D programming interface could damage your processor, and void your Warranty. Note: The Picaso processor is shipped blank and it must be programmed with the PmmC configuration file. PICASO DATASHEET Page 13 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR PmmC Firmware PmmC (Personality Module Micro-Code) - this is the operating system, incorporating the EVE runtime (Extensible Virtual Engine) which has an extensive byte-code instruction set programmed via the Workshop4 Software IDE. The PmmC Loader can be thought of like a bootloader, and allows the transfer of a PmmC from the Users’ PC into the System Flash storage on the Picaso processor. Within the PmmC are hundreds of built in functions for graphics, sound, math functions etc, no need to include libraries, or wait for hefty compile times – it’s all built in. The PmmC is in protected memory, and cannot be read or damaged by inadvertent writes to illegal FLASH areas. The PmmC is upgradable by the User and can be done at any time. It however will wipe the Users application from Flash, so this will need to be reloaded after a PmmC update is completed. Loading the PmmC is achieved using our PmmC Loader tool, or using the ScriptC command line tool. Note: IMPORTANT!!! If you are wanting to use Picaso in a product, please contact the 4D Labs Tech Support or Sales departments to discuss your requirements. PmmC’s can ONLY be created by 4D Labs, and depending on the display you have selected and the Driver IC it uses, will determine how difficult the process is. Please make contact with us BEFORE you start. PICASO DATASHEET Page 14 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 9. System Registers Memory Map The following tables outline in detail the Picaso system registers and flags. Picaso System Registers and Flags LABEL RANDOM_LO RANDOM_HI SYSTEM_TIMER_LO SYSTEM_TIMER_HI TIMER0 TIMER1 TIMER2 TIMER3 TIMER4 TIMER5 TIMER6 TIMER7 SYS_X_MAX SYS_Y_MAX GFX_XMAX GFX_YMAX GFX_LEFT GFX_TOP GFX_RIGHT GFX_BOTTOM GFX_X1 GFX_Y1 GFX_X2 GFX_Y2 GFX_X_ORG GFX_Y_ORG GFX_HILITE_LINE GFX_LINE_COUNT GFX_LAST_SELECTION GFX_HILIGHT_BACKGROUND GFX_HILIGHT_FOREGROUND GFX_BUTTON_FOREGROUND GFX_BUTTON_BACKGROUND GFX_BUTTON_MODE GFX_TOOLBAR_HEIGHT GFX_STATUSBAR_HEIGHT GFX_LEFT_GUTTER_WIDTH GFX_RIGHT_GUTTER_WIDTH GFX_PIXEL_SHIFT GFX_VECT_X1 PICASO DATASHEET ADDRESS DEC HEX 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 USAGE random generator LO word random generator HI word 1msec system timer LO word 1msec system timer HI word 1msec user timer 0 1msec user timer 1 1msec user timer 2 1msec user timer 3 1msec user timer 4 1msec user timer 5 1msec user timer 6 1msec user timer 7 display hardware X res-1 display hardware Y res-1 width of current orientation height of current orientation image left real point image top real point image right real point image bottom real point image left clipped point image top clipped point image right clipped point image bottom clipped point current X origin current Y origin current multi line button hilite line count of lines in multiline button Last selected line multi button hilite background colour multi button hilite background colour store default text colour for hilite line tracker store default button colour for hilite line tracker store current buttons mode height above height below width to left width to right pixel shift for button depress illusion gp rect, used by multiline button to hilite required line Page 15 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Picaso System Registers and Flags (continued…) LABEL ADDRESS DEC HEX USAGE GFX_VECT_Y1 72 0x48 GFX_VECT_X2 73 0x49 GFX_VECT_Y2 74 0x4A GFX_THUMB_PERCENT 75 0x4B size of slider thumb as percentage GFX_THUMB_BORDER_DARK 76 0x4C darker shadow of thumb GFX_THUMB_BORDER_LIGHT 77 0x4D lighter shadow of thumb TOUCH_XMINCAL 78 0x4E touch calibration value TOUCH_YMINCAL 79 0x4F touch calibration value TOUCH_XMAXCAL 80 0x50 touch calibration value TOUCH_YMAXCAL 81 0x51 touch calibration value IMG_WIDTH 82 0x52 width of currently loaded image IMG_HEIGHT 83 0x53 height of currently loaded image IMG_FRAME_DELAY 84 0x54 if image, else inter frame delay for movie IMG_FLAGS 85 0x55 bit 4 determines colour mode, other bits reserved IMG_FRAME_COUNT 86 0x56 count of frames in a movie IMG_PIXEL_COUNT_LO 87 0x57 count of pixels in the current frame IMG_PIXEL_COUNT_HI 88 0x58 count of pixels in the current frame IMG_CURRENT_FRAME 89 0x59 last frame shown MEDIA_ADDRESS_LO 90 0x5A micro-SD byte address LO MEDIA_ADDRESS_HI 91 0x5B micro-SD byte address HI MEDIA_SECTOR_LO 92 0x5C micro-SD sector address LO MEDIA_SECTOR_HI 93 0x5D micro-SD sector address HI MEDIA_SECTOR_COUNT 94 0x5E micro-SD number of bytes remaining in sector TEXT_XPOS 95 0x5F text current x pixel position TEXT_YPOS 96 0x60 text current y pixel position TEXT_MARGIN 97 0x61 text left pixel pos for carriage return TXT_FONT_TYPE 98 0x62 font type, 0 = system font, else pointer to user font TXT_FONT_MAX 99 0x63 max number of chars in font TXT_FONT_OFFSET 100 0x64 starting offset (normally 0x20) TXT_FONT_WIDTH 101 0x65 current font width TXT_FONT_HEIGHT 102 0x66 Current font height GFX_TOUCH_REGION_X1 103 0x67 touch capture region GFX_TOUCH_REGION_Y 104 0x68 GFX_TOUCH_REGION_X2 105 0x69 GFX_TOUCH_REGION_Y2 106 0x6A GFX_CLIP_LEFT_VAL 107 0x6B left clipping point (set with gfx_ClipWindow(...) GFX_CLIP_TOP_VAL 108 0x6C top clipping point (set with gfx_ClipWindow(...) GFX_CLIP_RIGHT_VAL 109 0x6D right clipping point (set with gfx_ClipWindow(...) GFX_CLIP_BOTTOM_VAL 110 0x6E bottom clipping point (set with gfx_ClipWindow(...) GFX_CLIP_LEFT 111 0x6F current clip value (reads full size if clipping turned off) GFX_CLIP_TOP 112 0x70 current clip value (reads full size if clipping turned off) GFX_CLIP_RIGHT 113 0x71 current clip value (reads full size if clipping turned off) GFX_CLIP_BOTTOM 114 0x72 current clip value (reads full size if clipping turned off) GRAM_PIXEL_COUNT_LO 115 0x73 LO word of count of pixels in the set GRAM area GRAM_PIXEL_COUNT_HI 116 0x74 HI word of count of pixels in the set GRAM area NOTE: These registers are accessible with peekW and pokeW functions. PICASO DATASHEET Page 16 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 10. Memory Cards – FAT16 11. Hardware Tools The Picaso Processor uses off the shelf standard SDHC/SD/micro-SD memory cards with up to 2GB capacity usable with FAT16 formatting. For any FAT file related operations, before the memory card can be used it must first be formatted with FAT16 option. The formatting of the card can be done on any PC system with a card reader. Select the appropriate drive and choose the FAT16 (or just FAT in some systems) option when formatting. The card is now ready to be used in the Picaso based application. The following hardware tools are required for full control of the Picaso Processor. The Picaso Processor also supports high capacity HC memory cards (4GB and above). The available capacity of SD-HC cards varies according to the way the card is partitioned and the commands used to access it. Programming Tools The 4D Programming Cable and 4D-UPA Programming Adaptor are essential hardware tools to program, customise and test the Picaso Processor. Anyone of these can be used. The 4D programming interfaces are used to program a new Firmware/PmmC, Display Driver and for downloading compiled 4DGL code into the processor. They even serve as an interface for communicating serial data to the PC. The 4D Programming Cable and 4D-UPA Programming Adaptor are available from 4D Systems, www.4dsystems.com.au Using a non-4D programming interface could damage your processor, and void your Warranty. The FAT partition is always first (if it exists) and can be up to the maximum size permitted by FAT16. Windows 7 will format FAT16 up to 4GB. Windows XP will format FAT16 up to 2GB and the Windows XP command prompt will format FAT16 up to 4GB. RMPET, a 4D Labs Tool found in the Workshop4 IDE, is capable of repartitioning and formatting microSD cards to be the appropriate type and format for 4D Labs processors. This should be used for all cards. 4D Programming Cable Note: A SPI Compatible SDHC/SD/micro-SD card MUST be used. Picaso along with other 4D Labs Processors require SPI mode to communicate with the SD card. If a non-SPI compatible SD card is used then the processor will simply not be able to mount the card. 4D-UPA Programming Adaptor PICASO DATASHEET Page 17 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Evaluation Display Modules The following modules, available from 4D Systems, can be used for evaluation purposes to discover what the Picaso processor has to offer. gen4-uLCD-24PT – 2.4” Intelligent Picaso Display gen4-uLCD-28PT – 2.8” Intelligent Picaso Display gen4-uLCD-32PT – 3.2” Intelligent Picaso Display Note: gen4 Picaso display module plastic ships in Red colour, not white as pictured. PICASO DATASHEET Page 18 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR Designer Environment 12. 4D Labs - Workshop4 IDE Workshop4 is a comprehensive software IDE that provides an integrated software development platform for all of the 4D family of processors and modules. The IDE combines the Editor, Compiler, Linker and Down- Loader to develop complete 4DGL application code. All user application code is developed within the Workshop4 IDE. The Workshop4 IDE supports multiple development environments for the user, to cater for different user requirements and skill level. • The Designer environment enables the user to write 4DGL code in its natural form to program the Picaso module. • A visual programming experience, suitably called ViSi, enables drag-and-drop type placement of objects to assist with 4DGL code generation and allows the user to visualise how the display will look while being developed. • An advanced environment called ViSi-Genie doesn’t require any 4DGL coding at all, it is all done automatically for you. Simply lay the display out with the objects you want, set the events to drive them and the code is written for you automatically. ViSi-Genie provides the latest rapid development experience from 4D Labs. • A Serial environment is also provided to transform the Picaso module into a slave serial module, allowing the user to control the display from any host microcontroller or device with a serial port. Choose the Designer environment to write 4DGL code in its raw form. The Designer environment provides the user with a simple yet effective programming environment where pure 4DGL code can be written, compiled and downloaded to the Picaso. ViSi Environment ViSi was designed to make the creation of graphical displays a more visual experience. ViSi is a great software tool that allows the user to see the instant results of their desired graphical layout. Additionally, there is a selection of inbuilt dials, gauges and meters that can simply be placed onto the simulated module display. From here each object can have its properties edited, and at the click of a button all relevant 4DGL code associated with that object is produced in the user program. The user can then write 4DGL code around these objects to utilise them in the way they choose. The Workshop4 IDE is available from the 4D Labs website. www.4dsystems.com.au For a comprehensive manual on the Workshop4 IDE Software along with other documents, refer to the documentation from the 4D Labs website, on the Workshop4 product page. PICASO DATASHEET Page 19 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR ViSi Genie Environment Serial Environment ViSi Genie is a breakthrough in the way 4D Labs’ graphic modules are programmed. It is an environment like no other, a code-less programming environment that provides the user with a rapid visual experience, enabling a simple GUI application to be ‘written’ from scratch in literally seconds. ViSi Genie does all the background coding, no 4DGL to learn, it does it all for you. Pick and choose the relevant objects to place on the display, much like the ViSi Environment, yet without having to write a single line of code. Each object has parameters which can be set, and configurable events to animate and drive other objects or communicate with external devices. Simply place an object on the screen, position and size it to suit, set the parameters such as colour, range, text, and finally select the event you wish the object to be associated with, it is that simple. The Serial environment in the Workshop4 IDE provides the user the ability to transform the Picaso into a slave serial graphics controller. This enables the user to use their favourite microcontroller or serial device as the Host, without having to learn 4DGL or program in a separate IDE. Once the Picaso is configured and downloaded to from the Serial Environment, simple graphic commands can be sent from the users host microcontroller to display primitives, images, sound or even video. Refer to the Picaso Serial Command Set Reference Manual from the Workshop4 product page on the 4D Systems website for a complete listing of all the supported serial commands. In seconds you can transform a blank display into a fully animated GUI with moving sliders, animated press and release buttons, and much more. All without writing a single line of code! ViSi Genie provides the user with a feature rich rapid development environment, second to none. PICASO DATASHEET Page 20 of 26 www.4dsystems.com.au DIABLO16 GRAPHICS PROCESSOR 13. Reference Design PICASO DATASHEET Page 21 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 14. Package Details PICASO DATASHEET Page 22 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 15. PCB Land Pattern PICASO DATASHEET Page 23 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 16. Specifications and Ratings ABSOLUTE MAXIMUM RATINGS Operating ambient temperature ........................................................................................................... -40°C to +85°C Storage temperature ................................................................................................................................ -65°C +150°C Voltage on VCC with respect to GND ....................................................................................................... -0.3V to 4.0V Maximum current out of GND pin ..................................................................................................................... 300mA Maximum current into VCC pin ........................................................................................................................ 250mA Maximum output current sunk/sourced by any pin ........................................................................................... 4.0mA Total power dissipation ........................................................................................................................................ 1.0W NOTE: Stresses above those listed here may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the recommended operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage (VCC) Operating Temperature External Crystal (Xtal) Input Low Voltage (VIL) Input High Voltage (VIH) Input High Voltage (VIH) Conditions VCC = 3.3V, all pins VCC = 3.3V, non 5V tolerant pins All GPIO pins, RX0 and TX0 pins Min 3.0 -40 -VGND 0.8VCC 0.8VCC Typ 3.3 -12.00 ---- Max 3.6 +80 -0.2VCC VCC 5.5 Units V °C MHz V V V GLOBAL CHARACTERISTICS BASED ON OPERATING CONDITIONS Parameter Supply Current (ICC) Internal Operating Frequency Output Low Voltage (VOL) Output High Voltage (VOH) A/D Converter Resolution Capacitive Loading Capacitive Loading Flash Memory Endurance Conditions VCC = 3.3V Xtal = 12.00Mhz VCC = 3.3V, IOL = 3.4mA VCC = 3.3V, IOL = -2.0mA XR, YU pins CLK1, CLK2 pins All other pins PmmC Programming Min Typ Max Units ---2.4 8 ---- 50 48.00 -----10000 90 -0.4 -10 15 50 -- mA MHz V V bits pF pF E/W ORDERING INFORMATION Order Code: Picaso Package: TQFP-64, 10mm x 10mm Packaging: Trays of 160 pieces PICASO DATASHEET Page 24 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 17. Revision History Revision Document Date 1.2 2.0 2.1 2.2 12/08/2016 01/05/2017 23/01/2018 21/03/2019 PICASO DATASHEET Description Updated contents Updated formatting and contents Updated formatting Updated formatting Page 25 of 26 www.4dsystems.com.au PICASO GRAPHICS PROCESSOR 18. Legal Notice Proprietary Information The information contained in this document is the property of 4D Labs Semiconductors and may be the subject of patents pending or granted, and must not be copied or disclosed without prior written permission. 4D Labs Semiconductors endeavours to ensure that the information in this document is correct and fairly stated but does not accept liability for any error or omission. The development of 4D Labs Semiconductors products and services is continuous and published information may not be up to date. It is important to check the current position with 4D Labs Semiconductors. 4D Labs Semiconductors reserves the right to modify, update or makes changes to Specifications or written material without prior notice at any time. All trademarks belong to their respective owners and are recognised and acknowledged. Disclaimer of Warranties & Limitation of Liability 4D Labs Semiconductors makes no warranty, either expressed or implied with respect to any product, and specifically disclaims all other warranties, including, without limitation, warranties for merchantability, non-infringement and fitness for any particular purpose. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. Images and graphics used throughout this document are for illustrative purposes only. All images and graphics used are possible to be displayed on the 4D Labs Semiconductors range of products, however the quality may vary. In no event shall 4D Labs Semiconductors be liable to the buyer or to any third party for any indirect, incidental, special, consequential, punitive or exemplary damages (including without limitation lost profits, lost savings, or loss of business opportunity) arising out of or relating to any product or service provided or to be provided by 4D Labs Semiconductors, or the use or inability to use the same, even if 4D Labs Semiconductors has been advised of the possibility of such damages. 4D Labs Semiconductors products are not fault tolerant nor designed, manufactured or intended for use or resale as on line control equipment in hazardous environments requiring fail – safe performance, such as in the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, direct life support machines or weapons systems in which the failure of the product could lead directly to death, personal injury or severe physical or environmental damage (‘High Risk Activities’). 4D Labs Semiconductors and its suppliers specifically disclaim any expressed or implied warranty of fitness for High Risk Activities. Use of 4D Labs Semiconductors’ products and devices in 'High Risk Activities' and in any other application is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless 4D Labs Semiconductors from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any 4D Labs Semiconductors intellectual property rights. 19. Contact Information For Technical Support: www.4dlabs.com.au/contact For Sales Support: sales@4dlabs.com.au Website: www.4dlabs.com.au Copyright 4D Labs Semiconductors 2000-2019. PICASO DATASHEET Page 26 of 26 www.4dsystems.com.au
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