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74ALVT16827DL,518

74ALVT16827DL,518

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    SSOP56_300MIL

  • 描述:

    IC BUFFER NON-INVERT 3.6V 56SSOP

  • 数据手册
  • 价格&库存
74ALVT16827DL,518 数据手册
74ALVT16827 20-bit buffer/line driver; non-inverting; 3-state Rev. 4 — 24 January 2018 1 Product data sheet General description The 74ALVT16827 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5 V or 3.3 V with I/O compatibility to 5 V. The 74ALVT16827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE0 and nOE1) for maximum control flexibility. 2 Features and benefits • • • • • • • Multiple VCC and GND pins minimize switching noise 5 V I/O compatible Live insertion and extraction permitted 3-state output buffers Power-up 3-state Output capability: +64 mA and -32 mA Latch-up protection: – JESD 78 exceeds 500 mA • ESD protection: – MIL STD 883 Method 3015: exceeds 2000 V – MM: exceeds 200 V • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs. 3 Ordering information Table 1. Ordering information Type number 74ALVT16827DGG Package Temperature range Name Description Version -40 °C to +85 °C TSSOP56 plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 4 Functional diagram 55 54 52 51 49 48 47 45 44 1OE0 56 1OE1 43 1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9 2 3 5 6 8 9 10 12 13 14 42 41 40 38 37 36 34 33 31 30 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9 28 2OE0 29 2OE1 2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9 15 16 17 19 20 21 23 24 26 & 28 29 & 55 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 30 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9 1 1 56 27 EN2 1 1 1 2 2 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 26 27 001aad055 001aad056 Figure 1. Logic symbol EN1 Figure 2. IEC logic symbol nA0 nA1 nA2 nA3 nA4 nA5 nA6 nA7 nA8 nY0 nY1 nY2 nY3 nY4 nY5 nY6 nY7 nY8 nA9 nOE0 nOE1 nY9 001aad061 Figure 3. Logic diagram 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 2 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 5 Pinning information 5.1 Pinning 1OE0 1 56 1OE1 1Y0 2 55 1A0 1Y1 3 54 1A1 GND 4 53 GND 1Y2 5 52 1A2 1Y3 6 51 1A3 VCC 7 50 VCC 1Y4 8 49 1A4 1Y5 9 48 1A5 1Y6 10 47 1A6 GND 11 46 GND 1Y7 12 45 1A7 1Y8 13 44 1A8 1Y9 14 2Y0 15 43 1A9 16827 42 2A0 2Y1 16 41 2A1 2Y2 17 40 2A2 GND 18 39 GND 2Y3 19 38 2A3 2Y4 20 37 2A4 2Y5 21 36 2A5 VCC 22 35 VCC 2Y6 23 34 2A6 2Y7 24 33 2A7 GND 25 32 GND 2Y8 26 31 2A8 2Y9 27 30 2A9 2OE0 28 29 2OE1 001aad054 Figure 4. Pin configuration 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 3 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7, 1A8, 1A9 55, 54, 52, 51, 49, 48, 47, 45, 44, 43 data input 2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7, 2A8, 2A9 42, 41, 40, 38, 37, 36, 34, 33, 31, 30 data input 1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7, 1Y8, 1Y9 2, 3, 5, 6, 8, 9, 10, 12, 13, 14 data output 2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6, 2Y7, 2Y8, 2Y9 15, 16, 17, 19, 20, 21, 23, 24, 26, 27 data output 1OE0, 1OE1, 2OE0, 2OE1 1, 56, 28, 29 output enable inputs (active-LOW) GND 4, 11, 18, 25, 32, 39, 46, 53 ground (0 V) VCC 7, 22, 35, 50 positive voltage supply 6 Functional description Table 3. Function table [1] Input Output Operating mode nOEn nAn nYn L L L transparent L H H transparent H X Z High-impedance [1] X = don’t care; Z = High-impedance OFF-state; H = HIGH voltage level; L = LOW voltage level. 7 Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit -0.5 +7.0 V input voltage [1] -1.2 +7.0 V VO output voltage output in OFF or HIGH-state [1] -0.5 +5.5 V IIK input clamping current VI < 0 V -18 - mA IOK output clamping current VO < 0 V -50 - mA IO output current output in LOW-state - 128 mA - 150 °C -65 +150 °C VI Tj junction temperature Tstg storage temperature [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 4 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 8 Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V Unit Min Max Min Max 2.3 2.7 3.0 3.6 V VCC supply voltage VI input voltage 0 5.5 0 5.5 V IOH HIGH-level output current - -8 - -32 mA IOL LOW-level output current none - 8 - 32 mA current duty cycle ≤ 50 %; f ≥ 1 kHz - 24 - 64 mA outputs enabled - 10 - 10 ns/V -40 +85 -40 +85 °C [1] Max Unit - -0.85 -1.2 V Δt/ΔV input transition rise and fall rate Tamb ambient temperature 9 Static characteristics Table 6. Static characteristics At recommended operating conditions; Tamb = -40 °C to +85 °C; voltages are referred to GND (ground = 0 V). Symbol Parameter Conditions Min Typ VCC = 2.5 V ± 0.2 V VIK input clamping voltage VIH HIGH-level input voltage 1.7 - - V VIL LOW-level input voltage - - 0.7 V VOH HIGH-level output voltage VCC = 2.3 V to 2.7 V; IO = -100 μA VCC - 0.2 VCC - V VCC = 2.3 V; IO = -8 mA 1.8 2.1 - V LOW-level output voltage VCC = 2.3 V; IO = 100 μA - 0.07 0.2 V VCC = 2.3 V; IO = 24 mA - 0.3 0.5 V input leakage current all pins - 0.1 10 μA - 0.1 ±1 μA VCC = 2.7 V; VI = VCC - 0.1 1 μA VCC = 2.7 V; VI = 0 V - 0.1 -5 μA VOL II VCC = 2.3 V; IIK = -18 mA VCC = 0 V or 2.7 V; VI = 5.5 V control pins VCC = 2.7 V; VI = VCC or GND [2] data pins IOFF power-off leakage current VCC = 0 V; VI or VO = 0 V to 4.5 V - 0.1 ±100 μA IBHL bus hold LOW current VCC = 2.5 V; VI = 0.8 V - 115 - μA IBHH bus hold HIGH current VCC = 2.5 V; VI = 2.0 V - -10 - μA 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 5 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state Symbol Parameter Conditions IEX external current output in HIGH-state when VO > VCC; VO = 5.5 V; VCC = 2.3 V IO(pu/pd) power-up/power-down output current VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOEn = don’t care IOZ OFF-state output current VCC = 2.7 V; VI = VIL or VIH ICC supply current Min Typ [1] Max Unit - 10 125 μA - 1 100 μA output HIGH; VO = 2.3 V - 0.5 5 μA output LOW; VO = 0.5 V - 0.5 -5 μA - 0.04 0.1 mA [3] VCC = 2.7 V; VI = GND or VCC; IO = 0 A outputs HIGH outputs LOW outputs disabled - 3.6 5.0 mA [4] - 0.04 0.1 mA [5] - 0.04 0.4 mA ΔICC additional supply current per input pin; VCC = 2.3 V to 2.7 V; one input at VCC - 0.6 V; other inputs at VCC or GND CI input capacitance VI = 0 V or VCC - 3 - pF CO output capacitance VO = 0 V or VCC - 9 - pF VCC = 3.0 V; IIK = -18 mA - -0.85 -1.2 V VCC = 3.3 V ± 0.3 V VIK input clamping voltage VIH HIGH-level input voltage 2.0 - - V VIL LOW-level input voltage - - 0.8 V VOH HIGH-level output voltage VCC = 3.0 V to 3.6 V; IO = -100 μA VCC - 0.2 VCC - V 2.0 2.3 - V LOW-level output voltage VCC = 3.0 V IO = 100 μA - 0.07 0.2 V IO = 16 mA - 0.25 0.4 V IO = 32 mA - 0.3 0.5 V IO = 64 mA - 0.4 0.55 V - 0.1 ±1 μA - 0.1 10 μA VCC = 3.6 V; VI = VCC - 0.5 1 μA VCC = 3.6 V; VI = 0 V - 0.1 -5 μA VOL II input leakage current VCC = 3.0 V; IO = -32 mA control pins VCC = 3.6 V; VI = VCC or GND VCC = 0 V or 3.6 V; VI = 5.5 V [2] data pins IOFF power-off leakage current VCC = 0 V; VI or VO = 0 V to 4.5 V - 0.1 ±100 μA IBHL bus hold LOW current data inputs; VCC = 3 V; VI = 0.8 V 75 130 - μA IBHH bus hold HIGH current data inputs; VCC = 3 V; VI = 2.0 V -75 -140 - μA 500 - - μA IBHLO bus hold LOW overdrive current 74ALVT16827 Product data sheet data inputs; VCC = 3.6 V; VI = 0 V to 3.6 V [6] All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 6 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state Symbol Parameter Conditions Typ -500 - - μA - 10 125 μA - 1 ±100 μA output HIGH; VO = 3.0 V - 0.5 5 μA output LOW; VO = 0.5 V - 0.5 -5 μA - 0.07 0.1 mA IBHHO bus hold HIGH overdrive current data inputs; VCC = 3.6 V; VI = 0 V to 3.6 V IEX external current output in HIGH-state when VO > VCC; VO = 5.5 V; VCC = 3.0 V IO(pu/pd) power-up/power-down output current VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOEn = don’t care IOZ OFF-state output current VCC = 3.6 V; VI = VIL or VIH ICC supply current [1] Min [6] [7] Max Unit VCC = 3.6 V; VI = GND or VCC; IO = 0 A outputs HIGH outputs LOW outputs disabled - 4.2 6 mA [4] - 0.07 0.1 mA [5] - 0.04 0.4 mA ΔICC additional supply current per input pin; VCC = 3 V to 3.6 V; one input at VCC - 0.6 V; other inputs at VCC or GND CI input capacitance VI = 0 V or VCC - 3 - pF CO output capacitance VO = 0 V or VCC - 9 - pF [1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C. All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C. [2] Unused pins at VCC or GND. [3] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 2.5 V ± 0.2 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only. [4] ICC with outputs disabled is measured with outputs pulled up to VCC or pulled down to ground. [5] This is the increase in supply current for each input at the specified voltage level other than VCC or GND. [6] This is the bus hold overdrive current required to force the input to the opposite logic state. [7] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only. 10 Dynamic characteristics Table 7. Dynamic characteristics At recommended operating conditions; Tamb = -40 °C to +85 °C; Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions Min Typ [1] Max Unit VCC = 2.5 V ± 0.2 V tPLH LOW to HIGH propagation delay nAn to nYn; see Figure 5 1.0 2.0 2.9 ns tPHL HIGH to LOW propagation delay nAn to nYn; see Figure 5 1.0 2.0 3.0 ns tPZH OFF-state to HIGH propagation delay nOEn to nYn; see Figure 6 2.0 3.2 5.5 ns tPZL OFF-state to LOW propagation delay nOEn to nYn; see Figure 6 1.7 2.9 4.3 ns tPHZ HIGH to OFF-state propagation delay nOEn to nYn; see Figure 6 1.8 2.8 5.1 ns tPLZ LOW to OFF-state propagation delay nOEn to nYn; see Figure 6 1.4 2.3 3.9 ns VCC = 3.3 V ± 0.3 V tPLH LOW to HIGH propagation delay nAn to nYn; see Figure 5 0.7 1.5 2.2 ns tPHL HIGH to LOW propagation delay nAn to nYn; see Figure 5 0.8 1.6 2.3 ns 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 7 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state Symbol Parameter Conditions Min Typ tPZH OFF-state to HIGH propagation delay nOEn to nYn; see Figure 6 1.6 tPZL OFF-state to LOW propagation delay nOEn to nYn; see Figure 6 tPHZ HIGH to OFF-state propagation delay tPLZ LOW to OFF-state propagation delay [1] Max Unit 2.6 3.8 ns 1.4 2.3 3.2 ns nOEn to nYn; see Figure 6 2.3 3.2 4.8 ns nOEn to nYn; see Figure 6 1.5 2.5 3.8 ns [1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C. All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C. 10.1 Waveforms and test circuit VI nAn input VM VM GND tPLH tPHL VOH VM nYn output VM VOL mna171 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Figure 5. Input (nAn) to output (nYn) propagation delays VI nOEn input VM VM GND tPLZ 3.0 V or VCC output LOW-to-OFF OFF-to-LOW VOL tPZL VM VX tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VY VM GND outputs enabled outputs disabled outputs enabled aaa-028099 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Figure 6. The 3-state output enable and disable times Table 8. Measurement points VCC Input Output VI VM VM VX VY VCC ≤ 2.7 V VCC 0.5 x VCC 0.5 x VCC VOL + 0.15 V VOH - 0.15 V VCC ≥ 3.0 V 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 8 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state VI negative pulse tW 90 % VM VM 10 % 0V tf tr VI positive pulse 0V tr tf 90 % VM VM 10 % tW VEXT VCC VI G RL VO DUT RT CL RL 001aae331 Test data is given in Table 9. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Figure 7. Test circuit for measuring switching times Table 9. Test data Input Load VEXT VI fi tW tr, tf CL RL tPHZ, tPZH tPLZ, tPZL 3.0 V or VCC whichever is less ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6 V or VCC x 2 open 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 tPLH, tPHL © Nexperia B.V. 2018. All rights reserved. 9 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 11 Package outline TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 E D A X c HE y v M A Z 56 29 Q A2 (A 3 ) A1 pin 1 index A θ Lp L 1 28 w M bp e detail X 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z θ mm 1.2 0.15 0.05 1.05 0.85 0.25 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 8.3 7.9 1 0.8 0.4 0.50 0.35 0.25 0.08 0.1 0.5 0.1 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT364-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Figure 8. Package outline SOT364-1 (TSSOP56) 74ALVT16827 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 10 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 12 Abbreviations Table 10. Abbreviations Acronym Description BiCMOS Bipolar Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge MIL Military MM Machine Model 13 Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74ALVT16827 v.4 20180124 Product data sheet - 74ALVT16827 v.3 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Type number 74ALVT16827DL (SOT371-1 / SSOP56) removed. 74ALVT16827 v.3 20050602 Modifications: • The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Section 2: modified ‘JEDEC Std 17’ into ‘JESD78’. • Section 10: changed values in column ‘min’ 74ALVT16827 v.2 19980213 Product specification - 74ALVT16827 v.1 74ALVT16827 v.1 19960619 Product specification - - 74ALVT16827 Product data sheet Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 74ALVT16827 v.2 © Nexperia B.V. 2018. All rights reserved. 11 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state 14 Legal information 14.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia's aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical 74ALVT16827 Product data sheet systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 12 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer 74ALVT16827 Product data sheet design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 January 2018 © Nexperia B.V. 2018. All rights reserved. 13 / 14 74ALVT16827 Nexperia 20-bit buffer/line driver; non-inverting; 3-state Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 10.1 11 12 13 14 General description ............................................ 1 Features and benefits .........................................1 Ordering information .......................................... 1 Functional diagram ............................................. 2 Pinning information ............................................ 3 Pinning ............................................................... 3 Pin description ................................................... 4 Functional description ........................................4 Limiting values .................................................... 4 Recommended operating conditions ................ 5 Static characteristics .......................................... 5 Dynamic characteristics .....................................7 Waveforms and test circuit ................................ 8 Package outline .................................................10 Abbreviations .................................................... 11 Revision history ................................................ 11 Legal information .............................................. 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2018. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 24 January 2018 Document identifier: 74ALVT16827
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