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IQS231A-00000000-DNR

IQS231A-00000000-DNR

  • 厂商:

    AZOTEQ

  • 封装:

    -

  • 描述:

    1 CH. CAPACITIVE SAR SENSOR FOR

  • 数据手册
  • 价格&库存
IQS231A-00000000-DNR 数据手册
Azoteq IQ Switch® ProxSense® Series IQS231A/B DATASHEET Single Channel Capacitive Proximity/Touch Controller for SAR Applications 1 Device Overview The IQS231A/B ProxSense® IC is a self-capacitance controller designed for applications where an awake/activate on proximity function is required. The IQS231A/B is an ultra-low power solution that uses unique release and/or movement detection for applications that require long- term detection. The IQS231A/B operates standalone or I2C and features configuration via OTP (One Time Programmable) bits. Switching from I2C to standalone during runtime is also possible in order to access all settings while offering the simplicity of a standalone output. IQS231B offers alternate hardware with identical firmware to the IQS231A. IQS231B hardware offers improved temperature response and low temperature range. 1.1 > Integrated SAR user interface offering a simple GPIO output > Extended controls in I2C mode (setup in I2C, runtime with standalone output) > Quick release detection – effectively prevent false triggers from remaining > > Quick release sensitivity options Optional input for synchronized implementations (input to instruct IC when to sense) > Wide range of control for sensing in high power RF environments > Pin compatible with devices of same package type (All ProxSense TSOT23-6 devices1,IQS211A WLCSP-8 device) > 1.8V (-2%) to 3.6V Input voltage > Capacitive resolution down to 0.02fF > Capacitive load capability up to 120pF > External threshold adjustment pin (minimize need for pre-empted OTP adjustments) > Minimal external components (direct input strap) > Standalone failsafe mode (backwards compatible failsafe output, short pulses on output to indicate operational device) > > 1 Main Features Default OTP options focus on safety and passing SAR lab qualification, OTP changes offer performance advantages I2C interface compatibility) option 6 pin TSOT23-6 RoHS2 Compliant 8 pin WLCSP-8 6 pin DFN6 Representations only, not actual markings > Synchronization output – failsafe pulses may be used by the master to synchronize on. Sensing is done after each pulse > Synchronization input – Sensing is only done while Sync input is low > Low power sensing: 30Hz (default), 100Hz, 8Hz, 4Hz (sub 6uA mode) > Constant sampling rates during all power modes with rapidly debounced output changes > Advanced temperature compensation option & interference (improved Input voltage level and pin functions may differ Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 1 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 1.2 Applications > SAR sensor > Hold detection for screen activation > Integrated hybrid designs (RF and capacitive sensing combined) > On-ear detection > Movement sensing applications (user interaction detection, anti-theft) TA DFN6 -20ºC to 85 ºC -40ºC to 85 ºC 1.3 IQS231B TSOT23-6 WLCSP-8 (1.5 x 0.9 x 0.4mm) IQS231A IQS231A (NRFND) IQS231B IQS231B Block Diagram VDDHI VDDHI VREG BOD POR circuit Internal regulator Digital - μP, RAM, ROM Nonvolatile memory VSS SDA / IO2 Analog ProxSense Engine (ADC) I2C HW or GPIO SCL / IO1 MCU (Master) Analog - Capacitive offset calibration Cx Reference GND (battery, metal frame, copper pad) Sensing Pad ∆E-field = ∆Capacitance Figure 1.1 Functional Block Diagram for IQS231A/B The IQS231A/B supports relative capacitance measurements for detecting capacitance changes. Basic features of the IQS231A/B include: > Charge-transfer capacitance measurement technology (Analog ProxSense® Engine) > Finite state machine to automate detection and environmental compensation without MCU interaction (integrated microprocessor) > Self-capacitance measurements > Signal conditioning to provide signal gain (Analog – Capacitive offset calibration) > Signal conditioning to provide offset compensation for parasitic capacitance (Analog – Capacitive offset calibration) > Integrated calibration capacitors (Analog – Capacitive offset calibration) > Integrated timer for timer triggered conversions > Integrated LDO regulator for increased immunity to power supply noise Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 2 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq > Integrated oscillator > Processing logic to perform measurement filtering, environmental compensation, threshold detection and movement detection Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 3 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq TABLE OF CONTENTS IQS231A/B DATASHEET .................................................................................................................................. 1 1 DEVICE OVERVIEW .................................................................................................................................. 1 1.1 1.2 1.3 2 MAIN FEATURES ........................................................................................................................... 1 APPLICATIONS .............................................................................................................................. 2 BLOCK DIAGRAM ........................................................................................................................... 2 PACKAGING AND PIN-OUT ..................................................................................................................... 8 2.1 2.2 3 TSOT23-6 & DFN6 ..................................................................................................................... 8 WLCSP ....................................................................................................................................... 9 REFERENCE SCHEMATICS: ................................................................................................................. 10 3.1 3.2 RECOMMENDED CAPACITOR VALUES ........................................................................................... 12 EXCEPTION TO RECOMMENDED CAPACITOR VALUES ..................................................................... 12 4 SUMMARY: ONE-TIME-PROGRAMMABLE (OTP) OPTIONS .............................................................. 13 5 SUMMARY: PROGRAMMING REFERENCE (I2C MEMORY MAP) ...................................................... 14 6 SUMMARY: FEATURES ......................................................................................................................... 15 7 FEATURES: EXTENDED DETAILS ........................................................................................................ 18 7.1 7.2 AUTOMATIC TUNING IMPLEMENTATION (ATI) ................................................................................ 18 SENSITIVITY ADJUSTMENT ........................................................................................................... 18 I2C PROGRAMMING GUIDE (SUMMARY) ............................................................................................. 19 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 9 ADD I2C CONNECTION................................................................................................................. 19 I2C COMMAND STRUCTURE ......................................................................................................... 19 CONTROL BYTE .......................................................................................................................... 20 TEST MODE (ADDRESS 0X45) ...................................................................................................... 20 I2C TYPICAL SETUP..................................................................................................................... 20 I2C READ (EVENT REGISTER) ...................................................................................................... 20 I2C POLLING AND SENSING TIMING .............................................................................................. 21 MOVEMENT TIME-OUT ACCURACY ............................................................................................... 21 SAMPLING FREQUENCY VS SENSING FREQUENCY ........................................................................ 21 CONFIGURATION OPTIONS .................................................................................................................. 23 9.1 9.2 9.3 9.4 OTP DETAILS: BANK 0 ................................................................................................................ 23 OTP DETAILS: BANK 1 ................................................................................................................ 24 OTP DETAILS: BANK 2 ................................................................................................................ 25 OTP DETAILS: BANK 3 ................................................................................................................ 28 10 FULL PROGRAMMING REFERENCE .................................................................................................... 30 11 SPECIFICATIONS ................................................................................................................................... 34 11.1 11.2 12 PACKAGE INFORMATION ..................................................................................................................... 39 12.1 12.2 12.3 13 ABSOLUTE MAXIMUM RATINGS .................................................................................................... 34 I2C TIMING SPECIFICATIONS ........................................................................................................ 38 TSOT23-6 ................................................................................................................................. 39 DFN-6 ....................................................................................................................................... 40 WLCSP-8 .................................................................................................................................. 41 ORDERING AND PART-NUMBER INFORMATION ............................................................................... 42 13.1 13.2 ORDERING INFORMATION ............................................................................................................ 42 DEVICE NUMBERING CONVENTION – TSOT23-6 .......................................................................... 42 Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 4 of 47 October 2021 IQ Switch® ProxSense® Series 13.3 13.4 Azoteq DEVICE NUMBERING CONVENTION: 8-PIN WLCSP ........................................................................ 43 DEVICE NUMBERING CONVENTION – DFN6.................................................................................. 44 14 TAPE AND REEL INFORMATION .......................................................................................................... 45 15 REVISION HISTORY ............................................................................................................................... 46 Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 5 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq List of Abbreviations AC Alternating Current ATI Automatic Tuning Implementation CH Channel ESD Electrostatic Discharge GPIO General Purpose Input/Output GUI Graphic User Interface GND Ground IIR Infinite Impulse Response IO Input/Output I2C Inter Integrated Circuit LTA Long Term Average LDO Low-Dropout Regulator MCU Microcontroller Unit NC Not Connected OTP One Time Programmable POR Power on Reset PGM Programming Pin Prox Proximity level trigger RF Radio Frequency SAR Self Absorption Rate SCL Serial Clock SDA Serial Data SNR Signal to Noise Ratio UI User Interface Vss Ground VREG Regulator Output VDDHI Supply Input Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 6 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq List of Symbols A Ampère ᵒC Degrees Celsius Hz Hertz Kbits/s kilobits per second kHz kilohertz kΩ kilo-ohm kV kilovolt μA micro- Ampère μF micro-Farad μs microseconds mA milli-Ampère mm milli-meter ms milliseconds mV millivolt min minute nA nano-Ampère ns nanoseconds Ω Ohm pF pico-Farad s seconds V Volt V/s Volts per second Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 7 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 2 Packaging and Pin-Out 2.1 TSOT23-6 & DFN6 VSS 2 IQS 231A/B VSS 2 5 VDDHI IQS231 IO1/SCL 1 6 Cx IO1 / SCL 1 IO2/SDA 3 6 Cx 5 VDDHI 4 VREG 4 VREG IO2 / SDA 3 Figure 2.1 IQS231A/B TSOT23-6 Pin-out Figure 2.2 IQS231B DFN6 Pin-out Table 2.1 TSOT23-6 and DFN-6-Pin-out Description IQS231A/B TSOT23-6/ IQS231B DFN-6 Pin Name Type Function 1 PRIMARY I/O Digital Input/ Output Multifunction IO1 / SCL (I2C Clock signal) 2 VSS Signal GND 3 SECONDARY I/O Digital Input/ Output Multifunction IO2 / SDA (I2C Data output) 4 VREG Regulator output Requires external capacitor 5 VDDHI Supply Input Supply:1.764V – 3.6V 6 Cx Sense electrode Connect to conductive area intended for sensor Table 2.2 Multifunction Pin Descriptions Multifunction name 2 pin 22-Dxx Multifunction pin option IC NAME Output type Batch code IO1 Proximity output / Proximity output with heartbeat Open-drain2 IO2 Sensitivity input / Synchronization input / Movement output / Touch output Open-drain2 Requires pull-up resistor Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 8 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 2.2 WLCSP 1 2 3 4 IQS231A/B 8 7 6 5 Figure 2.3 IQS231A/B 8-pin WLCSP (top view) Table 2.3 8-pin WLCSP Pin-out description IQS231A 8-pin WLCSP Pin Name Type Function 1 Cx Sense electrode Connect to conductive area intended for sensor 2 PRIMARY I/O Digital Input/ Output Multifunction IO1 / SCL (I2C Clock signal) 3 VREG Regulator output Requires external capacitor 4 VSS Signal GND 5 FLOATING IO Digital Input/Output Not used. Floating input during runtime. Recommended: Connect to GND 6 SECONDARY I/O Digital Input/Output Multifunction IO2 / SDA (I2C Data output) 7 VDDHI Supply Input Supply:1.764V – 3.6V Configuration pin Connection for OTP programming. Floating input during runtime. Recommended: Connect to GND. Connect separate pad/pin for in-circuit programming (separate modules only) 8 PGM Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 9 of 47 October 2021 IQ Switch® ProxSense® Series 3 Azoteq Reference Schematics: Figure 3.1 IQS231A/B TSOT23-6 and DFN-6 Reference Schematic Footnotes: * R5: Place a 47Ω resistor in the VDDHI supply line to prevent a potential ESD induced latch -up. Maximum supply current should be limited to 80mA on the IQS231A/B VDDHI pin to prevent latchup. ** C1 & C3: See Section 3.1 for recommended values. The target is to prevent the VREG voltage to drop more than 40mV from its regulated value during a sleep cycle (see Figure 9.1). ***C5: Example load of 2.2pF. This value may vary to adjust sensitivity. 1pF for higher sensitivity and up to 60pF for proximity detection use. A total load of 120pF is allowed by the sensing system. ****R1: Vary this value to control the RC slope of the capacitance measurement signal. Use for harmonic suppression and to enable a high impedance sensing path in a low impedance system. Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 10 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq Figure 3.2 IQS231B WLCSP-8 Reference Schematic Footnotes: * R5: Place a 47Ω resistor in the VDDHI supply line to prevent a potential ESD induced latch-up. Maximum supply current should be limited to 80mA on the IQS231A/B VDDHI pin to prevent latchup. ** C1 & C3: See Section 3.1 for recommended values. The target is to prevent the VREG voltage to drop more than 40mV from its regulated value during a sleep cycle (see Figure 9.1). ***C5: Example load of 2.2pF. This value may vary to adjust sensitivity. 1pF for higher sensitivity and up to 60pF for proximity detection use. A total load of 120pF is allowed by the sensing system. ****R1: Vary this value to control the RC slope of the capacitance measurement signal. Use for harmonic suppression and to enable a high impedance sensing path in a low impedance system. Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 11 of 47 October 2021 IQ Switch® ProxSense® Series 3.1 Azoteq Recommended Capacitor Values The VREG capacitor value (C1) is chosen to ensure VREG remains above the maximum BOD specification stated in Table 11.3. The combination of C1 (VREG) and C3 (VDDHI) is chosen to prevent a potential ESD issue. Known issue: In some cases, the IQS231A/B will not recover from ESD events. In cases where a high current source or regulator with low impedance path is present (a source that keeps VDDHI above the BOD level), the ESD event drains the VREG capacitor, but VDDHI voltage remains above BOD. When the ESD event is timed with the “sleep” power mode it causes a firmware run-time failure that only recovers when forcing a POR on VDDHI. Recommended values to prevent this is shown in Table 3.1. Table 3.1 VDDHI and VREG capacitor size recommendation to prevent ESD issues with typical hardware combinations Low power scan time Capacitor recommendation 3.2 8ms (default) 128ms 32ms C1 = 1µF C1 = 4.7µF C3 = 1µF C3 = 2.2µF 256ms C1 = 10µF C3 = 2.2µF Exception to recommended capacitor values In applications where the VDDHI source has high internal resistance or a high resistance path, it will be required to ensure C3 > C1 to prevent a VDDHI BOD after the IC sleep cycle (see Table 11.3) Table 3.2 Capacitor Values for VDDHI (C3) and VREG (C1) under certain supply voltage conditions Low power scan time Capacitor recommendation Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved 8ms (default) 128ms 32ms C1 = 1µF C1 = 4.7µF C3 = 1µF C3 = 10µF IQS231A/B Datasheet Revision 2.5 256ms C1 = 10µF C3 = 10µF Page 12 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 4 Summary: One-Time-Programmable (OTP) Options OTP bank 0 Bit7 IQS231A/B 000000xx TSR 6 5 4 3 Movement time-out Reserved Movement threshold Quick threshold 2 release 1 Quick release beta Prox no mov UI 00 – 2s 01 – 5s 10 – 10s 11 – Disabled (0s) n/a 0 – 4 counts 1 – 6 counts 00 – moderate counts 01 – strict 10 – relaxed 11 – very strict 100 00 – 2 (fast following) 01 – 3 10 – 4 11 – 5 (slow following) 150 50 250 Bit 0 Prox&Mov Uis 00 – 10s 01 – 30s 10 – 60s 11 – 10min *See time-out accuracy section OTP Bank 1 Bit7 6 IQS231A/B 0000xx00 TSR 5 4 3 I2C address Proximity Threshold (low/high) 00 – standalone 01 – 44H 10 – 46H 11 – 47H Sensitivity input low / Sync input active / Mov output / Touch output/ Ignore input, no output 00 – 4 counts (1Warning) 01 – 6 10 – 8 11 – 10 Sensitivity input high (internal 20kΩ pull-up) 00 – 8 counts 01 – 10 10 – 12 11 – 14 *See time-out accuracy section OTP Bank 2 2 1 Bit 0 AC Filter Touch threshold 00 – 1 01 – 2 10 – 3 11 – 0 00 – 32 counts 01 – 64 10 – 256 11 – 320 IQS231A/B 00xx0000 TSR Bit7 6 5 3 2 1 Increase debounce Target Base value Failsafe Quick release User interface 0 – 6in, 4out 1 – 12in, 8out 0 = 1200 / 1096 (movement) 1 = 768 00 – 100 counts 01 – 75 10 – 150 11 – 200 0 – Disabled 1 – Enabled 0 – Enabled 1 – Disabled 00 – Prox / No movement 01 – Prox with movement 10 – Prox with movement / Touch with no movement 11 – Same as ‘10’, touch output forced on IO2 OTP Bank 3 Bit7 6 4 Bit 0 IQS231A/B xx000000 TSR 5 4 2 1 Charge transfer frequency Temperature & interference compensation IO2 function 3 ATI events on IO1 Sample rate Bit 0 00 – 500kHz 01 – 125 kHz 10 – 64 kHz 11 – 16.5kHz 0 – Disabled 1 – Enabled 00 – Sensitivity input (proximity threshold adjust) 01 – Synchronize input 10 – Movement output 11 – Ignore input, no output 0 – Enabled 1 – Disabled Sample-to-sample time (Response time) Includes 6 sample debounce burst of 24ms 00 – 30 Hz (57ms) 01 – 100 Hz (34ms) 10 – 8 Hz (154ms) 11 – 4 Hz (280ms) *See time-out accuracy section 8.8 & 8.9 1 Careful design is key when using a threshold of 4 combined with a base value of 100 / 75 and a target of 1200. Contact Azoteq. Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 13 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 5 Summary: Programming Reference (I2C Memory Map) I2C Communications Layout Address/ Register name/s Command/ Byte R/W Default Value Bit 7 Bit 6 Bit 5 Bit 4 DEFAULT MAIN_EVENTS R n/a DEBUG SENSING WARM COMMS DISABLED BOOT POINTER Each read instruction returns ‘MAIN_EVENTS’ byte as first byte, followed by the data at the specified address 00H PRODUCT_NUMBER R 0x40 0x40 01H SOFTWARE_VERSION R 0x06 0x06 (IQS231A), 0x07 (IQS231B – Identical to 0x06 software) 02H DEBUG_EVENTS R n/a RESERVED ATI_ERROR CH0_ATI RESERVED 03H 04H Reserved COMMANDS R/W R/W n/a 0x00 05H OTP Bank 1 R/W 0x00 06H OTP Bank 2 R/W 0x00 07H OTP Bank 3 R/W 0x00 08H QUICK RELEASE R/W 0x00 09H MOVEMENT R/W 0x34 (2s, 8) RESERVED ATI_CH0 DISABLE SENSING Standalone / I2C address Increase Target debounce Charge transfer frequency ENABLE TOGGLE SENSING AC FILTER Proximity threshold Read only Base value Temperature & interference compensation Bit 3 0x8 = 75 0x9 = 200 0xA = 300 0xB = 400 0xC = 10min 0xD = 30min 0xE = 60min 0xF = 90min 0x8 = 30s 0x9 = 1min 0xA = 2min 0xB = 5min 0x4 = 0x5 = 0x6 = 0x7 = Bit 1 Bit 0 COLD BOOT RELEASE TOUCH PROX QUICK RELEASE EXIT MOV DETECT ENTER MOV DETECT MOVEMENT RESERVED TOGGLE MODE RESERVED WARM BOOT ULP AC Filter Failsafe pulses IO1 IO2 Function Quick release ATI events on IO1 Quick release threshold LUT 0xC = 500 0xD = 750 0xE = 850 0xF = 1000 Bit 2 Touch threshold Read only User interface selection Sample rate Quick release beta 10 20 25 30 0x0 = 100 0x1 = 150 0x2 = 50 0x3 = 250 0x4 = 4s 0x5 = 5s 0x6 = 10s 0x7 = 20s 0x0 = 0s 0x1 = 0.5s 0x2 = 1s 0x3 = 2s Filter halt time Movement threshold = (Value × 2) Available range: 0 – 30 0 = always movement trigger 0AH TOUCH THRESHOLD R/W PROXIMITY THRESHOLD R/W 0x07 (32) 0x00 Touch threshold = (Value × 4) + 4 0BH 0CH R/W 0x03 Temperature tracking threshold when not in touch / prox detect 0DH Temperature & interference threshold CH0 Multipliers R/W n/a Reserved Reserved CH0 Sensitivity Multiplier 0–3 CH0 Compensation multiplier 0 – 15 0EH 0FH CH0 Compensation CH1 Multipliers R/W R/W n/a n/a 0 – 255 Reserved Reserved CH1 Sensitivity Multiplier 0–3 CH1 Compensation multiplier 0 – 15 10H 11H 12H CH1 Compensation System flags UI flags R/W R R n/a n/a n/a 0 – 255 I2C TEMP CH1_ACTIVE CURRENT_CH NO SYNC CH0_LTA_HALTED ATI_MODE ZOOM MODE TEMPERATURE RESEED Reserved UI AUTO ATI OFF UI SENSING DISABLED QUICK_RELEASE Reserved OUTPUT ACTIVE 13H 14H ATI flags Event flags R R n/a n/a TEMP CHANNEL ATI Reserved CH1 MOVEMENT CH0_ATI ERROR CH0 UNDEBOUNCED CH0_ TOUCH CH0_PROX 15H 16H 17H CH0 ACF_H CH0 ACF_L CH0 LTA_H R R R n/a n/a n/a 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H CH0 LTA_L CH0 QRD_H CH0 QRD_L CH1 ACF_H CH1 ACF_L CH1 UMOV_H CH1 UMOV_L CH1 LMOV_H CH1 LMOV_L CH1_RAW_H CH1_RAW_L TEMPERATURE_H TEMPERATURE_L LTA_HALT_TIMER_H LTA_HALT_TIMER_L FILTER_HALT_TIMER R R R R R R R R R R R R R R R R n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a 28H TIMER_READ_INPUT R n/a 29H TIMER_REDO_ATI R n/a Available range: 4 – 1024 Reserved Reserved CH1_ATI ERROR Reserved 00 – 4 counts 01 – 6 10 – 8 11 – 10 Proximity channel: Filtered count value 0 – 2000 Proximity channel: Reference count value (Long term average) 0 – 2000 Proximity channel: Quick release detect reference value 0 – 2000 Movement channel: Filtered count value 0 – 2000 Movement channel: Upper reference count value 0 – 2000 Movement channel: Lower reference count value 0 – 2000 Temperature channel: Unfiltered count value (if temperature feature enabled) 0 – 2000 Movement channel temperature reference (a previous value of temperature channel) 0 – 2000 Countdown timer to give active feedback on the time-out. Movement events will reset this timer (0 – 255) × 100ms | Timer range: 0 – 90min Countdown timer to give active feedback on the fixed 5sec time-out when in filter halt mode (before entering Proximity detect) 0 – 50 x 100ms | Timer range: 0 – 5 seconds Countdown timer to signal when a read operation is done on IO2 (0 – 10) x 100ms | Timer range: 0 – 1 seconds Countdown timer to give active feedback on the time until re-calibration is attempted after ATI-error (0 – 255) × 100ms | Timer range: 0 – 25s Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 14 of 47 October 2021 IQ Switch® ProxSense® Series 6 Azoteq Summary: Features Pin compatibility DYCAL / Quick release Control in RF environments Advanced temperature & interference compensation User interface selection Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved Designs using the IQS229 or IQS128 will benefit from a “drop-in” replacement on a production device for evaluation. Using the added I2C capability on the IQS231A/B will require an added connection to the master device. A DYCAL-type implementation (referring to dynamic threshold calibration) is recommended as main stability feature for the latest SAR user interface. Passing the device SAR qualification with this type of interface has been proven successful. “Quick release” detection is the improved “DYCAL”-type implementation and focusses on a release characteristic within a time window. Movement features add a second level of protection against stuck conditions with the quick release detection. The quick release will be detected on the proximity channel (not the secondary movement channel) and the signal slope will be monitored to enable the quick release. A single action from a touch/proximity state will trigger the quick release event and the event will only remain as long the proximity state holds. Several features are offered to ensure operation in various designs where high power RF signals may influence the sensing signal: • Increased low frequency sensing options to allow for high impedance filter circuits • Increased debounce option to prevent RF noise triggers • Advanced temperature compensation for fast temperature variations caused by high power RF circuits • Interference compensation for false triggers caused by conducted/radiated noise. An improved compensation feature is offered to prevent false triggers due to quickly varying temperature & high interference environments. This feature effectively tracks temperature changes & compensates for interference only when no proximity trigger is present. The device offers 3 main UI’s intended for SAR use. These are: • Proximity UI, no continuous movement sensing • Proximity UI, continuous movement sensing • Proximity & touch UI, continuous movement sensing during proximity, no movement sensing during touch (No time-out during long duration stationary SAR tests) In all cases the use of the quick release feature is recommended to prevent typical non-human activations from remaining. In all cases “no movement” and “movement sensing” refers to the capacitive movement sensing during normal activation. “Handheld detection” and “quick release” features will enable movement sensing with a no-movement time-out, irrespective of which UI is selected. IQS231A/B Datasheet Revision 2.5 Page 15 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq Summary: Features (Continued 1) Movement detection is designed to function as human presence detection in a localized area. This device can’t be used to fulfil an accelerometer function (“G-sensor” function). Human presence detection requires an exception in SAR testing because the qualification testing only uses stationary “phantom bodies”. Optimized human detection is offered through an integrated Movement detection separate channel, dedicated towards human detection. Default input use: internal pull-up (20kΩ) by default, tie directly to GND for more sensitive option. Apart from the simple external adjustment, an external capacitor is Sensitivity adjustment recommended for sensitivity adjustments. 1pF is considered a small change in sensitivity, while 10pF changes are considered large. A maximum of 60pF load is recommended for effective proximity sensing. A single pulse of 500µs is integrated on IO1. This pulse is the failsafe heartbeat, sent on each sensing event. This pulse will be sent during the “stabilize time” as shown in Figure 9.1. Cx The failsafe indicator signal will precede the conversions (sampling). The failsafe signal will be repeated during burst mode in order to offer synchronization output to the master, indicating exactly when IO1 sensitive measurements are done. Measurement times have a fixed maximum which the user can implement. Failsafe heartbeat The failsafe signal is disabled by default and may be enabled via OTP option or I2C initialize with standalone setup. High configurability Through I2C the IQS231A/B can be used in many ways and the configuration can be updated during later stages of development than with the OTP route. Configure the device via a dedicated I 2C type connection and switch to any standalone mode for runtime operation. This minimizes the processor load and spurious content from communication signals. Switch I2C to standalone Unexpected reset conditions should be managed via the failsafe pulse OTP option or by polling the device periodically. When the heartbeat disappears or I2C responds to the polling, default state applies, and the master should reconfigure the device through I 2C. Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 16 of 47 October 2021 IQ Switch® ProxSense® Series Azoteq Summary: Features (Continued 2) Synchronize input In order to ensure a stable sensing environment, sensing may be done in strategic time windows controlled by a master device. The ATI ensures optimal sensitivity during runtime for various sensor environments. Two channels are calibrated (proximity channel and movement Automatic tuning (ATI) channel). Both run on the same Cx pin in different time slots. An ATI-block time is defined to prevent re-ATI loops during touch release events. The ATI-block is fixed for the movement channel, and fixed for the standard touch/proximity channel LTA: signal reference behavior is optimized for SAR where trigger Reference signal tests are important in product qualification. The LTA will therefore be behavior slow while still able to prevent typical temperature drift from causing activations. Standard I2C polling for: • Debugging & normal use • Device polling optimized for guaranteed response (within Improved I2C interface tCLK_stretch – clock stretching will be applied to the bus SCL line) Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 17 of 47 October 2021 IQ Switch® ProxSense® Series 7 7.1 Azoteq Features: Extended Details Automatic Tuning Implementation (ATI) External sensor connections are calibrated in the following ways: > Power On Reset (proximity channel is calibrated at each POR) > Movement channel is only calibrated with POR when hand-held detection is enabled > Proximity & movement channel is calibrated when the reference is out of bounds (1/8 of target counts). The reference of the proximity channel is rapidly adapted when capacitance moves away from the trigger threshold OR when an automatic “reseed” is done (Reseed: reference = actual sensor value). The reference of the movement channel is rapidly adapted in any direction of capacitive changes. > Redo-ATI of the proximity channel can be initiated by the user in I 2C mode using an I2C command. During each proximity channel ATI event, the proximity output is activated to indicate the event and ensure a safe output during the event and in the case of an ATI-error. 7.2 Sensitivity Adjustment Apart from the simple external adjustment, an external capacitor is recommended for sensitivity adjustments. 1pF is considered a small change in sensitivity, while 10pF changes are considered large. A maximum of 60pF load is recommended for effective proximity sensing. Copyright © Azoteq (Pty) Ltd 2020 All Rights Reserved IQS231A/B Datasheet Revision 2.5 Page 18 of 47 October 2021 Azoteq IQ Switch® ProxSense® Series 8 I2C Programming Guide (Summary) The IQS231A/B device interfaces to a master controller via a 2-wire (SDA and SCL) serial interface bus that is I2CTM compatible, with a maximum communication speed of 400kbit/s. The protocol acknowledges an address request independently. The I 2C hardware module is awake for address recognition while the IQS231A/B is in sleep mode, giving the ability to wake the device at any time and effectively communicate via serial interface. This is different compared to other ultralow power Azoteq solutions where the communications module also sleeps during standard IC sleep times. Repeated polling requests where required in such case. 8.1 Add I2C Connection When using I2C mode, ensure the connections as shown in Figure 2.2. Internal pull-up resistors are sufficient for communication speeds up to 100kbits/s with low capacitance on the lines (
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