AS5040
10Bit 360º Programmable Magnetic
Rotary Encoder
General Description
The AS5040 is a contactless magnetic rotary encoder for
accurate angular measurement over a full turn of 360°. It is a
system-on-chip, combining integrated Hall elements, analog
front end and digital signal processing in a single device.
To measure the angle, only a simple two-pole magnet, rotating
over the center of the chip, is required. The magnet may be
placed above or below the IC.
The absolute angle measurement provides instant indication of
the magnet’s angular position with a resolution of 0.35° = 1024
positions per revolution. This digital data is available as a serial
bit stream and as a PWM signal.
Furthermore, a user-programmable incremental output is
available, making the chip suitable for replacement of various
optical encoders.
An internal voltage regulator allows the AS5040 to operate at
either 3.3 V or 5 V supplies.
Ordering Information and Content Guide appear at end of
datasheet.
Figure 1:
Typical Arrangement of AS5040 and Magnet
ams Datasheet
[v2-11] 2015-Nov-20
Page 1
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AS5040 − General Description
Key Benefits & Features
The benefits and features of AS5040, 10Bit 360º Programmable
Magnetic Rotary Encoder are listed below:
Figure 2:
Added Value of Using AS5040
Benefits
Features
• Highest reliability and durability
• Contactless high resolution rotational position encoding
over a full turn of 360 degrees
• Simple programming
• Simple user-programmable resolution, pole pairs and zero
position
• Multiple interfaces
•
•
•
•
•
• Ideal for motor applications
• Rational speeds up to 30,000 rpm
• Failure diagnostics
• Failure detection mode for magnet placement monitoring
and loss of power supply
• Easy setup
• Serial read-out of multiple interconnected devices using
daisy chain mode
• Great flexibility at a huge application
area
• Push button functionality detects movement of magnet in
Z-axis
• Fully automotive qualified
• AEC-Q100, grade 1
• Small form factor
• SSOP 16 (5.3mm x 6.2mm)
• Robust environmental tolerance
• Wide temperature range: -40°C to 125°C
Serial communication interface (SSI)
10-bit pulse width modulated (PWM) output
Quadrature A/B and Index output signal
Step/Direction and Index output signal
3-Phase commutation for brushless DC motors
Applications
AS5040 is ideal for:
• Industrial applications:
• Contactless rotary position sensing
• Robotics
• Brushless DC motor commutation
• Power tools
• Automotive applications:
• Steering wheel position sensing
• Gas pedal position sensing
• Transmission gearbox encoder
• Headlight position control
• Power seat position indicator
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − General Description
• Office equipment: printers, scanners, copiers
• Replacement of optical encoders
• Front panel rotary switches
• Replacement of potentiometers
Block Diagram
The functional blocks of this device are shown below:
Figure 3:
AS5040 Block Diagram
VDDV3V
MagINCn
VDD5V
MagDECn
LDO 3.3V
PWM
Interface
PWM_LSB
Ang
DSP
Hall Array
&
Frontend
Amplifier
Cos
Mag
Absolute
Interface
(SSI)
DO
CSn
CLK
OTP
Register
A_LSB_U
Programming
Parameters
Incremental
Interface
B_Dir_V
Index_W
Prog
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Pin Assignment
Pin Assignment
Figure 4:
Pin Configuration SSOP16
1
16
VDD5V
MagDECn
2
15
VDD3V3
A_LSB_U
3
14
NC
B_Dir_V
4
13
NC
NC
5
12
PWM_LSB
Index_W
6
11
CSn
VSS
7
10
CLK
Prog
8
9
DO
AS5040
MagINCn
Pin Description
Figure 6 shows the description of each pin of the standard
SSOP16 package (Shrink Small Outline Package, 16 leads, body
size: 5.3mm x 6.2mmm; see Figure 4).
Pins 7, 15 and 16 are supply pins, pins 5, 13 and 14 are for
internal use and must not be connected.
Pins 1 and 2 are the magnetic field change indicators,
MagINCn and MagDECn (magnetic field strength increase or
decrease through variation of the distance between the magnet
and the device). These outputs can be used to detect the valid
magnetic field range. Furthermore those indicators can also be
used for contact-less push-button functionality.
Pins 3, 4 and 6 are the incremental pulse output pins. The
functionality of these pins can be configured through
programming the one-time programmable (OTP) register.
Figure 5:
Pin Assignment for the Different Incremental Output Modes
Output Mode
Pin 3
Pin 4
Pin 6
Pin 12
1.x: quadrature
A
B
Index
PWM
2.x:step/direction
LSB
Direction
Index
PWM
3.x: commutation
U
V
W
LSB
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[v2-11] 2015-Nov-20
AS5040 − Pin Assignment
Mode 1.x: Quadrature A/B Output
Represents the default quadrature A/B signal mode.
Mode 2.x: Step / Direction Output
Configures pin 3 to deliver up to 512 pulses (up to 1024 state
changes) per revolution. It is equivalent to the LSB (least
significant bit) of the absolute position value. Pin 4 provides the
information of the rotational direction.
Both modes (mode 1.x and mode 2.x) provide an index signal
(1 pulse/revolution) with an adjustable width of one LSB or
three LSB’s.
Mode 3.x: Brushless DC Motor Commutation Mode
In addition to the absolute encoder output over the SSI
interface, this mode provides commutation signals for
brushless DC motors with either one pole pair or two pole pair
rotors. The commutation signals are usually provided by 3
discrete Hall switches, which are no longer required, as the
AS5040 can fulfill two tasks in parallel: absolute encoder + BLDC
motor commutation.
In this mode, pin 12 provides the LSB output instead of the PWM
(Pulse-Width-Modulation) signal.
Pin 8 (Prog) is also used to program the different incremental
interface modes, the incremental resolution and the zero
position into the OTP.
This pin is also used as digital input to shift serial data through
the device in Daisy Chain configuration.
Pin 11 Chip Select (CSn; active low) selects a device within a
network of AS5040 encoders and initiates serial data transfer.
A logic high at CSn puts the data output pin (DO) to tri-state
and terminates serial data transfer. This pin is also used for
Alignment Mode and Programming the AS5040.
Pin 12 allows a single wire output of the 10-bit absolute position
value. The value is encoded into a pulse width modulated signal
with 1μs pulse width per step (1μs to 1024μs over a full turn).
By using an external low pass filter, the digital PWM signal is
converted into an analog voltage, allowing a direct
replacement of potentiometers.
Figure 6:
Pin Description SSOP16
Pin
Symbol
Type
1
MagINCn
DO_OD
Magnet Field Magnitude INCrease; active low, indicates a
distance reduction between the magnet and the device surface.
2
MagDECn
DO_OD
Magnet Field Magnitude DECrease; active low, indicates a
distance increase between the device and the magnet.
ams Datasheet
[v2-11] 2015-Nov-20
Description
Page 5
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AS5040 − Pin Assignment
Pin
Symbol
Type
Description
3
A_LSB_U
DO
Mode1.x: Quadrature A channel
Mode2.x: Least Significant Bit
Mode3.x: U signal (phase1)
4
B_Dir_V
DO
Mode1.x: Quadrature B channel quarter period shift to channel A.
Mode2.x: Direction of Rotation
Mode3.x: V signal (phase2)
5
NC
-
6
Index_W
DO
7
VSS
S
8
Prog
DI_PD
OTP Programming Input and Data Input for Daisy Chain mode.
Internal pull-down resistor (~74kΩ).
May be connected to VSS if programming is not used
9
DO
DO_T
Data Output of Synchronous Serial Interface
10
CLK
DI, ST
Clock Input of Synchronous Serial Interface; Schmitt-Trigger input
11
CSn
DI_PU, ST
12
PWM_LSB
DO
13
NC
-
Must be left unconnected
14
NC
-
Must be left unconnected
15
VDD3V3
S
3V-Regulator Output (see Figure 39)
16
VDD5V
S
Positive Supply Voltage 5 V
Must be left unconnected
Mode1.x and Mode2.x: Index signal indicates the absolute zero
position
Mode3.x: W signal (phase3)
Negative Supply Voltage (GND)
Chip Select, active low; Schmitt-Trigger input, internal pull-up
resistor (~50kΩ) connect to VSS in incremental mode (see 0)
Pulse Width Modulation of approx. 1kHz; LSB in Mode3.x
Abbreviations for Pin Types in Figure 6:
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DO_OD
: Digital output open drain
DO
: Digital output
DI_PD
: Digital input pull-down
DI_PU
: Digital input pull-up
S
: Supply pin
DI
: Digital input
DO_T
: Digital output /tri-state
ST
: Schmitt-Trigger input
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Absolute Maximum Ratings
Absolute Maximum Ratings
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. These are stress
ratings only. Functional operation of the device at these or any
other conditions beyond those indicated in Operating
Conditions is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Figure 7:
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Units
VDD5V
DC supply voltage at pin
VDD5V
-0.3
7
V
VDD3V3
DC supply voltage at pin
VDD3V3
-0.3
5
V
-0.3
VDD5V +0.3
Vin
Input pin voltage
Iscr
Input current
(latchup immunity)
ESD
Electrostatic discharge
Tstrg
Storage temperature
TBody
Body temperature
(Lead free package)
RHNC
Relative humidity (non
condensing)
MSL
Moisture sensitivity level
ams Datasheet
[v2-11] 2015-Nov-20
V
-0.3
7.5
-100
100
5
3
Pins MagINCn, MagDECn, CLK,
CSn
Pin Prog
mA
Norm: JEDEC 78
kV
Norm: MIL 883 E method 3015
125
ºC
Min – 67°F, Max 257°F
260
ºC
t=20 to 40s, Norm: IPC/JEDEC
J-Std-020C
Lead finish 100% Sn “matte tin”
85
%
±2
-55
Note
Maximum floor life time of 168h
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AS5040 − Electrical Characteristics
Electrical Characteristics
Operating Conditions
Figure 8:
Operating Conditions
Symbol
Parameter
Min
Tamb
Ambient temperature
-40
Isupp
Supply current
Typ
Max
Unit
125
°C
16
21
mA
Note
-40°F to 257°F
VDD5V
VDD3V3
External supply voltage at pin
VDD5V
Internal regulator output
voltage at pin VDD3V3
4.5
3.0
5.0
3.3
5.5
3.6
V
V
5V operation
VDD5V
VDD3V3
External supply voltage at pin
VDD5V, VDD3V3
3.0
3.0
3.3
3.3
3.6
3.6
V
V
3.3V operation (pins VDD5V
and VDD3V3 connected)
DC Characteristics for Digital Inputs and
Outputs
CMOS Schmitt-Trigger Inputs: CLK, CSn
(CSn = Internal Pull-Up)
Operating conditions: Tamb = -40°C to 125°C,
VDD5V = 3.0V to 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V
operation) unless otherwise noted.
Figure 9:
CMOS Schmitt-Trigger Inputs: CLK, CSn (CSn = Internal Pull-Up)
Symbol
Parameter
VIH
High level input voltage
VIL
Low level input voltage
VIon-VIoff
ILEAK
IiL
Schmitt trigger hysteresis
Input leakage current
Pull-up low level input current
Page 8
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Min
Max
0.7 * VDD5V
V
0.3 * VDD5V
1
-1
Unit
Note
Normal operation
V
V
1
CLK only
μA
-30
-100
CSn only, VDD5V: 5.0V
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Electrical Characteristics
CMOS / Program Input: Prog
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 10:
CMOS / Program Input: Prog
Symbol
Parameter
VIH
High level input voltage
VPROG
High level input voltage
VIL
Low level input voltage
IiL
Pull-down high level input
current
Min
Max
Unit
0.7 * VDD5V
5
V
See Programming
Conditions
V
0.3 * VDD5V
V
100
μA
Note
During
programming
VDD5V: 5.5V
CMOS Output Open Drain: MagINCn, MagDECn
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 11:
CMOS Output Open Drain: MagINCn, MagDECn
Symbol
VOL
Parameter
Low level output voltage
Min
Max
Unit
VSS+0.4
V
IO
Output current
4
2
mA
IOZ
Open drain leakage current
1
μA
ams Datasheet
[v2-11] 2015-Nov-20
Note
VDD5V: 4.5V
VDD5V: 3V
Page 9
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AS5040 − Electrical Characteristics
CMOS Output: A, B, Index, PWM
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 12:
CMOS Output: A, B, Index, PWM
Symbol
Parameter
VOH
High level output voltage
VOL
Low level output voltage
IO
Min
Max
VDD5V-0.5
Output current
Unit
Note
V
VSS+0.4
V
4
2
mA
VDD5V: 4.5V
VDD5V: 3V
Tristate CMOS Output: DO
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 13:
Tristate CMOS Output: DO
Symbol
Parameter
VOH
High level output voltage
VOL
Low level output voltage
Min
Max
VDD5V-0.5
Unit
V
VSS+0.4
V
IO
Output current
4
2
mA
IOZ
Tri-state leakage current
1
μA
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Note
VDD5V: 4.5V
VDD5V: 3V
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Electrical Characteristics
Magnetic Input Specification
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Two-pole cylindrical diametrically magnetized source:
Figure 14:
Magnetic Input Specification
Symbol
Parameter
Min
Typ
6
dmag
Diameter
4
tmag
Thickness
2.5
Bpk
Magnetic input
field amplitude
Boff
Magnetic offset
Unit
mm
mm
45
Field non-linearity
fmag_abs
fmag_inc
Max
Input frequency
(rotational speed
of magnet)
75
mT
± 10
mT
Constant magnetic stray field
5
%
Including offset gradient
10
Hz
Absolute mode: 600 rpm @ readout of
1024 positions (see Figure 36)
500
Hz
Incremental mode: no missing pulses
at rotational speeds of up to 30,000
rpm (see Figure 36)
Displacement
radius
mm
Recommended
magnet material
and temperature
drift
ams Datasheet
[v2-11] 2015-Nov-20
±0.23 5
Max. X-Y offset between defined IC
package center and magnet axis (see
Figure 41)
Max. X-Y offset between chip center
and magnet axis.
0.485
Chip placement
tolerance
Recommended magnet: Ø 6mm x
2.5mm for cylindrical magnets
Required vertical component of the
magnetic field strength on the die’s
surface, measured along a concentric
circle with a radius of 1.1mm
0.25
Disp
Note
mm
-0.12
Placement tolerance of chip within IC
package (see Figure 43)
NdFeB (Neodymium Iron Boron)
%/K
-0.035
SmCo (Samarium Cobalt)
Page 11
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AS5040 − Electrical Characteristics
Electrical System Specifications
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 15:
Electrical System Specifications
Symbol
Parameter
RES
Resolution
LSB
7 bit
8 bit
9 bit
10 bit
INLopt
INLtemp
Typ
DNL
Differential non-linearity
Unit
10
bit
0.352 deg
deg
Adjustable resolution only
available for incremental output
modes;
Least significant bit, minimum
step
deg
Maximum error with respect to
the best line fit.
Verified at optimum magnet
placement, Tamb =25 °C.
deg
Maximum error with respect to
the best line fit.
Verified at optimum magnet
placement,
Tamb = -40°C to 125°C
± 1.4
deg
Best line fit = (Errmax – Errmin) / 2
Over displacement tolerance
with 6mm diameter magnet,
Tamb = -40°C to 125°C
± 0.176
deg
10bit, no missing codes
0.12
Deg
RMS
RMS equivalent to 1 sigma
deg
Incremental modes only
± 0.5
Integral non-linearity
(optimum)
Integral non-linearity
Max
2.813
1.406
0.703
0.352
Integral non-linearity
(optimum)
INL
TN
Min
± 0.9
Transition noise
0.704
Note
Hyst
Hysteresis
Von
Power-on-reset threshold
ON voltage; 300mV typ.
hysteresis
1.37
2.2
2.9
V
DC supply voltage 3.3V
(VDD3V3)
Voff
Power-on-reset threshold
OFF voltage; 300mV typ.
hysteresis
1.08
1.9
2.6
V
DC supply voltage 3.3V
(VDD3V3)
tPwrUp
Power-up time
50
ms
Until offset compensation
finished
tdelay
System propagation delay
absolute output
48
μs
Includes delay of ADC and DSP
System propagation delay
incremental output
192
μs
Calculation over two samples
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[v2-11] 2015-Nov-20
AS5040 − Electrical Characteristics
Symbol
fS
Parameter
Min
Typ
Max
9.90
10.42
10.94
Sampling rate for absolute
output
Note
Internal sampling rate,
Tamb = 25°C
kHz
9.38
CLK
Unit
10.42
Internal sampling rate,
Tamb = -40°C to 125°C
11.46
Read-out frequency
1
MHz
Max. clock frequency to read
out serial data
Figure 16:
Integral and Differential Non-Linearity Example (Exaggerated Curve)
1023
D 10bit code
1023
Actual curve
2
TN
1
0
512
Ideal curve
DNL+1LSB
INL
0.35°
512
0
0q
q
360 q
D [degrees]
Integral Non-Linearity (INL) is the maximum deviation between
actual position and indicated position.
Differential Non-Linearity (DNL) is the maximum deviation of
the step length from one position to the next.
Transition Noise (TN) is the repeatability of an indicated
position.
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Electrical Characteristics
Timing Characteristics
Synchronous Serial Interface (SSI)
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 17:
Synchronous Serial Interface (SSI)
Symbol
t DO active
Parameter
Min
Data output activated
(logic high)
Typ
Max
Unit
Note
100
ns
Time between falling edge of CSn
and data output activated
tCLK FE
First data shifted to
output register
500
ns
Time between falling edge of CSn
and first falling edge of CLK
T CLK / 2
Start of data output
500
ns
Rising edge of CLK shifts out one bit
at a time
t DO valid
Data output valid
357
413
ns
Time between rising edge of CLK
and data output valid
100
ns
After the last bit DO changes back to
“tristate”
ns
CSn = high; To initiate read-out of
next angular position
MHz
Clock frequency to read out serial
data
t DO tristate
Data output tristate
t CSn
Pulse width of CSn
500
fCLK
Read-out frequency
>0
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Electrical Characteristics
Pulse Width Modulation Output
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 18:
Pulse Width Modulation Output
Symbol
f PWM
Parameter
Min
Typ
Max
0.927
0.976
1.024
PWM frequency
Unit
Note
Signal period = 1025μs ±5% at
Tamb = 25°C
KHz
0.878
0.976
1.074
=1025μs ±10% at
Tamb = -40°C to 125°C
PW MIN
Minimum pulse width
0.90
1
1.10
μs
Position 0d; angle 0 degree
PW MAX
Maximum pulse width
922
1024
1126
μs
Position 1023d; angle 359.65
degree
Incremental Outputs
Operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted.
Figure 19:
Incremental Outputs
Symbol
t Incremental
outputs valid
t Dir valid
Parameter
Max
Unit
Incremental outputs
valid after power-up
500
ns
Time between first falling edge of
CSn after power-up and valid
incremental outputs
Directional indication
valid
500
ns
Time between rising or falling edge
of LSB output and valid directional
indication
ams Datasheet
[v2-11] 2015-Nov-20
Min
Typ
Note
Page 15
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AS5040 − Electrical Characteristics
Programming Conditions
(operating conditions: Tamb = -40°C to 125°C, VDD5V = 3.0V to
3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless
otherwise noted).
Figure 20:
Programming Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Note
Time between rising edge at
Prog pin and rising edge of CSn
Programming enable
time
2
μs
t Data in
Write data start
2
μs
t Data in valid
Write data valid
250
ns
t Load PROG
Load programming
data
3
μs
t PrgR
Rise time of VPROG
before CLKPROG
0
μs
t PrgH
Hold time of VPROG
after CLKPROG
0
t Prog enable
CLK PROG
t PROG
t PROG finished
Write data –
programming CLKPROG
CLK pulse width
Hold time of Vprog
after programming
1.8
2
Write data at the rising edge of
CLKPROG
5
μs
250
kHz
2.2
μs
During programming; 16 clock
cycles
μs
Programmed data is available
after next power-on
7.5
V
Must be switched OFF after
zapping
1
V
Line must be discharged to this
level
2
V PROG
Programming voltage
7.3
V ProgOff
Programming voltage
OFF level
0
I PROG
Programming current
130
mA
During programming
Analog read CLK
100
kHz
Analog readback mode
Programmed zener
voltage (log.1)
100
mV
VRef-VPROG during analog
readback mode (see Analog
Readback Mode)
CLKAread
Vprogrammed
Vunprogrammed
Unprogrammed zener
voltage (log. 0)
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7.4
V
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Functional Description
Functional Description
The AS5040 is manufactured in a CMOS standard process and
uses a spinning current Hall technology for sensing the
magnetic field distribution across the surface of the chip.
The integrated Hall elements are placed around the center of
the device and deliver a voltage representation of the magnetic
field at the surface of the IC.
Through Sigma-Delta Analog / Digital Conversion and Digital
Signal-Processing (DSP) algorithms, the AS5040 provides
accurate high-resolution absolute angular position
information. For this purpose a Coordinate Rotation Digital
Computer (CORDIC) calculates the angle and the magnitude of
the Hall array signals.
The DSP is also used to provide digital information at the
outputs MagINCn and MagDECn that indicate movements of
the used magnet towards or away from the device’s surface.
A small low cost diametrically magnetized (two-pole) standard
magnet provides the angular position information (see
Figure 40).
The AS5040 senses the orientation of the magnetic field and
calculates a 10-bit binary code. This code can be accessed via a
Synchronous Serial Interface (SSI). In addition, an absolute
angular representation is given by a Pulse Width Modulated
signal at pin 12 (PWM).
Besides the absolute angular position information the device
simultaneously provides incremental output signals. The
various incremental output modes can be selected by
programming the OTP mode register bits (see Figure 36). As
long as no programming voltage is applied to pin Prog, the new
setting may be overwritten at any time and will be reset to
default when power is turned OFF. To make the setting
permanent, the OTP register must be programmed (see
Figure 34). The default setting is a quadrature A/B mode
including the Index signal with a pulse width of 1 LSB. The Index
signal is logic high at the user programmable zero position.
The AS5040 is tolerant to magnet misalignment and magnetic
stray fields due to differential measurement technique and Hall
sensor conditioning circuitry.
ams Datasheet
[v2-11] 2015-Nov-20
Page 17
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AS5040 − 10-Bit Absolute Angular Position Output
10-Bit Absolute Angular
Position Output
Synchronous Serial Interface (SSI)
Figure 21:
Synchronous Serial Interface with Absolute Angular Position Data
CSn
t CLK FE
T CLK / 2
t CSn
1
CLK
DO
D9
t DO active
t DO valid
8
D8
D7
D6
D5
D4
D3
D2
1
16
D1
D0
Angular Position Data
OCF
COF
LIN
Mag
INC
Status Bits
t CLK FE
M ag Even
D EC PAR
D9
t DO Tristate
If CSn changes to logic low, Data Out (DO) will change from high
impedance (tri-state) to logic high and the read-out will be
initiated.
• After a minimum time tCLK FE, data is latched into the
output shift register with the first falling edge of CLK.
• Each subsequent rising CLK edge shifts out one bit of data.
• The serial word contains 16 bits, the first 10 bits are the
angular information D[9:0], the subsequent 6 bits contain
system information, about the validity of data such as
OCF, COF, LIN, Parity and Magnetic Field status
(increase/decrease).
• A subsequent measurement is initiated by a log. “high”
pulse at CSn with a minimum duration of tCSn.
Data Content
D9:D0 absolute angular position data (MSB is clocked out
first)
OCF (Offset Compensation Finished), logic high indicates
the finished Offset Compensation Algorithm. For fast
startup, this bit may be polled by the external
microcontroller. As soon as this bit is set, the AS5040 has
completed the startup and the data is valid (see Figure 23)
COF (CORDIC Overflow), logic high indicates an out of
range error in the CORDIC part. When this bit is set, the
data at D9:D0 is invalid. The absolute output maintains the
last valid angular value.
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ams Datasheet
[v2-11] 2015-Nov-20
This alarm may be resolved by bringing the magnet within
the X-Y-Z tolerance limits.
LIN (Linearity Alarm), logic high indicates that the input
field generates a critical output linearity. When this bit is
set, the data at D9:D0 may still be used, but can contain
invalid data. This warning may be resolved by bringing the
magnet within the X-Y-Z tolerance limits.
MagINCn, (Magnitude Increase) becomes HIGH, when the
magnet is pushed towards the IC, thus the magnetic field
strength is increasing.
MagDECn, (Magnitude Decrease) becomes HIGH, when the
magnet is pulled away from the IC, thus the magnetic field
strength is decreasing.
Both signals HIGH indicate a magnetic field that is out of the
allowed range (see Figure 22).
Figure 22:
Magnetic Magnitude Variation Indicator
Mag
INCn
Mag
DECn
0
0
No distance change; Magnetic input field OK (in range, 45mT to 75mT)
0
1
Distance increase: Pull-function. This state is dynamic, it is only active while the
magnet is moving away from the chip in Z-axis
1
0
Distance decrease: Push- function. This state is dynamic, it is only active while the
magnet is moving towards the chip in Z.-axis.
1
1
Magnetic Input Field invalid – out of range: 75mT (or missing magnet)
Description
Note(s) and/or Footnote(s):
1. Pins 1 and 2 (MagINCn, MagDECn) are open drain outputs and require external pull-up resistors. If the magnetic field is in range,
both outputs are turned OFF.
ams Datasheet
[v2-11] 2015-Nov-20
Page 19
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AS5040 − 10-Bit Absolute Angular Position Output
The two pins may also be combined with a single pull-up
resistor. In this case, the signal is high when the magnetic field
is in range. It is low in all other cases (see Figure 22).
Even Parity bit for transmission error detection of bits 1 to 15
(D9 to D0, OCF, COF, LIN, MagINCn, MagDECn).
The absolute angular output is always set to a resolution of 10
bit. Placing the magnet above the chip, angular values increase
in clockwise direction by default.
Data D9:D0 is valid, when the status bits have the following
configurations:
Figure 23:
Status Bit Outputs
OCF
1
COF
0
LIN
0
Mag INCn
Mag DECn
0
0
0
1
1
0
Parity
Even checksum of bits 1:15
The absolute angular position is sampled at a rate of 10kHz
(0.1ms). This allows reading of all 1024 positions per 360
degrees within 0.1 seconds = 9.76Hz (~10Hz) without skipping
any position. Multiplying 10Hz by 60, results the corresponding
maximum rotational speed of 600 rpm.
Readout of every second angular position allows for rotational
speeds of up to 1200rpm.
Consequently, increasing the rotational speed reduces the
number of absolute angular positions per revolution (see
Figure 46). Regardless of the rotational speed or the number of
positions to be read out, the absolute angular value is always
given at the highest resolution of 10 bit.
The incremental outputs are not affected by rotational speed
restrictions due to the implemented interpolator. The
incremental output signals may be used for high-speed
applications with rotational speeds of up to 30,000 rpm without
missing pulses.
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − 10-Bit Absolute Angular Position Output
Daisy Chain Mode
The Daisy Chain mode allows connection of several AS5040’s
in series, while still keeping just one digital input for data
transfer (see “Data IN” in Figure 24 below). This mode is
accomplished by connecting the data output (DO; pin 9) to the
data input (Prog; pin 8) of the subsequent device. An RC filter
must be implemented between each PROG pin of device n and
DO pin of device n+1, to prevent the encoders to enter the
alignment mode, in case of ESD discharge, long cables, or not
conform signal levels or shape. Using the values R=100R and
C=1nF allow a max. CLK frequency of 1MHz on the whole chain.
The serial data of all connected devices is read from the DO pin
of the first device in the chain. The Prog pin of the last device
in the chain should be connected to VSS. The length of the serial
bit stream increases with every connected device, it is
n * (16+1) bits:
e.g. 34 bit for two devices, 51 bit for three devices, etc…
The last data bit of the first device (Parity) is followed by a logic
low bit and the first data bit of the second device (D9), etc…
(see Figure 25).
Programming Daisy Chained Devices
In Daisy Chain mode, the Prog pin is connected directly to the
DO pin of the subsequent device in the chain (see Figure 24).
During programming (see Programming the AS5040), a
programming voltage of 7.5V must be applied to pin Prog. This
voltage level exceeds the limits for pin DO, so one of the
following precautions must be made during programming:
• Open the connection DO -> Prog during programming or
• Add a Schottky diode between DO and Prog (Anode = DO,
Cathode = Prog)
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − 10-Bit Absolute Angular Position Output
Due to the parallel connection of CLK and CSn, all connected
devices may be programmed simultaneously.
Figure 24:
Daisy Chain Hardware Configuration
CSn
CSn
CLK
CLK
CLK
CLK
PROG
DO
DI
CSn
CSn
100R
DO
100R
PROG
PROG
GND
GND
GND
MCU
DO
1nF
1nF
AS5040
AS5040
AS5040
Figure 25:
Daisy Chain Mode Data Transfer
CSn
tCLK FE
TCLK/2
1
CLK
DO
D9
tDO active
tDO valid
8
D8
D7
D6
D5
D4
D3
D2
16
D1
D0
OCF
Angular Position Data
LIN
Mag
INC
Status Bits
1st Device
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COF
Mag
DEC
Even
PAR
D
1
D9
2
D8
3
D7
Angular Position Data
2nd Device
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Incremental Outputs
Incremental Outputs
Three different incremental output modes are possible with
quadrature A/B being the default mode.
Figure 26 shows the two-channel quadrature as well as the
step/direction incremental signal (LSB) and the direction bit in
clockwise (CW) and counter-clockwise (CCW) direction.
Quadrature A/B Output (Quad A/B Mode)
The phase shift between channel A and B indicates the direction
of the magnet movement. Channel A leads channel B at a
clockwise rotation of the magnet (top view) by 90 electrical
degrees. Channel B leads channel A at a counter-clockwise
rotation.
LSB Output (Step/Direction Mode)
Output LSB reflects the LSB (least significant bit) of the
programmed incremental resolution (OTP Register Bit Div0,
Div1). Output Dir provides information about the rotational
direction of the magnet, which may be placed above or below
the device (1=clockwise; 0=counter clockwise; top view). Dir is
updated with every LSB change.
In both modes (quad A/B, step/direction) the resolution and the
index output are user programmable. The index pulse indicates
the zero position and is by default one angular step (1LSB) wide.
However, it can be set to three LSBs by programming the
Index-bit of the OTP register accordingly (see Figure 36).
Figure 26:
Incremental Output Modes
Q uad A/B-M ode
M echanical
Zero Position
Rotation Direction
Change
M echanical
Zero Position
A
B
Index=0
1LSB
H yst =
2 LSB
Index
Step / Dir-Mode
Index=1
3 LSB
LSB
Dir
CSn
t
t
ams Datasheet
[v2-11] 2015-Nov-20
Counterclockwise ccw
Clockwise cw
D ir valid
Increm ental outputs valid
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AS5040 − Incremental Outputs
Incremental Power-Up Lock Option
After power-up, the incremental outputs can optionally be
locked or unlocked, depending on the status of the CSn pin:
CSn = low at power-up:
CSn has an internal pull-up resistor and must be externally
pulled low (R ext ≤ 5kΩ). If Csn is low at power-up, the
incremental outputs (A, B, Index) will be high until the
internal offset compensation is finished.
This unique state (A=B=Index = high) may be used as an
indicator for the external controller to shorten the waiting
time at power-up. Instead of waiting for the specified
maximum power up-time (0), the controller can start
requesting data from the AS5040 as soon as the state
(A=B=Index = high) is cleared.
CSn = high or open at power-up:
In this mode, the incremental outputs (A, B, Index) will
remain at logic high state, until CSn goes low or a low pulse
is applied at CSn. This mode allows intentional disabling
of the incremental outputs until for example the system
microcontroller is ready to receive data.
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Incremental Outputs
Incremental Output Hysteresis
To avoid flickering incremental outputs at a stationary magnet
position, a hysteresis is introduced.
In case of a rotational direction change, the incremental
outputs have a hysteresis of 2 LSB.
Regardless of the programmed incremental resolution, the
hysteresis of 2 LSB always corresponds to the highest resolution
of 10 bit. In absolute terms, the hysteresis is set to 0.704 degrees
for all resolutions.
For constant rotational directions, every magnet position
change is indicated at the incremental outputs (see Figure 27).
If for example the magnet turns clockwise from position “x+3“
to “x+4“, the incremental output would also indicate this
position accordingly.
A change of the magnet’s rotational direction back to position
“x+3“ means, that the incremental output still remains
unchanged for the duration of 2 LSB, until position “x+2“ is
reached. Following this direction, the incremental outputs will
again be updated with every change of the magnet position.
Figure 27:
Hysteresis Window for Incremental Outputs
0.35°
!
!
Clockwise Direction
Counterclockwise Direction
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Pulse Width Modulation (PWM) Output
The AS5040 provides a pulse width modulated output (PWM),
whose duty cycle is proportional to the measured angle.
Pulse Width Modulation (PWM)
Output
t on × 1025
Position = ------------------------- – 1
t on + t off
(EQ1)
The PWM frequency is internally trimmed to an accuracy of
±5% (±10% over full temperature range). This tolerance can be
canceled by measuring the complete duty cycle as shown
above.
Figure 28:
PWM Output Signal
Angle
PW MIN
0 deg
(Pos 0)
1μs
1025μs
PW MAX
359.65 deg
(Pos 1023)
1024μs
1/fPWM
Figure 29:
PWM Signal Parameters
Parameter
Symbol
Typ
Unit
PWM frequency
fPWM
0.9756
kHz
MIN pulse width
PWMIN
1
μs
• Position 0d
• Angle 0 deg
MAX pulse width
PWMAX
1024
μs
• Position 1023d
• Angle 359,65 deg
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Note
Signal period: 1025μs
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Analog Output
An analog output can be generated by averaging the PWM
signal, using an external active or passive low pass filter. The
analog output voltage is proportional to the angle:
0º= 0V; 360º = VDD5V.
Analog Output
Using this method, the AS5040 can be used as direct
replacement of potentiometers.
Figure 30:
Simple Passive 2nd Order RC Low Pass Filter
R2
R1
analog out
Pin12
PWM
VDD2
C1
C2
0V2
0°
Pin7
360°
VSS
(EQ2)
R1, R2 ≥ 4K7 C1, C2 ≥ 1μF/6V
R1 should be ≥ 4k7 to avoid loading of the PWM output. Larger
values of Rx and Cx will provide better filtering and less ripple,
but will also slow down the response time.
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Brushless DC Motor Commutation Mode
Brushless DC motors require angular information for stator
commutation. The AS5040 provides U-V-W commutation
signals for one and two pole pair motors. In addition to the
three-phase output signals, the step (LSB) output at pin 12
allows high accuracy speed measurement. Two resolutions (9
or 10 bit) can be selected by programming Div0 according to
Figure 36.
Mode 3.0 (3.1) is used for brush-less DC motors with one-pole
pair rotors. The three phases (U, V, W) are 120 degrees apart,
each phase is 180 degrees ON and 180 degrees OFF.
Mode 3.2 (3.3) is used for motors with two pole pairs requiring
a higher pulse count to ensure a proper current commutation.
In this case the pulse width is 256 positions, equal to 90 degrees.
The precise physical angle at which the U, V and W signals
change state (“Angle” in Figure 31 and Figure 32) is calculated
by multiplying each transition position by the angular value of
1 count:
Angle [deg] = Position x (360 degree / 1024)
Brushless DC Motor
Commutation Mode
(EQ3)
Figure 31:
U, V and V-Signals for BLDC Motor Commutation (Div1=0, Div0=0)
Commutation - Mode 3.0
(One-pole-pair)
Width: 512 Steps
Width: 512 Steps
U
V
W
CW Direction
Position:
Angle:
0
171
341
512
683
853
0
0.0
60.12
119.88
180.0
240.12
299.88
360.0
Figure 32:
U, V and W-Signals for 2-Pole BLDC Motor Commutation (Div1=1; Div0=0)
Commutation - Mode 3.2
Width: 256 Steps
(Two-pole-pairs)
Width: 256 Steps
U
V
W
CW Direction
Position:
Angle:
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0
85
171
256
341
427
512
597
683
768
853
939
0
0.0
29.88
60.12
90.0
119.88
150.12
180.0
209.88
240.12
270.00
299.88
330.12
360.0
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Programming the AS5040
Programming the AS5040
After power-on, programming the AS5040 is enabled with the
rising edge of CSn with Prog = high and CLK = low. 16 bit
configuration data must be serially shifted into the OTP register
via the Prog-pin. The first “CCW” bit is followed by the zero
position data (MSB first) and the incremental mode setting as
shown in Table 6. Data must be valid at the rising edge of CLK
(see Figure 33).
After writing data into the OTP register it can be permanently
programmed by rising the Prog pin to the programming voltage
V PROG. 16 CLK pulses (t PROG) must be applied to program the
fuses (Figure 34). To exit the programming mode, the chip must
be reset by a power-on-reset. The programmed data is available
after the next power-up.
Note(s): During the programming process, the transitions in
the programming current may cause high voltage spikes
generated by the inductance of the connection cable. To avoid
these spikes and possible damage to the IC, the connection
wires, especially the signals Prog and VSS must be kept as short
as possible. The maximum wire length between the VPROG
switching transistor and pin Prog (see Figure 35) should not
exceed 50mm (2 inches). To suppress eventual voltage spikes,
a 10nF ceramic capacitor should be connected close to pins
Prog and VSS. This capacitor is only required for programming,
it is not required for normal operation.
The clock timing t clk must be selected at a proper rate to ensure
that the signal Prog is stable at the rising edge of CLK (see
Figure 33). Additionally, the programming supply voltage
should be buffered with a 10μF capacitor mounted close to the
switching transistor. This capacitor aids in providing peak
currents during programming.
The specified programming voltage at pin Prog is 7.3 – 7.5V (see
section 0). To compensate for the voltage drop across the V PROG
switching transistor, the applied programming voltage may be
set slightly higher (7.5 - 8.0V, see Figure 35).
OTP Register Contents:
ams Datasheet
[v2-11] 2015-Nov-20
CCW
Counter Clockwise Bit
• ccw=0 – angular value increases in clockwise
direction
• ccw=1 – angular value increases in
counterclockwise direction
Z [9:0]
Programmable Zero / Index Position
Indx
Index Pulse Width Selection: 1LSB / 3LSB
Div1, Div0
Divider Setting of Incremental Output
Md1, Md0
Incremental Output Mode Selection
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AS5040 − Programming the AS5040
OTP Default Setting
The AS5040 can also be operated without programming. The
default, un-programmed setting is shown in Figure 36
(Mode 0.0):
CCW:0
= Clockwise operation
Z9 to Z0: 00
= No programmed zero position
Indx: 0
= Index bit width = 1LSB
Div0,Div1: 00
= Incremental resolution = 10bit
Md0, MD1: 00
= Incremental mode = quadrature
Figure 33:
Programming Access – Write Data (section of Figure 34)
Figure 34:
Complete Programming Sequence
Write Data
Programming Mode
Power Off
CSn
Prog
7.5V
VDD
VProgOff
0V
Data
1
16
CLKPROG
tLoad PROG
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tPrgH
tPrgR
tPROG
tPROG finished
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Programming the AS5040
USB
Figure 35:
OTP Programming Connection of AS5040 (shown with AS5040 demoboard)
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Programming the AS5040
Incremental Mode Programming
Three different incremental output modes are available.
Mode: Md1=0 / Md0=1 sets the AS5040 in quadrature
mode.
Mode: Md1=1 / Md0=0 sets the AS5040 in step / direction
mode (see Figure 5).
In both modes, the incremental resolution may be reduced from
10 bit down to 9, 8 or 7 bit using the divider OTP bits Div1 and
Div0. (see Figure 36 below).
Mode: Md1=1 / Md0=1 sets the AS5040 in brushless DC
motor commutation mode with an additional LSB
incremental signal at pin 12 (PWM_LSB).
To allow programming of all bits, the default factory setting is
all bits = 0. This mode is equal to mode 1:0 (quadrature A/B,
1LSB index width, 256ppr).
The absolute angular output value, by default, increases with
clockwise rotation of the magnet (top view).
Setting the CCW-bit (see Figure 33) allows reversing the
indicated direction, e.g. when the magnet is placed underneath
the IC:
CCW = 0 – angular value increases clockwise;
CCW = 1 – angular value increases counterclockwise.
By default, the zero / index position pulse is one LSB wide. It
can be increased to a three LSB wide pulse by setting the
Index-bit of the OTP register.
Further programming options (commutation modes) are
available for brushless DC motor-control.
Md1 = Md0 = 1 changes the incremental output pins 3, 4 and 6
to a 3-phase commutation signal. Div1 defines the number of
pulses per revolution for either a two-pole (Div1=0) or four-pole
(Div1=1) rotor.
In addition, the LSB is available at pin 12 (the LSB signal
replaces the PWM signal), which allows for high rotational
speed measurement of up to 30,000 rpm.
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ams Datasheet
[v2-11] 2015-Nov-20
A S 5 0 4 0 − Programming the AS5040
Figure 36:
One Time Programmable (OTP) Register Options
OTP-Mode-Register-Bit
Pin #
Mode
Md1
Md0
Div1
Div0
Index
Default (Mode0.0)
0
0
0(1)
0(1)
0(1)
1LSB
quadAB-Mode1.0
0
1
0
0
0
1LSB
quadAB-Mode1.1
0
1
0
0
1
3LSBs
quadAB-Mode1.2
0
1
0
1
0
1LSB
quadAB-Mode1.3
0
1
0
1
1
quadAB-Mode1.4
0
1
1
0
0
1LSB
quadAB-Mode1.5
0
1
1
0
1
3LSBs
quadAB-Mode1.6
0
1
1
1
0
1LSB
quadAB-Mode1.7
0
1
1
1
1
3LSBs
ams Datasheet
[v2-11] 2015-Nov-20
3
A
4
B
6
3LSBs
12
PWM 10
bit
Pulses per
Revolution
Incremental
Resolution
ppr
bit
2x256
10
2x128
9
2x64
8
2x32
7
Page 33
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A S 5 0 4 0 − Programming the AS5040
OTP-Mode-Register-Bit
Pin #
Mode
Md1
Md0
Div1
Div0
Index
3
Step/Dir-Mode2.0
1
0
0
0
0
1LSB
Step/Dir-Mode2.1
1
0
0
0
1
3LSBs
Step/Dir -Mode2.2
1
0
0
1
0
1LSB
Step/Dir -Mode2.3
1
0
0
1
1
3LSBs
LSB
4
6
Dir
Step/Dir -Mode2.4
1
0
1
0
0
1LSB
Step/Dir -Mode2.5
1
0
1
0
1
3LSBs
Step/Dir -Mode2.6
1
0
1
1
0
1LSB
Step/Dir -Mode2.7
1
0
1
1
1
3LSBs
CommutationMode3.0
1
1
0
0
0
1
1
0
1
0
CommutationMode3.2
1
1
1
0
0
CommutationMode3.3
1
1
1
0
ppr
bit
512
10
256
9
128
8
64
7
PWM 10
bit
V(120º)
W(240º)
LSB
3x1
9
10
U’ (0º,
180º)
1
Incremental
Resolution
10
U(0º)
CommutationMode3.1
12
Pulses per
Revolution
V’ (60º,
240º)
W’ (120º,
300º)
LSB
2x3
9
Note(s) and/or Footnote(s):
1. Div1, Div0 and Index cannot be programmed in Mode 0:0
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Programming the AS5040
Zero Position Programming
Zero position programming is an OTP option that simplifies
assembly of a system, as the magnet does not need to be
manually adjusted to the mechanical zero position. Once the
assembly is completed, the mechanical and electrical zero
positions can be matched by software. Any position within a
full turn can be defined as the permanent new zero/index
position.
For zero position programming, the magnet is turned to the
mechanical zero position (e.g. the “OFF”-position of a rotary
switch) and the actual angular value is read.
This value is written into the OTP register bits Z9:Z0 (see
Figure 33) and programmed as described in Programming the
AS5040.
This new absolute zero position is also the new Index pulse
position for incremental output modes.
Note(s): The zero position value may also be modified before
programming, e.g. to program an electrical zero position that
is 180° (half turn) from the mechanical zero position, just add
512 to the value read at the mechanical zero position and
program the new value into the OTP register.
Repeated OTP Programming
Although a single AS5040 OTP register bit can be programmed
only once (from 0 to 1), it is possible to program other,
unprogrammed bits in subsequent programming cycles.
However, a bit that has already been programmed should not
be programmed twice. Therefore it is recommended that bits
that are already programmed are set to “0” during a
programming cycle.
Non-Permanent Programming
It is also possible to re-configure the AS5040 in a
non-permanent way by overwriting the OTP register.
This procedure is essentially a “Write Data” sequence (see
Figure 33) without a subsequent OTP programming cycle.
The “Write Data” sequence may be applied at any time during
normal operation. This configuration remains set while the
power supply voltage is above the power-on reset level (see 0).
See Application Note AN5000-20 for further information.
Analog Readback Mode
Non-volatile programming (OTP) uses on-chip zener diodes,
which become permanently low resistive when subjected to a
specified reverse current.
The quality of the programming process depends on the
amount of current that is applied during the programming
process (up to 130mA).
ams Datasheet
[v2-11] 2015-Nov-20
Page 35
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AS5040 − Programming the AS5040
This current must be provided by an external voltage source. If
this voltage source cannot provide adequate power, the zener
diodes may not be programmed properly.
In order to verify the quality of the programmed bits, an analog
level can be read for each zener diode, giving an indication
whether this particular bit was properly programmed or not.
To put the AS5040 in analog readback mode, a digital sequence
must be applied to pins CSn, Prog and CLK as shown in
Figure 37. The digital level for this pin depends on the supply
configuration (3.3V or 5V; see 3.3V / 5V Operation).
The second rising edge on CSn (OutpEN) changes pin Prog to a
digital output and the log. high signal at pin Prog must be
removed to avoid collision of outputs (grey area in Figure 37).
The following falling slope of CSn changes pin Prog to an analog
output, providing a reference voltage Vref, that must be saved
as a reference for the calculation of the subsequent
programmed and unprogrammed OTP bits. Following this step,
each rising slope of CLK outputs one bit of data in the reverse
order as during programming (see Figure 37):
Md0-MD1-Div0,Div1-Indx-Z0…Z9, ccw)
During analog readback, the capacitor at pin Prog (see
Figure 35) should be removed to allow a fast readout rate. If the
capacitor is not removed the analog voltage will take longer to
stabilize due to the additional capacitance.
The measured analog voltage for each bit must be subtracted
from the previously measured Vref, and the resulting value gives
an indication on the quality of the programmed bit: a reading
of 1V indicates a properly unprogrammed bit.
A reading between 100mV and 1V indicates a faulty bit, which
may result in an undefined digital value, when the OTP is read
at power-up.
Following the 16th clock (after reading bit “ccw”), the chip
must be reset by disconnecting the power supply.
Figure 37:
OTP Register Analog Read
P ro g E N
O u tp E N
P o w e r-o n R e se t;
tu rn o ff
s u p p ly
A n a lo g R e a d b a c k D a ta a t P ro g
CSn
V re f
In te rn a l
te s t b it
d ig ita l
P ro g
V p ro g ra m m e d
M d 0 M d 1 D iv 0 D iv1 V u n p ro g ra m m e d Z 5
Z6
Z7
Z8
Z9
ccw
P ro g c h a n g e s to O u tp u t
1
CLK
t L o a d P ro g
Page 36
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16
C L K A re a d
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Alignment Mode
Alignment Mode
The alignment mode simplifies centering the magnet over the
chip to gain maximum accuracy and XY-alignment tolerance.
This electrical centering method allows a wider XY-alignment
tolerance (0.485mm radius) than mechanical
centering(0.25mm radius) as it eliminates the placement
tolerance of the die within the IC package (+/- 0.235mm).
Alignment mode can be enabled with the falling edge of CSn
while Prog = logic high (Figure 38). The Data bits D9-D0 of the
SSI change to a 10-bit displacement amplitude output. A high
value indicates large X or Y displacement, but also higher
absolute magnetic field strength. The magnet is properly
aligned, when the difference between highest and lowest value
over one full turn is at a minimum.
Under normal conditions, a properly aligned magnet will result
in a reading of less than 32 over a full turn.The MagINCn and
MagDECn indicators will be = 1 when the alignment mode
reading is < 32. At the same time, both hardware pins MagINCn
(#1) and MagDECn (#2) will be pulled to VSS. A properly aligned
magnet will therefore produce a MagINCn = MagDECn = 1
signal throughout a full 360° turn of the magnet.
Stronger magnets or short gaps between magnet and IC may
show values larger than 32. These magnets are still properly
aligned as long as the difference between highest and lowest
value over one full turn is at a minimum.
The alignment mode can be reset to normal operation mode by
a power-on-reset (disconnect / re-connect power supply).
Figure 38:
Enabling the Alignment Mode
Prog
CSn
AlignMode enable
Read-out
via SSI
2μs 2μs
min. min.
ams Datasheet
[v2-11] 2015-Nov-20
Page 37
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AS5040 − 3.3V / 5V Operation
The AS5040 operates either at 3.3V ±10% or at 5V ±10%. This
is made possible by an internal 3.3V Low-Dropout (LDO) voltage
regulator. The internal supply voltage is always taken from the
output of the LDO, meaning that the internal blocks are always
operating at 3.3V.
3.3V / 5V Operation
For 3.3V operation, the LDO must be bypassed by connecting
VDD3V3 with VDD5V (see Figure 39).
For 5V operation, the 5V supply is connected to pin VDD5V,
while VDD3V3 (LDO output) must be buffered by a 2.2...10μF
capacitor, which is supposed to be placed close to the supply
pin (see Figure 39).
The VDD3V3 output is intended for internal use only It must not
be loaded with an external load.
The output voltage of the digital interface I/O’s corresponds to
the voltage at pin VDD5V, as the I/O buffers are supplied from
this pin (see Figure 39).
Figure 39:
Connections for 5V / 3.3V Supply Voltages
5V Operation
3.3V Operation
2.2...10μF
VDD3V3
VDD3V3
100n
VDD5V
100n
LDO
VDD5V
Internal
VDD
LDO
Internal
VDD
DO
DO
4.5 - 5.5V
I
N
T
E
R
F
A
C
E
PWM_LSB
3.0 - 3.6V
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
VSS
I
N
T
E
R
F
A
C
E
PWM_LSB
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
VSS
A buffer capacitor of 100nF is recommended in both cases close
to pin VDD5V. Note that pin VDD3V3 must always be buffered
by a capacitor. It must not be left floating, as this may cause an
instable internal 3.3V supply voltage which may lead to larger
than normal jitter of the measured angle.
Page 38
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Choosing the Proper Magnet
Typically the magnet should be 6mm in diameter and ≥2.5mm
in height. Magnetic materials such as rare earth AlNiCo, SmCo5
or NdFeB are recommended.
Choosing the Proper Magnet
The magnet’s field strength perpendicular to the die surface
should be verified using a gauss-meter. The magnetic field Bv
at a given distance, along a concentric circle with a radius of
1.1mm (R1), should be in the range of ±45mT to ±75mT. (see
Figure 40).
Figure 40:
Typical Magnet and Magnetic Field Distribution
typ. 6mm diameter
N
S
Magnet axis
R1
Vertical field
component
Magnet axis
Bv
(45…75mT)
Vertical field
component
0
N
360
S
R1 concentric circle;
radius 1.1mm
ams Datasheet
[v2-11] 2015-Nov-20
Page 39
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AS5040 − Choosing the Proper Magnet
Physical Placement of the Magnet
The best linearity can be achieved by placing the center of the
magnet exactly over the defined center of the IC package as
shown in Figure 41:
Figure 41:
Defined IC Center and Magnet Displacement Radius
3.9 mm
3.9 mm
1
2.433 mm
Defined
center
Rd
2.433 mm
Page 40
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Area of recommended maximum
magnet misalignment
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Choosing the Proper Magnet
Magnet Placement
The magnet’s center axis should be aligned within a
displacement radius R d of 0.25mm from the defined center of
the IC with reference to the edge of pin #1 (see Figure 41). This
radius includes the placement tolerance of the chip within the
SSOP-16 package (± 0.235mm). The displacement radius R d is
0.485mm with reference to the center of the chip (see
Alignment Mode)
The vertical distance should be chosen such that the magnetic
field on the die surface is within the specified limits (see
Figure 40). The typical distance “z” between the magnet and
the package surface is 0.5mm to 1.8mm with the recommended
magnet (6mm x 2.5mm). Larger gaps are possible, as long as
the required magnetic field strength stays within the defined
limits.
A magnetic field outside the specified range may still produce
usable results, but the out-of-range condition will be indicated
by MagINCn (pin 1) and MagDECn (pin 2), see Figure 22.
Figure 42:
Vertical Placement of the Magnet
N
Die surface
S
Package surface
z
0.576mm ± 0.1mm
1.282mm ± 0.15mm
ams Datasheet
[v2-11] 2015-Nov-20
Page 41
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AS5040 − Simulation Modelling
Simulation Modelling
Figure 43:
Arrangement of Hall Sensor Array on Chip (principle)
With reference to Figure 43, a diametrically magnetized
permanent magnet is placed above or below the surface of the
AS5040. The chip uses an array of Hall sensors to sample the
vertical vector of a magnetic field distributed across the device
package surface. The area of magnetic sensitivity is a circular
locus of 1.1mm radius with respect to the center of the die. The
Hall sensors in the area of magnetic sensitivity are grouped and
configured such that orthogonally related components of the
magnetic fields are sampled differentially.
The differential signal Y1-Y2 will give a sine vector of the
magnetic field. The differential signal X1-X2 will give an
orthogonally related cosine vector of the magnetic field.
The angular displacement (θ) of the magnetic source with
reference to the Hall sensor array may then be modelled by:
(EQ4)
( Y1 – Y2 )
θ = arc tan -------------------------- ± 0.5°
( X1 – X2 )
The ±0.5° angular error assumes a magnet optimally aligned
over the center of the die and is a result of gain mismatch errors
of the AS5040. Placement tolerances of the die within the
package are ±0.235mm in X and Y direction, using a reference
point of the edge of pin #1 (Figure 43).
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Simulation Modelling
In order to neglect the influence of external disturbing
magnetic fields, a robust differential sampling and ratiometric
calculation algorithm has been implemented. The differential
sampling of the sine and cosine vectors removes any common
mode error due to DC components introduced by the magnetic
source itself or external disturbing magnetic fields. A
ratiometric division of the sine and cosine vectors removes the
need for an accurate absolute magnitude of the magnetic field
and thus accurate Z-axis alignment of the magnetic source.
The recommended differential input range of the magnetic
field strength (B (X1-X2) ,B(Y1-Y2) ) is ±75mT at the surface of the
die. In addition to this range, an additional offset of ±5mT,
caused by unwanted external stray fields is allowed.
The chip will continue to operate, but with degraded output
linearity, if the signal field strength is outside the recommended
range. Too strong magnetic fields will introduce errors due to
saturation effects in the internal preamplifiers. Too weak
magnetic fields will introduce errors due to noise becoming
more dominant.
ams Datasheet
[v2-11] 2015-Nov-20
Page 43
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AS5040 − Failure Diagnostics
Failure Diagnostics
The AS5040 also offers several diagnostic and failure detection
features:
Magnetic Field Strength Diagnosis
By software: the MagINCn and MagDECn status bits will both
be high when the magnetic field is out of range.
By hardware: Pins #1 (MagINCn) and #2 (MagDECn) are
open-drain outputs and will both be turned ON (= low with
external pull-up resistor) when the magnetic field is out of
range. If only one of the outputs is low, the magnet is either
moving towards the chip (MagINCn) or away from the chip
(MagDECn).
Power Supply Failure Detection
By software: If the power supply to the AS5040 is interrupted,
the digital data read by the SSI will be all “0”s. Data is only valid,
when bit OCF is high, hence a data stream with all “0”s is invalid.
To ensure adequate low levels in the failure case, a pull-down
resistor (~10kΩ) should be added between pin DO and VSS at
the receiving side.
By hardware: The MagINCn and MagDECn pins are open drain
outputs and require external pull-up resistors. In normal
operation, these pins are high ohmic and the outputs are high
(see Figure 22). In a failure case, either when the magnetic field
is out of range or the power supply is missing, these outputs
will become low. To ensure adequate low levels in case of a
broken power supply to the AS5040, the pull-up resistors
(>10kΩ) from each pin must be connected to the positive
supply at pin 16 (VDD5V).
By hardware: PWM output: The PWM output is a constant
stream of pulses with 1kHz repetition frequency. In case of
power loss, these pulses are missing.
By hardware: Incremental outputs: In normal operation, pins
A(#3), B(#4) and Index (#6) will never be high at the same time,
as Index is only high when A=B=low. However, after a
power-on-reset, if VDD is powered up or restarts after a power
supply interruption, all three outputs will remain in high state
until pin CSn is pulled low. If CSn is already tied to VSS during
power-up, the incremental outputs will all be high until the
internal offset compensation is finished (within t PwrUp).
Page 44
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Angular Output Tolerances
Angular Output Tolerances
Accuracy
Accuracy is defined as the error between measured angle and
actual angle. It is influenced by several factors:
• The non-linearity of the analog-digital converters,
• Internal gain and mismatch errors,
• Non-linearity due to misalignment of the magnet
As a sum of all these errors, the accuracy with centered
magnet = (Err max – Err min)/2 is specified as better than ±0.5
degrees @ 25°C (see Figure 45).
Misalignment of the magnet further reduces the accuracy.
Figure 44 shows an example of a 3D-graph displaying
nonlinearity over XY-misalignment. The center of the square
XY-area corresponds to a centered magnet (see dot in the center
of the graph). The X- and Y- axis extends to a misalignment of
±1mm in both directions. The total misalignment area of the
graph covers a square of 2x2 mm (79x79mil) with a step size of
100μm.
For each misalignment step, the measurement as shown in
Figure 45 is repeated and the accuracy (Errmax – Err min )/2 (e.g.
0.25° in Figure 45) is entered as the Z-axis in the 3D-graph.
Figure 44:
Example of Linearity Error Over XY Misalignment
ams Datasheet
[v2-11] 2015-Nov-20
Page 45
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AS5040 − Angular Output Tolerances
The maximum non-linearity error on this example is better than
±1 degree (inner circle) over a misalignment radius of ~0.7mm.
For volume production, the placement tolerance of the IC
within the package (±0.235mm) must also be taken into
account.
The total nonlinearity error over process tolerances,
temperature and a misalignment circle radius of 0.25mm is
specified better than ±1.4 degrees.
The magnet used for this measurement was a cylindrical NdFeB
(Bomatec® BMN-35H) magnet with 6mm diameter and 2.5mm in
height.
Figure 45:
Example of Linearity Error Over 360º
Linearity error with centered magnet [degrees]
0.5
0.4
0.3
0.2
transition noise
0.1
Err max
0
-0.1 1
-0.2
55
109 163 217 271 325 379 433 487 541 595 649 703 757 811 865 919 973
Err min
-0.3
-0.4
-0.5
Transition Noise
Transition noise is defined as the jitter in the transition between
two steps.
Due to the nature of the measurement principle (Hall sensors
+ Preamplifier + ADC), there is always a certain degree of noise
involved.
This transition noise voltage results in an angular transition
noise at the outputs. It is specified as 0.12 degrees rms (1
sigma) 1
This is the repeatability of an indicated angle at a given
mechanical position.
1. Statistically, 1 sigma represents 68.27% of readings,
3 sigma represents 99.73% of readings.
Page 46
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Angular Output Tolerances
The transition noise has different implications on the type of
output that is used:
• Absolute Output; SSI Interface: The transition noise of the
absolute output can be reduced by the user by applying
an averaging of readings.
• PWM Interface: If the PWM interface is used as an analog
output by adding a low pass filter, the transition noise can
be reduced by lowering the cutoff frequency of the filter.
If the PWM interface is used as a digital interface with a
counter at the receiving side, the transition noise may
again be reduced by averaging of readings.
• Incremental Mode: In incremental mode, the transition
noise influences the period, width and phase shift of the
output signals A, B and Index. However, the algorithm
used to generate the incremental outputs guarantees no
missing or additional pulses even at high speeds (up to
30.000 rpm and higher).
High Speed Operation
Sampling Rate
The AS5040 samples the angular value at a rate of 10.42k
samples per second. Consequently, the incremental, as well as
the absolute outputs are updated each 96μs. At a stationary
position of the magnet, this sampling rate creates no additional
error.
Absolute Mode with Serial Communication
With the given sampling rate of 10.4 kHz, the number of samples
(n) per turn for a magnet rotating at high speed can be
calculated by:
(EQ5)
60
n = --------------------------rpm ⋅ 96μs
In practice, there is no upper speed limit. The only restriction is
that there will be fewer samples per revolution as the speed
increases.
Regardless of the rotational speed, the absolute angular value
is always sampled at the highest resolution of 10 bit.
Likewise, for a given number of samples per revolution (n), the
maximum speed can be calculated by:
(EQ6)
60
rpm = -------------------n ⋅ 96μs
In absolute mode with serial communication, 610 rpm is the
maximum speed, where 1024 readings per revolution can be
obtained.
In incremental mode, the maximum error caused by the
sampling rate of the ADCs is 0/+96μs. It has a peak of
1LSB = 0.35° at 610 rpm. At higher speeds this error is reduced
again due to interpolation and the output delay remains at
192μs as the DSP requires two sampling periods (2x96μs) to
synthesize and redistribute any missing pulses.
ams Datasheet
[v2-11] 2015-Nov-20
Page 47
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AS5040 − Angular Output Tolerances
Absolute Mode with PWM
The principle is the same as with the serial communication. The
PWM output is refreshed with a rate of 1.025ms, the number of
samples (n) per turn for a magnet rotating at high speed can be
calculated by:
(EQ7)
60
n = ------------------------------------rpm × 1.025ms
In absolute mode with PWM output, 57 rpm is the maximum
speed, where 1024 readings per revolution can be obtained.
Incremental Mode
Incremental encoders are usually required to produce no
missing pulses up to several thousand rpm’s.
Therefore, the AS5040 has a built-in interpolator, which ensures
that there are no missing pulses at the incremental outputs for
rotational speeds of up to 30,000 rpm, even at the highest
resolution of 10 bits (512 pulses per revolution).
Figure 46:
Speed Performance
Absolute Output Mode
Incremental Output Mode
610rpm = 1024 samples / turn
1220rpm = 512 samples / turn
2441rpm = 256 samples / turn
No missing pulses
@ 10 bit resolution (512ppr):
max. speed = 30,000 rpm
etc…
Propagation Delays
The propagation delay is the delay between the time that the
sample is taken until it is converted and available as angular
data. This delay is 48μs for the absolute interface and 192μs for
the incremental interface.
Using the SSI interface for absolute data transmission, an
additional delay must be considered, caused by the
asynchronous sampling (t = 0...1/fs) and the time it takes the
external control unit to read and process the data.
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Angular Output Tolerances
Angular Error Caused by Propagation Delay
A rotating magnet will therefore cause an angular error caused
by the output delay. This error increases linearly with speed:
(EQ8)
e sampling = rpm × 6 × prop⋅delay
Where:
e sampling = angular error [º]
rpm = rotating speed [rpm]
prop delay = propagation delay [seconds]
Note(s): Since the propagation delay is known, it can be
automatically compensated by the control unit processing the
data from the AS5040, thus reducing the angular error caused
by speed.
Internal Timing Tolerance
The AS5040 does not require an external ceramic resonator or
quartz. All internal clock timings for the AS5040 are generated
by an on-chip RC oscillator. This oscillator is factory trimmed to
±5% accuracy at room temperature (±10% over full
temperature range). This tolerance influences the ADC
sampling rate and the pulse width of the PWM output:
• Absolute Output; SSI Interface:
A new angular value is updated every 100μs (typ)
• Incremental outputs:
the incremental outputs are updated every 100μs (typ.)
• PWM output:
A new angular value is updated every 100μs (typ.).
The PWM pulse timings Ton and T off also have the same
tolerance as the internal oscillator.
If only the PWM pulse width T on is used to measure the
angle, the resulting value also has this timing tolerance.
However, this tolerance can be canceled by measuring
both T on and Toff and calculating the angle from the duty
cycle (see Incremental Outputs):
(EQ9)
ams Datasheet
[v2-11] 2015-Nov-20
t on ⋅ 1025
Position = -------------------------- – 1
( t on + t off )
Page 49
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AS5040 − Angular Output Tolerances
Temperature
Magnetic Temperature Coefficient
One of the major benefits of the AS5040 compared to linear Hall
sensors is that it is much less sensitive to temperature. While
linear Hall sensors require a compensation of the magnet’s
temperature coefficients, the AS5040 automatically
compensates for the varying magnetic field strength over
temperature. The magnet’s temperature drift does not need to
be considered, as the AS5040 operates with magnetic field
strengths from ±45mT to ±75mT.
Example:
A NdFeB magnet has a field strength of 75mT @ -40ºC and a
temperature coefficient of -0.12% per Kelvin.
The temperature change is from -40º to +125º = 165K.
The magnetic field change is: 165 x -0.12% = -19.8%, which
corresponds to 75mT at -40ºC and 60mT at 125ºC.
The AS5040 can compensate for this temperature related field
strength change automatically, no user adjustment is required.
Accuracy Over Temperature
The influence of temperature in the absolute accuracy is very
low. While the accuracy is ≤ ±0.5º at room temperature, it may
increase to ≤ ±0.9º due to increasing noise at high
temperatures.
Timing Tolerance Over Temperature
The internal RC oscillator is factory trimmed to ±5%. Over
temperature, this tolerance may increase to ±10%. Generally,
the timing tolerance has no influence in the accuracy or
resolution of the system, as it is used mainly for internal clock
generation.
The only concern to the user is the width of the PWM output
pulse, which relates directly to the timing tolerance of the
internal oscillator. This influence, however, can be canceled by
measuring the complete PWM duty cycle (see Internal Timing
Tolerance).
Page 50
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Mechanical Data
Mechanical Data
The internal Hall elements are located in the center of the
package on a circle with a radius of 1 mm.
Figure 47:
Hall Element Positions
Note(s) and/or Footnote(s):
1. All dimensions in mm.
2. Die thickness 381μm nom.
3. Adhesive thickness 30 ± 15μm.
4. Leadframe downset 200 ± 38μm.
5. Leadframe thickness 152±8 μm.
ams Datasheet
[v2-11] 2015-Nov-20
Page 51
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AS5040 − Package Drawings & Mark ings
Package Drawings & Markings
Figure 48:
16-Lead Shrink Small Outline Package SSOP-16
Symbol
Min
Typ
Max
A
A1
A2
b
c
D
E
E1
e
L
L1
L2
R
Θ
N
1.73
0.05
1.68
0.25
0.09
6.07
7.65
5.2
1.86
0.13
1.73
0.315
6.20
7.8
5.3
0.65
0.75
1.25 REF
0.25 BSC
4º
16
1.99
0.21
1.78
0.38
0.20
6.33
7.9
5.38
0.63
0.09
0º
0.95
RoHS
Green
8º
Note(s) and/or Footnote(s):
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters. Angles in degrees.
3. N is the total number of terminals.
Page 52
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Package Drawings & Markings
Figure 49:
Package Marking
Figure 50:
Packaging Code
YY
Last two digits of the
manufacturing year
WW
M
Manufacturing week
Plant identifier
ZZ
@
Free choice/
traceability code
Sublot identifier
JEDEC Package Outline Standard:
MO - 150 AC
Thermal Resistance R th(j-a) :
typ. 151 K/W in still air, soldered on PCB
IC's marked with a white dot or the letters
"ES" denote Engineering Samples
ams Datasheet
[v2-11] 2015-Nov-20
Page 53
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AS5040 − Recommended PCB Footprint
Recommended PCB Footprint
Figure 51:
Recommended PCB Footprint
Figure 52:
Recommended Footprint Data
Recommended Footprint Data
Page 54
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mm
inch
A
9.02
0.355
B
6.16
0.242
C
0.46
0.018
D
0.65
0.025
E
5.01
0.197
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Ordering & Contact Information
Ordering & Contact Information
Figure 53:
Ordering Information
Ordering Code
Package
Marking
Delivery Form
Delivery Quantity
AS5040-ASSU
SSOP-16
AS5040
Tubes (1)
7700 pcs
AS5040-ASST
SSOP-16
AS5040
Tape & Reel
2000 pcs/reel
Note(s) and/or Footnote(s):
1. 1 tube = 77 devices
Buy our products or get free samples online at:
www.ams.com/ICdirect
Technical Support is available at:
www.ams.com/Technical-Support
Provide feedback about this document at:
www.ams.com/Document-Feedback
For further information and requests, e-mail us at:
ams_sales@ams.com
For sales offices, distributors and representatives, please visit:
www.ams.com/contact
Headquarters
ams
Tobelbaderstrasse 30
8141 Unterpremstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0
Website: www.ams.com
ams Datasheet
[v2-11] 2015-Nov-20
Page 55
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AS5040 − RoHS Compliant & ams Green Statement
RoHS Compliant & ams Green
Statement
RoHS: The term RoHS compliant means that ams AG products
fully comply with current RoHS directives. Our semiconductor
products do not contain any chemicals for all 6 substance
categories, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. Where designed to
be soldered at high temperatures, RoHS compliant products are
suitable for use in specified lead-free processes.
ams Green (RoHS compliant and no Sb/Br): ams Green
defines that in addition to RoHS compliance, our products are
free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous
material).
Important Information: The information provided in this
statement represents ams AG knowledge and belief as of the
date that it is provided. ams AG bases its knowledge and belief
on information provided by third parties, and makes no
representation or warranty as to the accuracy of such
information. Efforts are underway to better integrate
information from third parties. ams AG has taken and continues
to take reasonable steps to provide representative and accurate
information but may not have conducted destructive testing or
chemical analysis on incoming materials and chemicals. ams AG
and ams AG suppliers consider certain information to be
proprietary, and thus CAS numbers and other limited
information may not be available for release.
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ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Copyrights & Disclaimer
Copyrights & Disclaimer
Copyright ams AG, Tobelbader Strasse 30, 8141
Unterpremstaetten, Austria-Europe. Trademarks Registered. All
rights reserved. The material herein may not be reproduced,
adapted, merged, translated, stored, or used without the prior
written consent of the copyright owner.
Devices sold by ams AG are covered by the warranty and patent
indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied,
or by description regarding the information set forth herein.
ams AG reserves the right to change specifications and prices
at any time and without notice. Therefore, prior to designing
this product into a system, it is necessary to check with ams AG
for current information. This product is intended for use in
commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or
high reliability applications, such as military, medical
life-support or life-sustaining equipment are specifically not
recommended without additional processing by ams AG for
each application. This product is provided by ams AG “AS IS”
and any express or implied warranties, including, but not
limited to the implied warranties of merchantability and fitness
for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any
damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interruption of business or
indirect, special, incidental or consequential damages, of any
kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation
or liability to recipient or any third party shall arise or flow out
of ams AG rendering of technical or other services.
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Document Status
Document Status
Document Status
Product Preview
Preliminary Datasheet
Datasheet
Datasheet (discontinued)
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Product Status
Definition
Pre-Development
Information in this datasheet is based on product ideas in
the planning phase of development. All specifications are
design goals without any warranty and are subject to
change without notice
Pre-Production
Information in this datasheet is based on products in the
design, validation or qualification phase of development.
The performance and parameters shown in this document
are preliminary without any warranty and are subject to
change without notice
Production
Information in this datasheet is based on products in
ramp-up to full production or full production which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade
Discontinued
Information in this datasheet is based on products which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and
should not be used for new designs
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Revision Information
Revision Information
Changes from 2.10 to current revision 2-11 (2015-Nov-20)
Page
Content of austriamicrosystems datasheet was converted to latest ams design
Added benefits to the Key Features
2
Added Mechanical Data section
51
Updated Package Drawings & Markings section
52
Updated Figure 53
55
Note(s) and/or Footnote(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision
ams Datasheet
[v2-11] 2015-Nov-20
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AS5040 − Content Guide
Content Guide
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1
2
2
3
General Description
Key Benefits & Features
Applications
Block Diagram
4
4
5
5
5
Pin Assignment
Pin Description
Mode 1.x: Quadrature A/B Output
Mode 2.x: Step / Direction Output
Mode 3.x: Brushless DC Motor Commutation Mode
7
Absolute Maximum Ratings
8
8
8
8
9
9
10
10
11
12
14
14
15
15
16
Electrical Characteristics
Operating Conditions
DC Characteristics for Digital Inputs and Outputs
CMOS Schmitt-Trigger Inputs: CLK, CSn
(CSn = Internal Pull-Up)
CMOS / Program Input: Prog
CMOS Output Open Drain: MagINCn, MagDECn
CMOS Output: A, B, Index, PWM
Tristate CMOS Output: DO
Magnetic Input Specification
Electrical System Specifications
Timing Characteristics
Synchronous Serial Interface (SSI)
Pulse Width Modulation Output
Incremental Outputs
Programming Conditions
17
Functional Description
18
18
18
21
21
10-Bit Absolute Angular Position Output
Synchronous Serial Interface (SSI)
Data Content
Daisy Chain Mode
Programming Daisy Chained Devices
23
23
23
24
25
Incremental Outputs
Quadrature A/B Output (Quad A/B Mode)
LSB Output (Step/Direction Mode)
Incremental Power-Up Lock Option
Incremental Output Hysteresis
26
27
28
Pulse Width Modulation (PWM) Output
Analog Output
Brushless DC Motor Commutation Mode
ams Datasheet
[v2-11] 2015-Nov-20
AS5040 − Content Guide
ams Datasheet
[v2-11] 2015-Nov-20
29
30
32
35
35
35
35
Programming the AS5040
OTP Default Setting
Incremental Mode Programming
Zero Position Programming
Repeated OTP Programming
Non-Permanent Programming
Analog Readback Mode
37
38
Alignment Mode
3.3V / 5V Operation
39
40
41
Choosing the Proper Magnet
Physical Placement of the Magnet
Magnet Placement
42
Simulation Modelling
44
44
44
Failure Diagnostics
Magnetic Field Strength Diagnosis
Power Supply Failure Detection
45
45
46
47
47
47
48
48
48
49
49
50
50
50
50
Angular Output Tolerances
Accuracy
Transition Noise
High Speed Operation
Sampling Rate.
Absolute Mode with Serial Communication
Absolute Mode with PWM
Incremental Mode
Propagation Delays
Angular Error Caused by Propagation Delay
Internal Timing Tolerance
Temperature
Magnetic Temperature Coefficient
Accuracy Over Temperature
Timing Tolerance Over Temperature
51
52
54
55
56
57
58
59
Mechanical Data
Package Drawings & Markings
Recommended PCB Footprint
Ordering & Contact Information
RoHS Compliant & ams Green Statement
Copyrights & Disclaimer
Document Status
Revision Information
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