INTERNAL USE ONLY
INTERNAL USE ONLY
PRODUCT SPECIFICATION
TABLE
OF CONTENTS
No.
Prepared (Subject resp)
Prepared (Subject resp)
jidgjian Grace Jiang
Approved (Document resp)
Approved (Document resp)
1 (4)
1 (1)
No.
Checked
Checked
BMR46
series
PoL Regulators
jidgjian Grace
Jiang
Input 4.5-14 V,
Input
V, Output
Output up
up to
to 50 A
A // 165 W
W
1/1301-BMR 464
Uen
Technical
BPOW
00201-00152
Uen Specification
Date
Rev
Date
7/4/2019
7/10/2009
Rev
1/28701-BMR
G
PD1
© Flex
©
Y464
D
Rev.B
July 2019
Key Features
• Small package
30.85 x 20.0 x 8.2 mm (1.215 x 0.787 x 0.323 in)
SIP: 33.0 x 7.6 x 18.1 mm (1.30 x 0.30 x 0.713 in)
• 0.6 V - 3.3 V output voltage range
• High efficiency, typ. 97.2% at 5Vin, 3.3Vout half load
• Configuration and Monitoring via PMBus
• Dynamic Loop Compensation (DLC) & fast loop
transient response
• Synchonization & phase spreading
• Current sharing, Voltage Tracking & Voltage margining
• MTBF 14.2 Mh
General Characteristics
Fully regulated
For narrow board pitch applications (15 mm/0.6 in)
Non-Linear Response for reduction of decoupling cap.
Input under voltage shutdown
Over temperature protection
Output short-circuit & Output over voltage protection
Remote control & Power Good
Voltage setting via pin-strap or PMBus
Configurable via Graphical User Interface
ISO 9001/14001 certified supplier
Highly automated manufacturing ensures quality
Safety Approvals
Design for Environment
Meets requirements in high-temperature
lead-free soldering processes.
Contents
Ordering Information
General Information
Safety Specification
Absolute Maximum Ratings
............................................................. 2
............................................................. 2
............................................................. 3
............................................................. 4
Electrical Specification
40A/ 0.6-3.3V Through hole and Surface mount version
40A/ 0.6-3.3V Single in Line version (SIP)
50A/ 0.6-3.3V DLC, Through hole and Surface mount version
50A/ 0.6-3.3V DLC, Single in Line version (SIP)
50A/ 0.6-3.3V Single in Line version (SIP)
BMR4640002, BMR4641002 ................ 5
BMR4642002 ...................................... 14
BMR4640008, BMR4641008 .............. 23
BMR4642008 ...................................... 32
BMR4642012 ...................................... 41
EMC Specification
........................................................... 49
Operating Information
........................................................... 49
Thermal Consideration
........................................................... 60
Connections
........................................................... 61
Mechanical Information
........................................................... 71
Soldering Information – Surface Mounting and Hole Mounting (Laydown version)................................................... 74
Delivery Package Information (Laydown version)
........................................................... 75
Soldering Information – Hole Mounting (SIP version)
........................................................... 76
Delivery Package Information (SIP version)
........................................................... 76
Product Qualification Specification
........................................................... 77
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
1/28701-BMR 464 Rev.B
Mean steady-state failure rate, λ
71 nFailures/h
Output
0.6-3.3 V, 40 A/ 132 W
0.6-3.3 V, 50 A/ 165 W
0.6-3.3 V, 50 A/ 165 W
Product number and Packaging
BMR 464 n 1 n 2 n 3 n 4 /n 5 n 6 n 7 n 8
Options
/ n5
n1
n2 n3 n4
Mounting
/
ο
ο
Mechanical
Hardware
Variants
ο
Packaging
Compatibility with RoHS requirements
n6
n7
ο
ο
n8
The products are compatible with the relevant clauses and
requirements of the RoHS directive 2011/65/EU and have a
maximum concentration value of 0.1% by weight in
homogeneous materials for lead, mercury, hexavalent
chromium, PBB and PBDE and of 0.01% by weight in
homogeneous materials for cadmium.
ο
Exemptions in the RoHS directive utilized in Flex products
are found in the Statement of Compliance document.
/
/
/
Configuration file
ο
Options
Description
n1
0
1
2
Through hole mount version (TH)
Surface mount version (SMD)
Single in line (SIP)
n2
0
1
Standard mechanical option
Long pin option, 5.5mm pin length (for
SIP)
Short pin option, 3.28mm pin length (for
SIP)
LB pin option, 4.57mm pin length (for
SIP)
3
4
12
40 A
50 A, Dynamic Loop Compensation
(DLC)
50 A, No DLC (for SIP)
n5 n6 n7
001
002
CTRL pin positive logic (active high)
CTRL pin negative logic (active low)
n8
B
C
Antistatic tray of 100 products (SIP only)
Antistatic tape & reel of 130 products
(Sample delivery avalable in lower
quantities. Not for SIP)
n3 n4
02
08
Std. deviation, σ
12.7 nFailures/h
MTBF (mean value) for the BMR 464 series = 14.2 Mh.
MTBF at 90% confidence level = 11.52 Mh
/
ο
July 2019
© Flex
Ordering Information
Product program
BMR464x002/001 (x=0,1,2)
BMR464x008/001 (x=0,1,2)
BMR464x012/001 (x=0,1,2)
2
Example: Product number BMR4640002/001C equals a through-hole
mounted, open frame, PMBus and analog pin strap, positive RC logic,
standard configuration variant, package tape & reel.
General Information
Reliability
The failure rate (λ) and mean time between failures
(MTBF= 1/λ) is calculated at max output power and an
operating ambient temperature (T A ) of +40°C. Flex uses
Telcordia SR-332 Issue 2 Method 1 to calculate the mean
steady-state failure rate and standard deviation (σ).
Telcordia SR-332 Issue 2 also provides techniques to
estimate the upper confidence levels of failure rates based
on the mean and standard deviation.
Flex fulfills and will continuously fulfill all its obligations
under regulation (EC) No 1907/2006 concerning the
registration, evaluation, authorization and restriction of
chemicals (REACH) as they enter into force and is through
product materials declarations preparing for the obligations
to communicate information on substances in the products.
Quality Statement
The products are designed and manufactured in an
industrial environment where quality systems and methods
like ISO 9000, Six Sigma, and SPC are intensively in use to
boost the continuous improvements strategy. Infant
mortality or early failures in the products are screened out
and they are subjected to an ATE-based final test.
Conservative design rules, design reviews and product
qualifications, plus the high competence of an engaged
work force, contribute to the high quality of the products.
Warranty
Warranty period and conditions are defined in Flex General
Terms and Conditions of Sale.
Limitation of Liability
Flex does not make any other warranties, expressed or
implied including any warranty of merchantability or fitness
for a particular purpose (including, but not limited to, use in
life support applications, where malfunctions of product can
cause injury to a person’s health or life).
© Flex 2019
The information and specifications in this technical
specification is believed to be correct at the time of
publication. However, no liability is accepted for
inaccuracies, printing errors or for any consequences
thereof. Flex reserves the right to change the
contents of this technical specification at any time without
prior notice.
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Safety Specification
General information
Flex Power DC/DC converters and DC/DC regulators are
designed in accordance with the safety standards
IEC 62368-1, EN 62368-1 and UL 62368-1 Audio/video,
information and communication technology equipment Part 1: Safety requirements
IEC/EN/UL 62368-1 contains requirements to prevent injury
or damage due to the following hazards:
•
•
•
•
•
•
Electrical shock
Electrically-caused fire
Injury caused by hazardous substances
Mechanically-caused injury
Skin burn
Radiation-caused injury
On-board DC/DC converters, Power interface modules and
DC/DC regulators are defined as component power
supplies. As components they cannot fully comply with the
provisions of any safety requirements without “conditions of
acceptability”. Clearance between conductors and between
conductive parts of the component power supply and
conductors on the board in the final product must meet the
applicable safety requirements. Certain conditions of
acceptability apply for component power supplies with
limited stand-off (see Mechanical Information for further
information). It is the responsibility of the installer to ensure
that the final product housing these components complies
with the requirements of all applicable safety standards and
regulations for the final product.
Component power supplies for general use shall comply
with the requirements in IEC/EN/UL 62368-1. Product
related standards, e.g. IEEE 802.3af Power over Ethernet,
and ETS-300132-2 Power interface at the input to telecom
equipment, operated by direct current (dc) are based on
IEC/EN/UL 60950-1 with regards to safety.
Flex Power DC/DC converters, Power interface modules
and DC/DC regulators are UL 62368-1 recognized and
certified in accordance with EN 62368-1. The flammability
rating for all construction parts of the products meet
requirements for V-0 class material according to
IEC 60695-11-10, Fire hazard testing, test flames – 50 W
horizontal and vertical flame test methods.
1/28701-BMR 464 Rev.B
3
July 2019
© Flex
Non - isolated DC/DC regulators
The DC/DC regulator output is ES1 energy source if the
input source meets the requirements for ES1 according to
IEC/EN/UL 62368-1.
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
1 (21)
No.
2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
4
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Absolute Maximum Ratings
Characteristics
min
TP1, TP2 Operating temperature (see Thermal Consideration section)
-40
125
°C
TS
Storage temperature
-40
125
°C
VI
Input voltage (See Operating Information Section for input and output voltage relations)
Logic I/O voltage
CTRL, SA0, SA1, SALERT, SCL, SDA, VSET, SYNC, GCB, PG
typ
max
Unit
-0.3
16
V
-0.3
6.5
V
Ground voltage differential
-S, PREF, GND
-0.3
0.3
V
Analog pin voltage
VO, +S, VTRK
-0.3
6.5
V
Stress in excess of Absolute Maximum Ratings may cause pe rmanent damage. Absolute Maximum Ratings, sometimes referred to as no destruction limits, are
normally tested with one parameter at a t ime exceeding the limits in the Electrical Specification. If exposed to stress above these limits, function and performance
may degrade in an unspecified manner.
Configuration File
This product is designed with a digital control circuit. The control circuit uses a configuration file which determines the functionality and performance of the product.
The Electrical Specification table shows parameter values of functionality and performance with the default configuration file, unless otherwise specified. The default
configuration file is designed to fit most application needs w ith focus on hi gh efficiency. If different characteristics are required it is possible to change the
configuration file to optimize certain performance characteristics. Note that current sharing operation requires changed configuration file. See application notes
AN307 for further information.
In this Technical specification examples are included to show the possibilities with digital control. See Operating Information section for information about trade offs
when optimizing certain key performance characteristics.
Fundamental Circuit Diagram
CI = 140 μF, CO = 400 μF
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
2 (21)
No.
2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
5
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Electrical Specification
BMR 464 0002, BMR 464 1002
TP1 = -30 to +95 °C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0206/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage rise time
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
margining
Output voltage set-point resolution
Output voltage accuracy
VO
Load regulation; IO = 0 - 100%
VOac
Output ripple & noise
CO = 470 μF (minimum external
capacitance). See Note 11
IO
Output current
IS
Static input current at max IO
Ilim
Current limit threshold
Short circuit
current
RMS, hiccup mode,
See Note 3
50% of max IO
η
max
Unit
2.4
V/ms
0.60
Efficiency
max IO
Pd
Power dissipation at max IO
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
typ
3.3
V
V
0.54
3.63
V
1.2
See Note 17
±0.025
Including line, load, temp.
See Note 14
Current sharing operation
See Note 15
1
%
-2
2
%
4.7
2
3
3
3
2
2
2
2
15
20
25
35
VO = 0.6 V
VO = 1.0 V
VO = 1.8V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
See Note 18
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
% FS
-1
Internal resistance +S/-S to VOUT/GND
Line regulation
Isc
min
monotonic
0.001
Ω
mV
mV
mVp-p
40
2.45
3.80
6.49
11.58
42
A
52
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
10
9
9
7
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
84.6
89.7
93.3
95.3
81.8
87.7
92.4
95.0
5.37
5.60
5.92
6.98
1.10
1.10
1.40
2.20
A
A
A
%
%
W
W
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
PCTRL
Ci
Co
COUT
Vtr1
ttr1
fs
Input standby
power
Internal input capacitance
Internal output capacitance
Total external output capacitance
ESR range of capacitors
(per single capacitor)
Load transient
peak voltage
deviation
(H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Load transient
recovery time,
Note 5
(H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Switching frequency
Switching frequency range, see Note 19
Switching frequency set-point accuracy
Control Circuit PWM Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Input Under Voltage
Lockout,
UVLO
Input Over Voltage
Protection,
IOVP
Power Good, PG,
See Note 2
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVLO threshold
UVLO threshold range
Set point accuracy
UVLO hysteresis
UVLO hysteresis range
Delay
Fault response
IOVP threshold
IOVP threshold range
Set point accuracy
IOVP hysteresis
IOVP hysteresis range
Delay
Fault response
PG threshold
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
Fault response
6
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
Conditions
Turned off with
CTRL-pin
3 (21)
No.
July 2019
© Flex
min
Default configuration:
Monitoring enabled,
Precise timing enabled
typ
max
Unit
mW
180
140
400
See Note 9
470
30 000
μF
μF
μF
See Note 9
5
30
mΩ
VO = 0.6 V
250
VO = 1.0 V
250
VO = 1.8 V
240
VO = 3.3 V
220
VO = 0.6 V
150
VO = 1.0 V
100
VO = 1.8 V
100
VO = 3.3 V
50
μs
320
200-640
PMBus configurable
External clock source
mV
-5
5
150
-13
5
95
13
3.85
3.85-14
PMBus configurable
-150
150
0.35
0-10.15
PMBus configurable
2.5
See Note 3
Automatic restart, 70 ms
16
4.2-16
PMBus configurable
-150
PMBus configurable
150
1
0-11.8
2.5
See Note 3
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
See Note 3
Automatic restart, 70 ms
90
5
10
0-500
85
0-100
5
115
100-115
25
5-60
Automatic restart, 70 ms
kHz
kHz
%
%
ns
%
V
V
mV
V
V
μs
V
V
mV
V
V
μs
% VO
% VO
ms
s
% VO
% VO
% VO
% VO
% VO
μs
μs
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR46
series(Ksenia
PoL Regulators
EAB/FJB/GM
Harrisen)
(MICRF)
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
Over Current
Protection,
OCP
Over Temperature
Protection,
OTP at P1
See Note 8
VIL
VIH
IIL
VOL
VOH
IOL
IOH
fSMB
tset
thold
tfree
Cp
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic output low signal level
Logic output high signal level
Logic output low sink current
Logic output high source current
SMBus Operating frequency
Setup time, SMBus
Hold time, SMBus
Bus free time, SMBus
Internal capacitance on logic pins
Initialization time
Delay duration
Delay duration range
Output Voltage
Delay Time
See Note 6
Output Voltage
Ramp Time
See Note 13
2/1301-BMR 464 Uen
Technical
Date
Delay accuracy
turn-on
Delay accuracy
turn-off
Ramp duration
Ramp duration range
Ramp time accuracy
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy (VO - VVTRK)
VTRK Regulation Accuracy (VO - VVTRK)
Current difference between products in a current
sharing group
READ_IOUT vs IO
typ
See Note 1
See Note 1
See Note 1
max
48
0-48
32
1-32
Automatic restart, 70 ms
120
-40…+120
15
0-160
Automatic restart, 240 ms
C
C
C
C
0.8
0.6
0.4
2.25
4
2
100
10
250
300
2
10
See Note 10
See Note 16
PMBus configurable
Default configuration:
CTRL controlled
Precise timing enabled
PMBus controlled
Precise timing disabled
Current sharing operation
35
10
2-500000
Current sharing operation
VVTRK = 5.5 V
100% tracking, see Note 7
Current sharing operation
2 phases, 100% tracking
VO = 1.0 V, 10 ms ramp
100% Tracking
Current sharing operation
100% Tracking
Steady state operation
Ramp-up
IO = 0-40 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 1.0 V
IO = 0-40 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 0.6-3.3 V
V
V
mA
V
V
mA
mA
kHz
ns
ns
ms
pF
ms
ms
±0.25
ms
-0.25/+4
ms
-0.25/+4
ms
10
0-200
100
20
PMBus configurable
Unit
A
A
Tsw
Tsw
2
CTRL
READ_VIN vs VI
READ_VOUT vs VO
READ_IOUT vs IO
min
PMBus configurable
See Note 3
SYNC, SCL, SDA, SALERT,
GCB, PG
July 2019
© Flex
PMBus configurable
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
7
Specification
Reference
C 1/28701-BMR 464 Rev.B
PMBus configurable
See Note 4
PMBus configurable
See Note 3
Number of products in a current sharing group
Monitoring accuracy
Rev
2014-05-02
Conditions
OCP threshold
OCP threshold range
Protection delay,
Protection delay range
Fault response
OTP threshold
OTP threshold range
OTP hysteresis
OTP hysteresis range
Fault response
4 (21)
No.
110
-100
ms
µs
%
200
100
±100
µA
mV
mV
-1
1
%
-2
2
%
Max 2 x READ_IOUT monitoring accuracy
4
7
A
3
1
%
%
±2.5
A
±4
A
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
5 (21)
No.
Checked
BMR46
series(Ksenia
PoL Regulators
EAB/FJB/GM
Harrisen)
(MICRF)
Input 4.5-14 V, Output up to 50 A / 165 W
2/1301-BMR 464 Uen
Technical
Date
2014-05-02
Rev
Specification
Reference
C 1/28701-BMR 464 Rev.B
July 2019
© Flex
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 8: See section Over Temperature Protection (OTP).
Note 9: See section External Capacitors.
Note 10: See section Initialization Procedure.
Note 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 13: Time for reaching 100% of nominal Vout.
Note 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations.
Note 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms, see AN307 for details.
Note 17: For steady state operation above 1.05 x 3.3 V, please contact your local Flex sales representative.
Note 18: A minimum load current is not required if Low Power mode is used (monitoring disabled).
Note 19: Please check with your local Flex Sales representative if you intend to adjust the frequency exceeds 320 KHz ±10%.
8
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
6 (21)
No.
EAB/FJB/GM QLAANDR
2/1301-BMR 464 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
9
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Efficiency and Power Dissipation
BMR 464 0002, BMR 464 1002
Efficiency vs. Output Current, VI = 5 V
Power Dissipation vs. Output Current, VI = 5 V
[W]
8
[%]
100
95
6
90
0.6 V
85
0.6 V
1.0 V
1.8 V
80
75
4
1.0 V
2
1.8 V
3.3 V
0
8
16
24
32
3.3 V
0
40 [A]
0
8
16
24
32
40 [A]
Efficiency vs. load current and output voltage:
TP1 = +25 °C, VI=5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current, VI = 12 V
Power Dissipation vs. Output Current, VI = 12 V
[%]
[W]
100
8
95
6
90
0.6 V
85
1.8 V
80
75
4
0.6 V
1.0 V
1.0 V
2
1.8 V
3.3 V
0
8
16
24
32
3.3 V
0
40 [A]
0
8
16
24
32
Efficiency vs. load current and output voltage at
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current and
Switching Frequency
Power Dissipation vs. Output Current and
Switching frequency
[W]
8
[%]
95
90
200
kHz
85
320
kHz
80
480
kHz
75
640
kHz
70
40 [A]
8
16
24
32
Efficiency vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Default configuration except changed frequency
40 [A]
320
kHz
4
480
kHz
2
0
0
200
kHz
6
640
kHz
0
8
16
24
32
Dissipated power vs. load current and switch frequency at
TP1 = +25 °C. VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Default configuration except changed frequency
40 [A]
Ericsson Internal
PRODUCT SPECIFICATION
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7 (21)
No.
EAB/FJB/GM QLAANDR
2/1301-BMR 464 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Load Transient
BMR 464 0002, BMR 464 1002
Load Transient vs. External Capacitance, VO = 1.0 V
Load Transient vs. External Capacitance, VO = 3.3 V
[mV]
[mV]
250
250
200
Default
PID/NLR
200
Default
PID/NLR
150
Opt. PID, No
NLR
150
Opt. PID, No
NLR
100
Default PID,
Opt. NLR
100
Default PID,
Opt. NLR
Opt. PID/NLR
50
0
0
1
2
3
10
4
0
5 [mF]
Opt. PID/NLR
50
0
1
2
3
4
5 [mF]
Load transient peak voltage deviation vs. external capacitance.
Step-change (10-30-10 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step-change (10-30-10 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 3.3 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient vs. Switch Frequency
Output Load Transient Response, Default PID/NLR
[mV]
300
Default
PID/NLR
250
Opt. PID,
No NLR
200
150
Default PID,
Opt. NLR
100
Opt.
PID/NLR
50
200
300
400
500
600
[kHz]
Load transient peak voltage deviation vs. frequency.
Step-change (10-30-10 A).
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Note: In the load transient graphs, the worst-case scenario (load step 30-10 A) has been
considered.
Output voltage response to load
current step-change (10-30-10 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz,
CO = 470 µF/10 mΩ
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (10 A/div.).
Time scale: (0.1 ms/div.).
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
8 (21)
No.
EAB/FJB/GM QLAANDR
2/1301-BMR 464 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Current Characteristic
BMR 464 0002, BMR 464 1002
Output Current Derating, VO = 0.6 V
Output Current Derating, VO = 1.0 V
[A]
[A]
40
40
3.0 m/s
30
3.0 m/s
30
2.0 m/s
2.0 m/s
20
1.0 m/s
1.0 m/s
20
0.5 m/s
0.5 m/s
10
0
Nat. Conv.
10
0
40
60
80
100
120
[°C]
Nat. Conv.
40
60
80
100
120
[°C]
Available load current vs. ambient air temperature and airflow at
VO = 0.6 V, VI = 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
VO = 1.0 V, VI = 12 V. See Thermal Consideration section.
Output Current Derating, VO = 1.8 V
Output Current Derating, VO = 3.3 V
[A]
[A]
40
40
3.0 m/s
30
3.0 m/s
30
2.0 m/s
20
1.0 m/s
2.0 m/s
20
1.0 m/s
0.5 m/s
10
0
Nat. Conv.
40
60
80
11
Technical
Specification
Reference
Date
100
0.5 m/s
10
0
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 1.8 V, VI = 12 V. See Thermal Consideration section.
Nat. Conv.
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 3.3 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteristics, VO = 1.0 V
Current Limit Characteristics, VO = 3.3 V
[V]
[V]
1,2
4,0
0,9
3,0
VI = 4.5, 5.0 V
4.5 V
VI = 12, 14 V
VI = 4.5, 5.0 V
0,6
5.0 V
12 V
5.0 V
12 V
14 V
0,3
0,0
4.5 V
VI = 12, 14 V
2,0
14 V
1,0
40
42
44
46
48
50 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 1.0 V.
Note: Output enters hiccup mode at current limit.
0,0
40
42
44
46
48
50 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 3.3 V.
Note: Output enters hiccup mode at current limit.
Ericssson Internal
PRO
ODUCT SPEC
CIFICATION
N
Pre
epared (also subject responsible if other)
9 (2
21)
No.
EA
AB/FJB/GM QLAANDR
2/1301-BMR 464
4 Uen
Approved
Checked
EA
AB/FJB/GM
(Ksenia
risen)
(MICRF
F)
BMR46
series
PoL Har
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
12
Technical
Specification
Reference
R
Date
Rev
2014
4-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Ty
ypical Chara
acteristics
Output Voltag
ge
BMR
R 464 0002, BMR
B
464 10
002
Ou
utput Ripple & Noise, VO = 1.0 V
Outp
put Ripple & Noise, VO = 3.3
3 V
Ou
utput voltage ripple
e at: TP1 = +25 °C, Trace: output vo
oltage (10 mV/div..).
VI = 12 V, CO = 470 µF/10 mΩ
Time scale: (2 µs/div.).
IO = 40 A
20 MHz bandwidth
Outpu
ut voltage ripple att: TP1 = +25 °C, T
Trace: output volttage (10 mV/div.).
VI = 12 V, CO = 470 µF//10 mΩ
T
Time
scale: (2 µs//div.).
4 A
IO = 40
20 MHz bandwidth
Ou
utput Ripple v
vs. Input Volttage
Outp
put Ripple vs
s. Frequency
[mVpk-pk]
[mV
Vpk-pk]
40
4
100
80
30
3
0.6 V
1.0 V
20
2
1.8 V
1.0 V
1.8 V
40
3.3 V
10
1
0
0.6 V
60
3.3 V
20
5
9
7
11
0
[V]
13
3
2
200
250
300
350
400
45
50
500
550
600 [kHz]
Ou
utput voltage ripple
e Vpk-pk at: TP1 = +25°C, CO = 470 µF
F/10 mΩ, IO = 40 A.
A
Outpu
ut voltage ripple Vpk-pk at: TP1 = +25°°C, VI = 12 V, CO = 470 µF/10 mΩ,
IO = 40
4 A. Default configuration except ch
hanged frequencyy.
Ou
utput Ripple v
vs. External Capacitance
C
Load
d regulation, VO = 1.0 V
[mV]
[V]
40
4
1,01
10
30
3
0.6 V
1.0 V
20
2
1.8 V
3.3 V
10
1
0
0
1
2
3
4
5 [mF]
Outtput voltage ripple Vpk-pk at: TP1 = +2
25 °C, VI = 12 V, IO = 40 A.
Parallel coupling of ca
apacitors with 470
0 µF/10 mΩ,
1,00
05
4.5 V
5.0 V
1,00
00
12 V
14 V
0,99
95
0,99
90
0
8
16
24
32
40
0 [A]
Load regulation at Vo = 1.0 V at: TP1 = +2
25 °C, CO = 470 µF
F/10 mΩ
Ericsson Internal
PRODUCT SPECIFICATION
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No.
EAB/FJB/GM QLAANDR
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2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Typical Characteristics
Start-up and shut-down
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
13
July 2019
© Flex
Shut-down by input source
Top trace: output voltage (0.5 V/div.).
Bottom trace: input voltage (5 V/div.).
Time scale: (20 ms/div.).
Start-up by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
Technical
Specification
Reference
Date
BMR 464 0002, BMR 464 1002
Start-up by input source
Start-up enabled by connecting VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
10 (21)
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
Top trace: output voltage (0.5 V/div).
Bottom trace: input voltage (5 V/div.).
Time scale: (2 ms/div.).
Shut-down by CTRL signal
Top trace: output voltage (0.5 V/div.).
Bottom trace: CTRL signal (5 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
Top trace: output voltage (0.5 V/div).
Bottom trace: CTRL signal (5 V/div.).
Time scale: (2 ms/div.).
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
11 (21)
No.
2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
14
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Electrical Specification
BMR 464 2002 (SIP)
TP1 = -30 to +95 °C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0259/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage rise time
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
margining
Output voltage set-point resolution
Output voltage accuracy
VO
Load regulation; IO = 0 - 100%
VOac
Output ripple & noise
CO = 470 μF (minimum external
capacitance). See Note 11
IO
Output current
IS
Static input current at max IO
Ilim
Current limit threshold
Short circuit
current
RMS, hiccup mode,
See Note 3
50% of max IO
η
max
Unit
2.4
V/ms
0.60
Efficiency
max IO
Pd
Power dissipation at max IO
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
typ
3.3
V
V
0.54
3.63
V
1.2
See Note 17
±0.025
Including line, load, temp.
See Note 14
Current sharing operation
See Note 15
-1
-2
Internal resistance +S/-S to VOUT/GND
Line regulation
Isc
min
monotonic
1
%
2
%
4.7
2
2
2
2
2
2
2
2
20
25
30
45
VO = 0.6 V
VO = 1.0 V
VO = 1.8V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
See Note 18
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
% FS
0.001
Ω
mV
mV
mVp-p
40
2.46
3.81
6.51
11.61
42
A
52
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
9
8
8
6
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
85.8
90.5
93.7
95.5
81.4
87.5
92.1
94.7
5.48
5.70
6.12
7.32
0.90
0.90
1.10
1.70
A
A
A
%
%
W
W
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
2/1301-BMR 464 Uen
Checked
EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
PCTRL
Ci
Co
COUT
Vtr1
ttr1
fs
Input standby
power
Internal input capacitance
Internal output capacitance
Total external output capacitance
ESR range of capacitors
(per single capacitor)
Load transient
peak voltage
deviation
(H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Load transient
recovery time,
Note 5
(H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Switching frequency
Switching frequency range, see Note 19
Switching frequency set-point accuracy
Control Circuit PWM Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Input Under Voltage
Lockout,
UVLO
Input Over Voltage
Protection,
IOVP
Power Good, PG,
See Note 2
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVLO threshold
UVLO threshold range
Set point accuracy
UVLO hysteresis
UVLO hysteresis range
Delay
Fault response
IOVP threshold
IOVP threshold range
Set point accuracy
IOVP hysteresis
IOVP hysteresis range
Delay
Fault response
PG threshold
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
Fault response
15
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
Conditions
Turned off with
CTRL-pin
12 (21)
No.
July 2019
© Flex
min
Default configuration:
Monitoring enabled,
Precise timing enabled
typ
max
Unit
mW
170
140
400
See Note 9
470
30 000
μF
μF
μF
See Note 9
5
30
mΩ
VO = 0.6 V
240
VO = 1.0 V
240
VO = 1.8 V
220
VO = 3.3 V
200
VO = 0.6 V
120
VO = 1.0 V
100
VO = 1.8 V
80
VO = 3.3 V
40
μs
320
200-640
PMBus configurable
External clock source
mV
-5
5
150
-13
5
95
13
3.85
3.85-14
PMBus configurable
-150
150
0.35
0-10.15
PMBus configurable
2.5
See Note 3
Automatic restart, 70 ms
16
4.2-16
PMBus configurable
-150
PMBus configurable
150
1
0-11.8
2.5
See Note 3
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
See Note 3
Automatic restart, 70 ms
90
5
10
0-500
85
0-100
5
115
100-115
25
5-60
Automatic restart, 70 ms
kHz
kHz
%
%
ns
%
V
V
mV
V
V
μs
V
V
mV
V
V
μs
% VO
% VO
ms
s
% VO
% VO
% VO
% VO
% VO
μs
μs
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR46
series
PoL Harrisen)
Regulators
EAB/FJB/GM
(Ksenia
(MICRF)
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
Over Current
Protection,
OCP
Over Temperature
Protection,
OTP at P1
See Note 8
VIL
VIH
IIL
VOL
VOH
IOL
IOH
fSMB
tset
thold
tfree
Cp
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic output low signal level
Logic output high signal level
Logic output low sink current
Logic output high source current
SMBus Operating frequency
Setup time, SMBus
Hold time, SMBus
Bus free time, SMBus
Internal capacitance on logic pins
Initialization time
Delay duration
Delay duration range
Output Voltage
Delay Time
See Note 6
Output Voltage
Ramp Time
See Note 13
2/1301-BMR 464 Uen
Technical
Date
Rev
2014-05-02
C
Conditions
OCP threshold
OCP threshold range
Protection delay,
Protection delay range
Fault response
OTP threshold
OTP threshold range
OTP hysteresis
OTP hysteresis range
Fault response
Delay accuracy
turn-on
Delay accuracy
turn-off
Ramp duration
Ramp duration range
Ramp time accuracy
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy (VO - VVTRK)
VTRK Regulation Accuracy (VO - VVTRK)
Current difference between products in a current
sharing group
READ_IOUT vs IO
typ
See Note 1
See Note 1
See Note 1
max
48
0-48
32
1-32
Automatic restart, 70 ms
120
-40…+120
15
0-160
Automatic restart, 240 ms
C
C
C
C
0.8
0.6
0.4
2.25
4
2
100
10
250
300
2
10
See Note 10
See Note 16
PMBus configurable
Default configuration:
CTRL controlled
Precise timing enabled
PMBus controlled
Precise timing disabled
Current sharing operation
35
10
2-500000
Current sharing operation
VVTRK = 5.5 V
100% tracking, see Note 7
Current sharing operation
2 phases, 100% tracking
VO = 1.0 V, 10 ms ramp
100% Tracking
Current sharing operation
100% Tracking
Steady state operation
Ramp-up
IO = 0-40 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 1.0 V
IO = 0-40 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 0.6-3.3 V
V
V
mA
V
V
mA
mA
kHz
ns
ns
ms
pF
ms
ms
±0.25
ms
-0.25/+4
ms
-0.25/+4
ms
10
0-200
100
20
PMBus configurable
Unit
A
A
Tsw
Tsw
2
CTRL
READ_VIN vs VI
READ_VOUT vs VO
READ_IOUT vs IO
min
PMBus configurable
See Note 3
SYNC, SCL, SDA, SALERT,
GCB, PG
July 2019
© Flex
PMBus configurable
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
16
Specification
Reference
1/28701-BMR 464 Rev.B
PMBus configurable
See Note 4
PMBus configurable
See Note 3
Number of products in a current sharing group
Monitoring accuracy
13 (21)
No.
110
-100
ms
µs
%
200
100
±100
µA
mV
mV
-1
1
%
-2
2
%
Max 2 x READ_IOUT monitoring accuracy
4
7
A
3
1
%
%
±2.5
A
±4
A
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR46
series
PoL Harrisen)
Regulators
EAB/FJB/GM
(Ksenia
(MICRF)
Input 4.5-14 V, Output up to 50 A / 165 W
2/1301-BMR 464 Uen
Technical
Date
Rev
2014-05-02
C
14 (21)
Specification
Reference
1/28701-BMR 464 Rev.B
July 2019
© Flex
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 8: See section Over Temperature Protection (OTP).
Note 9: See section External Capacitors.
Note 10: See section Initialization Procedure.
Note 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 13: Time for reaching 100% of nominal Vout.
Note 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations.
Note 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms, see AN307 for details.
Note 17: For steady state operation above 1.05 x 3.3 V, please contact your local Flex sales representative.
Note 18: A minimum load current is not required if Low Power mode is used (monitoring disabled).
Note 19: Please check with your local Flex Sales representative if you intend to adjust the frequency exceeds 320 KHz ±10%.
17
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EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
18
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Efficiency and Power Dissipation
BMR 464 2002 (SIP)
Efficiency vs. Output Current, VI = 5 V
Power Dissipation vs. Output Current, VI = 5 V
[W]
8
[%]
100
95
6
90
0.6 V
85
0.6 V
1.0 V
1.8 V
80
75
4
1.0 V
2
1.8 V
3.3 V
0
8
16
24
32
3.3 V
0
40 [A]
0
8
16
24
32
40 [A]
Efficiency vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25°C. VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current, VI = 12 V
Power Dissipation vs. Output Current, VI = 12 V
[W]
8
[%]
100
95
6
90
0.6 V
85
1.0 V
1.8 V
80
75
4
0.6 V
1.0 V
2
1.8 V
3.3 V
3.3 V
0
0
8
16
24
32
40 [A]
0
8
16
24
32
Efficiency vs. load current and output voltage at
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current and
Switching Frequency
Power Dissipation vs. Output Current and
Switching frequency
[%]
[W]
8
95
90
200
kHz
85
320
kHz
80
480
kHz
75
640
kHz
70
40 [A]
0
8
16
24
32
Efficiency vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Default configuration except changed frequency
40 [A]
200
kHz
6
320
kHz
4
480
kHz
2
0
640
kHz
0
8
16
24
32
Dissipated power vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Default configuration except changed frequency
40 [A]
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BMR46
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
Load Transient vs. External Capacitance, VO = 3.3 V
[mV]
[mV]
300
300
Default
PID/NLR
250
Opt. PID, No
NLR
200
150
Default PID,
Opt. NLR
100
Opt. PID/NLR
50
1
2
July 2019
BMR 464 2002 (SIP)
Load Transient vs. External Capacitance, VO = 1.0 V
0
19
© Flex
Typical Characteristics
Load Transient
0
16 (21)
No.
3
Opt. PID, No
NLR
200
150
Default PID,
Opt. NLR
100
Opt. PID/NLR
50
0
4 [mF]
Default
PID/NLR
250
0
1
2
3
4 [mF]
Load transient peak voltage deviation vs. external capacitance.
Step-change (10-30-10 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step-change (10-30-10 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 3.3 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient vs. Switch Frequency
Output Load Transient Response, Default PID/NLR
[mV]
400
Default
PID/NLR
350
300
Opt. PID,
No NLR
250
200
Default PID,
Opt. NLR
150
Opt.
PID/NLR
100
50
200
300
400
500
600 [kHz]
Load transient peak voltage deviation vs. frequency.
Step-change (10-30-10 A).
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Note: In the load transient graphs, the worst-case scenario (load step 30-10 A) has been
considered.
Output voltage response to load
current step-change (10-30-10 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz,
CO = 470 µF/10 mΩ
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (10 A/div.).
Time scale: (0.1 ms/div.).
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EAB/FJB/GM
(Ksenia
(MICRF)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Current Characteristic
BMR 464 2002 (SIP)
Output Current Derating, VO = 0.6 V
Output Current Derating, VO = 1.0 V
[A]
[A]
40
40
3.0 m/s
30
3.0 m/s
30
2.0 m/s
2.0 m/s
1.0 m/s
20
1.0 m/s
20
0.5 m/s
0.5 m/s
10
0
Nat. Conv.
40
60
80
100
120
10
0
[°C]
Nat. Conv.
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 0.6 V, VI = 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
VO = 1.0 V, VI = 12 V. See Thermal Consideration section.
Output Current Derating, VO = 1.8 V
Output Current Derating, VO = 3.3 V
[A]
[A]
40
40
3.0 m/s
30
3.0 m/s
30
2.0 m/s
1.0 m/s
20
2.0 m/s
20
1.0 m/s
0.5 m/s
10
0
Nat. Conv.
40
60
80
20
Technical
Specification
Reference
Date
100
120
0.5 m/s
10
0
[°C]
Available load current vs. ambient air temperature and airflow at
VO = 1.8 V, VI = 12 V. See Thermal Consideration section.
Nat. Conv.
40
60
80
100
120
[°C]
Available load current vs. ambient air temperature and airflow at
VO = 3.3 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteristics, VO = 1.0 V
Current Limit Characteristics, VO = 3.3 V
[V]
[V]
1,2
4,0
0,9
3,0
VI = 4.5, 5.0 V
4.5 V
VI = 12, 14 V
VI = 4.5, 5.0 V
0,6
5.0 V
12 V
14 V
0,3
0,0
40
42
44
46
48
50 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 1.0 V.
Note: Output enters hiccup mode at current limit.
4.5 V
VI = 12, 14 V
2,0
5.0 V
12 V
14 V
1,0
0,0
40
42
44
46
48
50 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 3.3 V.
Note: Output enters hiccup mode at current limit.
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No.
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BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
21
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Voltage
BMR 464 2002 (SIP)
Output Ripple & Noise, VO = 1.0 V
Output Ripple & Noise, VO = 3.3 V
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 40 A
20 MHz bandwidth
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 40 A
20 MHz bandwidth
Output Ripple vs. Input Voltage
Output Ripple vs. Frequency
[mVpk-pk]
[mVpk-pk]
50
100
40
80
0.6 V
30
1.0 V
1.8 V
20
0.6 V
60
1.0 V
1.8 V
40
3.3 V
0
3.3 V
20
10
5
7
9
11
0
[V]
13
200
250
300
350
400
450
500
550
600 [kHz]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, CO = 470 µF/10 mΩ, IO = 40 A.
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V, CO = 470 µF/10 mΩ,
IO = 40 A. Default configuration except changed frequency.
Output Ripple vs. External Capacitance
Load regulation, VO=1.0V
[mV]
[V]
50
1,010
40
0.6V
30
1.0 V
1.8 V
20
3.3 V
10
0
0
1
2
3
4 [mF]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V, IO = 40 A.
Parallel coupling of capacitors with 470 µF/10 mΩ
1,005
4.5V
5V
1,000
12 V
14 V
0,995
0,990
0
8
16
24
32
40 [A]
Load regulation at Vo = 1.0 V at: TP1 = +25 °C, CO = 470 µF/10 mΩ
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EAB/FJB/GM
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BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
BMR 464 2002 (SIP)
Start-up by input source
Shut-down by input source
Top trace: output voltage (0.5 V/div.).
Bottom trace: input voltage (5 V/div.).
Time scale: (20 ms/div.).
Start-up by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
22
© Flex
Typical Characteristics
Start-up and shut-down
Start-up enabled by connecting VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
19 (21)
No.
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
Top trace: output voltage (0.5 V/div).
Bottom trace: input voltage (5 V/div.).
Time scale: (2 ms/div.).
Shut-down by CTRL signal
Top trace: output voltage (0.5 V/div.).
Bottom trace: CTRL signal (5 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 40 A
Top trace: output voltage (0.5 V/div).
Bottom trace: CTRL signal (5 V/div.).
Time scale: (2 ms/div.).
Ericsson Internal
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No.
EHOSMIR
2/1301-BMR 464 0008 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
23
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Electrical Specification
BMR 464 0008, BMR 464 1008
TP1 = -30 to +95 °C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0498/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage rise time
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
margining
Output voltage set-point resolution
Output voltage accuracy
VO
Load regulation; IO = 0 - 100%
VOac
Output ripple & noise
CO = 470 μF (minimum external
capacitance). See Note 11
IO
Output current
IS
Static input current at max IO
Ilim
Current limit threshold
Short circuit
current
RMS, hiccup mode,
See Note 3
50% of max IO
η
max
Unit
2.4
V/ms
0.60
Efficiency
max IO
Pd
Power dissipation at max IO
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
typ
3.3
V
V
0.54
3.63
V
1.2
See Note 17
±0.025
Including line, load, temp.
See Note 14
Current sharing operation
See Note 15
1
%
-2
2
%
47
2
2
2
3
2
2
2
2
20
25
30
35
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
See Note 18
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
% FS
-1
Internal resistance +S/-S to VOUT/GND
Line regulation
Isc
min
monotonic
0.001
Ω
mV
mV
mVp-p
50
3.10
4.80
8.19
14.53
52
A
65
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
11
9
7
6
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
85.6
90.4
93.7
95.7
80.5
86.9
91.6
94.6
7.25
7.54
8.28
9.36
0.90
0.90
1.10
1.67
A
A
A
%
%
W
W
Ericsson Internal
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2/1301-BMR 464 0008 Uen
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EAB/FJB/GM
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(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
PCTRL
Ci
Co
COUT
Vtr1
ttr1
fs
Input standby
power
Turned off with
CTRL-pin
Load transient
peak voltage
deviation
(L to H/H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Load transient
recovery time,
Note 5
(L to H/H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Switching frequency
Switching frequency range, see Note 20
Switching frequency set-point accuracy
Control Circuit PWM Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Input Over Voltage
Protection,
IOVP
Power Good, PG,
See Note 2
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVLO threshold
UVLO threshold range
Set point accuracy
UVLO hysteresis
UVLO hysteresis range
Delay
Fault response
IOVP threshold
IOVP threshold range
Set point accuracy
IOVP hysteresis
IOVP hysteresis range
Delay
Fault response
PG threshold
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
Fault response
24
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
Conditions
Internal input capacitance
Internal output capacitance
Total external output capacitance
ESR range of capacitors
(per single capacitor)
Input Under Voltage
Lockout,
UVLO
3 (20)
No.
July 2019
© Flex
min
Default configuration:
Monitoring enabled,
Precise timing enabled
typ
max
Unit
mW
170
140
400
See Note 9
470
30 000
μF
μF
μF
See Note 9
5
30
mΩ
VO = 0.6 V
79 / 256
VO = 1.0 V
127 / 298
VO = 1.8 V
144 / 324
VO = 3.3 V
210 / 327
VO = 0.6 V
60 / 100
VO = 1.0 V
100 / 100
VO = 1.8 V
100 / 100
VO = 3.3 V
100 / 100
-5
5
150
-13
5
95
13
3.85
3.85-14
PMBus configurable
-150
150
0.35
0-10.15
2.5
Automatic restart, 70 ms
16
4.2-16
PMBus configurable
See Note 3
PMBus configurable
-150
PMBus configurable
See Note 3
See Note 19
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
See Note 3
μs
320
200-640
PMBus configurable
External clock source
mV
150
1
0-11.8
2.5
Automatic restart, 70 ms
90
5
Direct after DLC
0-500
85
0-100
5
115
100-115
25
5-60
Automatic restart, 70 ms
kHz
kHz
%
%
ns
%
V
V
mV
V
V
μs
V
V
mV
V
V
μs
% VO
% VO
s
% VO
% VO
% VO
% VO
% VO
μs
μs
Ericsson Internal
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BMR46
series(Ksenia
PoL Regulators
EAB/FJB/GM
Harrisen)
(EKRIROB)
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
Over Current
Protection,
OCP
Over Temperature
Protection,
OTP at P2
See Note 8
VIL
VIH
IIL
VOL
VOH
IOL
IOH
fSMB
tset
thold
tfree
Cp
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic output low signal level
Logic output high signal level
Logic output low sink current
Logic output high source current
SMBus Operating frequency
Setup time, SMBus
Hold time, SMBus
Bus free time, SMBus
Internal capacitance on logic pins
Initialization time
Output Voltage
Delay Time
See Note 6
Output Voltage
Ramp Time
See Note 13
2/1301-BMR 464 0008
Uen
Technical
Date
Delay duration
Delay duration range
Delay accuracy
turn-on
Delay accuracy
turn-off
Ramp duration
Ramp duration range
Ramp time accuracy
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy (VO - VVTRK)
VTRK Regulation Accuracy (VO - VVTRK)
Current difference between products in a current
sharing group
READ_IOUT vs IO
typ
See Note 1
See Note 1
See Note 1
max
62
0-62
32
1-32
Automatic restart, 70 ms
120
-40…+125
25
0-165
Automatic restart, 240 ms
C
C
C
C
0.8
0.6
0.4
2.25
4
2
100
10
250
300
2
10
See Note 10
See Note 16
PMBus configurable
40
10
5-500000
Current sharing operation
VVTRK = 5.5 V
100% tracking, see Note 7
Current sharing operation
2 phases, 100% tracking
VO = 1.0 V, 10 ms ramp
100% Tracking
Current sharing operation
100% Tracking
Steady state operation
Ramp-up
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 1.0 V
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 0.6-3.3 V
V
V
mA
V
V
mA
mA
kHz
ns
ns
ms
pF
ms
ms
-0.25/+4
ms
-0.25/+4
ms
10
0-200
100
20
PMBus configurable
Unit
A
A
Tsw
Tsw
2
CTRL
READ_VIN vs VI
READ_VOUT vs VO
READ_IOUT vs IO
min
PMBus configurable
See Note 3
SYNC, SCL, SDA, SALERT,
GCB, PG
July 2019
© Flex
PMBus configurable
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
25
Specification
Reference
C 1/28701-BMR 464 Rev.B
PMBus configurable
See Note 4
PMBus configurable
See Note 3
Number of products in a current sharing group
Monitoring accuracy
Rev
2014-05-02
Conditions
OCP threshold
OCP threshold range
Protection delay,
Protection delay range
Fault response
OTP threshold
OTP threshold range
OTP hysteresis
OTP hysteresis range
Fault response
4 (20)
No.
110
-100
ms
µs
%
200
100
±100
µA
mV
mV
-1
1
%
-2
2
%
Max 2 x READ_IOUT monitoring accuracy
4
7
A
3
1
%
%
±3.0
A
±5.0
A
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5 (20)
No.
Checked
BMR46
series(Ksenia
PoL Regulators
EAB/FJB/GM
Harrisen)
(EKRIROB)
Input 4.5-14 V, Output up to 50 A / 165 W
2/1301-BMR 464 0008
Uen
Technical
Date
2014-05-02
Rev
Specification
Reference
C 1/28701-BMR 464 Rev.B
July 2019
© Flex
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 8: See section Over Temperature Protection (OTP).
Note 9: See section External Capacitors.
Note 10: See section Initialization Procedure.
Note 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 13: Time for reaching 100% of nominal Vout.
Note 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations.
Note 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms, see AN307 for details.
Note 17: For steady state operation above 1.05 x 3.3 V, please contact your local Flex sales representative.
Note 18: A minimum load current is not required if Low Power mode is used (monitoring disabled).
Note 19: See sections Dynamic Loop Compensation and Power Good.
Note 20: Please check with your local Flex Sales representative if you intend to adjust the frequency exceeds 320 KHz ±10%.
26
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Rev
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C1/28701-BMR 464 Rev.B
July 2019
© Flex
BMR 464 0008, BMR 464 1008
Efficiency vs. Output Current, VI = 5 V
Power Dissipation vs. Output Current, VI = 5 V
[%]
[W]
100
12
95
10
8
90
0.6 V
1.0 V
85
80
0
10
20
30
40
0.6 V
6
1.0 V
1.8 V
4
1.8 V
3.3 V
2
3.3 V
0
50 [A]
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current, VI = 12 V
Power Dissipation vs. Output Current, VI = 12 V
[%]
[W]
100
12
10
95
8
90
0.6 V
1.0 V
85
80
75
27
Technical
Specification
Reference
Date
Typical Characteristics
Efficiency and Power Dissipation
75
6 (20)
No.
0
10
20
30
40
0.6 V
6
1.0 V
1.8 V
4
1.8 V
3.3 V
2
3.3 V
0
50 [A]
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage at
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current and
Switching Frequency
Power Dissipation vs. Output Current and
Switching frequency
[%]
[W]
95
12
90
200
kHz
85
10
200
kHz
8
320
kHz
6
320
kHz
80
480
kHz
4
480
kHz
75
640
kHz
2
640
kHz
70
0
10
20
30
40
Efficiency vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
50 [A]
0
0
10
20
30
40
50 [A]
Dissipated power vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Load Transient
BMR 464 0008, BMR 464 1008
Load Transient vs. External Capacitance, VO = 1.0 V
[mV]
500
Universal PID,
No NLR
Load Transient vs. External Capacitance, VO = 3.3 V
[mV]
500
Universal PID,
No NLR
DLC,
No NLR
400
300
Universal PID,
Default NLR
300
Universal PID,
Default NLR
200
DLC,
Default NLR
200
DLC,
Default NLR
100
Universal PID,
Opt. NLR
100
Universal PID,
Opt. NLR
400
DLC,
Opt. NLR
0
0
1
2
3
4
5 [mF]
0
DLC,
No NLR
DLC,
Opt. NLR
0
1
2
3
4
5 [mF]
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 3.3 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient vs. Switch Frequency
Output Load Transient Response, Default Configuration
[mV]
600
Universal PID,
No NLR
500
DLC,
No NLR
400
Universal PID,
Default NLR
300
DLC,
Default NLR
200
Universal PID,
Opt. NLR
100
0
DLC,
Opt. NLR
200
300
400
28
500
600 [kHz]
Load transient peak voltage deviation vs. frequency.
Step-change (12.5-37.5-12.5 A).
TP1 = +25 °C. VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Note 1: For Universal PID, see section Dynamic Loop Compensation (DLC).
Note 2: In the load transient graphs, the worst-case scenario (load step 37.5-12.5 A) has been
considered.
Output voltage response to load current
Step-change (12.5-37.5-12.5 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz
CO = 470 µF/10 mΩ
Top trace: output voltage (200
mV/div.).
Bottom trace: load current (10
A/div.).
Time scale: (0.1 ms/div.).
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
29
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Current Characteristic
BMR 464 0008, BMR 464 1008
Output Current Derating, VO = 0.6 V
Output Current Derating, VO = 1.0 V
[A]
[A]
50
50
3.0 m/s
40
2.0 m/s
3.0 m/s
40
2.0 m/s
30
1.0 m/s
30
1.0 m/s
20
0.5 m/s
20
0.5 m/s
Nat. Conv.
10
0
20
40
60
80
100
0
120 [°C]
Nat. Conv.
10
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 0.6 V, VI = 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
VO = 1.0 V, VI = 12 V. See Thermal Consideration section.
Output Current Derating, VO = 1.8 V
Output Current Derating, VO = 3.3 V
[A]
[A]
50
50
3.0 m/s
3.0 m/s
40
2.0 m/s
40
30
1.0 m/s
30
20
0.5 m/s
20
Nat. Conv.
10
10
0
0
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 1.8 V, VI = 12 V. See Thermal Consideration section.
2.0 m/s
Nat. Conv.
20
40
60
80
100
120 [°C]
Current Limit Characteristics, VO = 3.3 V
[V]
[V]
1,2
4,0
VI = 4.5, 5 .0V
VI = 5.0, 12 V
0,9
3,0
4.5 V
4.5 V
5.0 V
0,6
14 V
0,3
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 1.0 V.
Note: Output enters hiccup mode at current limit.
5.0 V
2,0
12 V
VI = 4.5,14 V
50
0.5 m/s
Available load current vs. ambient air temperature and airflow at
VO = 3.3 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteristics, VO = 1.0 V
0,0
1.0 m/s
12 V
VI = 12, 14 V
14 V
1,0
0,0
50
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 3.3 V.
Note: Output enters hiccup mode at current limit.
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
30
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Voltage
BMR 464 0008, BMR 464 1008
Output Ripple & Noise, VO = 1.0 V
Output Ripple & Noise, VO = 3.3 V
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 50 A
20 MHz bandwidth
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 50 A
20 MHz bandwidth
Output Ripple vs. Input Voltage
Output Ripple vs. Frequency
[mVpk-pk]
[mVpk-pk]
40
70
60
30
50
0.6 V
1.0 V
40
1.0 V
1.8 V
30
3.3 V
20
0.6 V
20
10
1.8 V
3.3 V
10
0
5
7
9
11
0
[V]
13
200
300
400
500
600
[kHz]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, CO = 470 µF/10 mΩ, IO = 50 A
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V, CO = 470 µF/10 mΩ,
IO = 50 A. Default configuration except changed frequency.
Output Ripple vs. External Capacitance
Load regulation, VO = 1.0 V
[mV]
[V]
40
1,010
30
0.6 V
1.0 V
20
1.8 V
3.3 V
10
0
0
1
2
3
4
5 [mF]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V. IO = 50 A.
Parallel coupling of capacitors with 470 µF/10 mΩ
1,005
4.5 V
5.0 V
1,000
12 V
14 V
0,995
0,990
0
5
10
15
20
25 [A]
Load regulation at VO = 1.0 V, TP1 = +25 °C, CO = 470 µF/10 mΩ
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BMR46
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Typical Characteristics
Start-up and shut-down
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
31
July 2019
© Flex
Shut-down by input source
Top trace: output voltage (0.5 V/div.).
Bottom trace: input voltage (5 V/div.).
Time scale: (20 ms/div.).
Start-up by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Technical
Specification
Reference
Date
BMR 464 0008, BMR 464 1008
Start-up by input source
Start-up enabled by connecting VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
10 (20)
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: output voltage (0.5 V/div.).
Bottom trace: input voltage (5 V/div.).
Time scale: (2 ms/div.).
Shut-down by CTRL signal
Top trace: output voltage (0.5 V/div.).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: output voltage (0.5 V/div).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (2 ms/div.).
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No.
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BMR46
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
32
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Electrical Specification
BMR 464 2008 (SIP)
TP1 = -30 to +95 °C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0499/001.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor types.
Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage rise time
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
margining
Output voltage set-point resolution
Output voltage accuracy
VO
Load regulation; IO = 0 - 100%
VOac
Output ripple & noise
CO = 470 μF (minimum external
capacitance). See Note 11
IO
Output current
IS
Static input current at max IO
Ilim
Current limit threshold
Short circuit
current
RMS, hiccup mode,
See Note 3
50% of max IO
η
max
Unit
2.4
V/ms
0.60
Efficiency
max IO
Pd
Power dissipation at max IO
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
typ
3.3
V
V
0.54
3.63
V
1.2
See Note 17
±0.025
Including line, load, temp.
See Note 14
Current sharing operation
See Note 15
-1
-2
Internal resistance +S/-S to VOUT/GND
Line regulation
Isc
min
monotonic
1
%
2
%
47
2
2
2
3
2
2
2
2
20
25
30
40
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
See Note 18
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
% FS
0.001
Ω
mV
mV
mVp-p
50
3.12
4.81
8.22
14.59
52
A
65
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
10
8
6
5
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
85.2
90.2
93.3
95.3
80.2
86.6
91.2
94.2
7.40
7.73
8.68
10.15
0.95
0.95
1.22
1.88
A
A
A
%
%
W
W
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BMR46
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Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
PCTRL
Ci
Co
COUT
Vtr1
ttr1
fs
Input standby
power
Turned off with
CTRL-pin
Load transient
peak voltage
deviation
(L to H/H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Load transient
recovery time,
Note 5
(L to H/H to L)
Load step
25-75-25% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Switching frequency
Switching frequency range, see Note 20
Switching frequency set-point accuracy
Control Circuit PWM Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Input Over Voltage
Protection,
IOVP
Power Good, PG,
See Note 2
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
UVLO threshold
UVLO threshold range
Set point accuracy
UVLO hysteresis
UVLO hysteresis range
Delay
Fault response
IOVP threshold
IOVP threshold range
Set point accuracy
IOVP hysteresis
IOVP hysteresis range
Delay
Fault response
PG threshold
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
Fault response
33
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
Conditions
Internal input capacitance
Internal output capacitance
Total external output capacitance
ESR range of capacitors
(per single capacitor)
Input Under Voltage
Lockout,
UVLO
12 (20)
No.
July 2019
© Flex
min
Default configuration:
Monitoring enabled,
Precise timing enabled
typ
max
Unit
mW
170
140
400
See Note 9
470
30 000
μF
μF
μF
See Note 9
5
30
mΩ
VO = 0.6 V
90 / 300
VO = 1.0 V
120 / 300
VO = 1.8 V
160 / 305
VO = 3.3 V
230 / 315
VO = 0.6 V
70 / 100
VO = 1.0 V
100 / 100
VO = 1.8 V
100 / 100
VO = 3.3 V
100 / 100
-5
5
150
-13
5
95
13
3.85
3.85-14
PMBus configurable
-150
150
0.35
0-10.15
2.5
Automatic restart, 70 ms
16
4.2-16
PMBus configurable
See Note 3
PMBus configurable
-150
PMBus configurable
See Note 3
See Note 19
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
See Note 3
μs
320
200-640
PMBus configurable
External clock source
mV
150
1
0-11.8
2.5
Automatic restart, 70 ms
90
5
Direct after DLC
0-500
85
0-100
5
115
100-115
25
5-60
Automatic restart, 70 ms
kHz
kHz
%
%
ns
%
V
V
mV
V
V
μs
V
V
mV
V
V
μs
% VO
% VO
ms
s
% VO
% VO
% VO
% VO
% VO
μs
μs
Ericsson Internal
PRODUCT SPECIFICATION
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Regulators
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Input 4.5-14 V, Output up to 50 A / 165 W
Characteristics
Over Current
Protection,
OCP
Over Temperature
Protection,
OTP at P2
See Note 8
VIL
VIH
IIL
VOL
VOH
IOL
IOH
fSMB
tset
thold
tfree
Cp
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic output low signal level
Logic output high signal level
Logic output low sink current
Logic output high source current
SMBus Operating frequency
Setup time, SMBus
Hold time, SMBus
Bus free time, SMBus
Internal capacitance on logic pins
Initialization time
Output Voltage
Delay Time
See Note 6
Output Voltage
Ramp Time
See Note 13
2/1301-BMR 464 0008
Uen
Technical
Date
Rev
2014-05-02
C
Conditions
OCP threshold
OCP threshold range
Protection delay,
Protection delay range
Fault response
OTP threshold
OTP threshold range
OTP hysteresis
OTP hysteresis range
Fault response
Delay duration
Delay duration range
Delay accuracy
turn-on
Delay accuracy
turn-off
Ramp duration
Ramp duration range
Ramp time accuracy
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy (VO - VVTRK)
VTRK Regulation Accuracy (VO - VVTRK)
Current difference between products in a current
sharing group
READ_IOUT vs IO
typ
See Note 1
See Note 1
See Note 1
max
60
0-60
32
1-32
Automatic restart, 70 ms
120
-40…+125
25
0-165
Automatic restart, 240 ms
C
C
C
C
0.8
0.6
0.4
2.25
4
2
100
10
250
300
2
10
See Note 10
See Note 16
PMBus configurable
40
10
5-500000
Current sharing operation
VVTRK = 5.5 V
100% tracking, see Note 7
Current sharing operation
2 phases, 100% tracking
VO = 1.0 V, 10 ms ramp
100% Tracking
Current sharing operation
100% Tracking
Steady state operation
Ramp-up
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 1.0 V
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 0.6-3.3 V
V
V
mA
V
V
mA
mA
kHz
ns
ns
ms
pF
ms
ms
-0.25/+4
ms
-0.25/+4
ms
10
0-200
100
20
PMBus configurable
Unit
A
A
Tsw
Tsw
2
CTRL
READ_VIN vs VI
READ_VOUT vs VO
READ_IOUT vs IO
min
PMBus configurable
See Note 3
SYNC, SCL, SDA, SALERT,
GCB, PG
July 2019
© Flex
PMBus configurable
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
34
Specification
Reference
1/28701-BMR 464 Rev.B
PMBus configurable
See Note 4
PMBus configurable
See Note 3
Number of products in a current sharing group
Monitoring accuracy
13 (20)
No.
110
-100
ms
µs
%
200
100
±100
µA
mV
mV
-1
1
%
-2
2
%
Max 2 x READ_IOUT monitoring accuracy
4
7
A
3
1
%
%
±3.0
A
±5.0
A
Ericsson Internal
PRODUCT SPECIFICATION
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Checked
BMR46
series
PoL Harrisen)
Regulators
EAB/FJB/GM
(Ksenia
(EKRIROB)
Input 4.5-14 V, Output up to 50 A / 165 W
2/1301-BMR 464 0008
Uen
Technical
Date
Rev
2014-05-02
C
14 (20)
Specification
Reference
1/28701-BMR 464 Rev.B
July 2019
© Flex
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 8: See section Over Temperature Protection (OTP).
Note 9: See section External Capacitors.
Note 10: See section Initialization Procedure.
Note 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 13: Time for reaching 100% of nominal Vout.
Note 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations.
Note 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms, see AN307 for details.
Note 17: For steady state operation above 1.05 x 3.3 V, please contact your local Flex sales representative.
Note 18: A minimum load current is not required if Low Power mode is used (monitoring disabled).
Note 19: See sections Dynamic Loop Compensation and Power Good.
Note 20: Please check with your local flex Sales representative if you intend to adjust the frequency exceed 320 KHz.
35
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(Ksenia
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BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
BMR 464 2008 (SIP)
Efficiency vs. Output Current, VI = 5 V
Power Dissipation vs. Output Current, VI = 5 V
[%]
[W]
100
12
10
95
8
90
0.6 V
1.0 V
85
80
0
10
20
30
40
0.6 V
6
1.0 V
1.8 V
4
1.8 V
3.3 V
2
3.3 V
0
50 [A]
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current, VI = 12 V
Power Dissipation vs. Output Current, VI = 12 V
[%]
[W]
100
12
10
95
8
90
0.6 V
1.0 V
85
80
75
36
Technical
Specification
Reference
Date
Typical Characteristics
Efficiency and Power Dissipation
75
15 (20)
No.
0
10
20
30
40
0.6 V
6
1.0 V
1.8 V
4
1.8 V
3.3 V
2
3.3 V
0
50 [A]
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage at
TP1 = +25 °C, VI=12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI=12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current and
Switching Frequency
Power Dissipation vs. Output Current and
Switching frequency
[%]
[W]
95
12
90
200
kHz
85
10
200
kHz
8
320
kHz
6
320
kHz
80
480
kHz
4
480
kHz
75
640
kHz
2
640
kHz
70
0
10
20
30
40
Efficiency vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
50 [A]
0
0
10
20
30
40
50 [A]
Dissipated power vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
Ericsson Internal
PRODUCT SPECIFICATION
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16 (20)
No.
EHOSMIR
2/1301-BMR 464 0008 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Load Transient
BMR 464 2008 (SIP)
Load Transient vs. External Capacitance, VO = 1.0 V
[mV]
500
Universal PID,
No NLR
400
Load Transient vs. External Capacitance, VO = 3.3 V
[mV]
500
Universal PID,
No NLR
DLC,
No NLR
400
300
Universal PID,
Default NLR
300
Universal PID,
Default NLR
200
DLC,
Default NLR
200
DLC,
Default NLR
100
Universal PID,
Opt. NLR
100
Universal PID,
Opt. NLR
DLC,
Opt. NLR
0
0
1
2
3
4
5 [mF]
0
DLC,
No NLR
DLC,
Opt. NLR
0
1
2
3
4
5 [mF]
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C. VI = 12 V, VO = 1.0 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C. VI = 12 V, VO = 3.3 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient vs. Switch Frequency
Output Load Transient Response, Default Configuration
[mV]
600
Universal PID,
No NLR
500
DLC,
No NLR
400
Universal PID,
Default NLR
300
DLC,
Default NLR
200
Universal PID,
Opt. NLR
100
0
DLC,
Opt. NLR
200
300
400
37
500
600 [kHz]
Load transient peak voltage deviation vs. frequency.
Step-change (12.5-37.5-12.5 A).
TP1 = +25 °C. VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ
Note 1: For Universal PID, see section Dynamic Loop Compensation (DLC).
Note 2: In these graphs, the worst-case scenario (load step 37.5-12.5 A) has been considered.
Output voltage response to load
Step-change (12.5-37.5-12.5 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz
CO = 470 µF/10 mΩ
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (10 A/div.).
Time scale: (0.1 ms/div.).
Ericsson Internal
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No.
EHOSMIR
2/1301-BMR 464 0008 Uen
Approved
Checked
EAB/FJB/GM
(Ksenia
(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
38
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Current Characteristic
BMR 464 2008 (SIP)
Output Current Derating, VO = 0.6 V
Output Current Derating, VO = 1.0 V
[A]
[A]
50
50
3.0 m/s
40
2.0 m/s
3.0 m/s
40
2.0 m/s
30
1.0 m/s
30
1.0 m/s
20
0.5 m/s
20
0.5 m/s
Nat. Conv.
10
0
20
40
60
80
100
0
120 [°C]
Nat. Conv.
10
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 0.6 V, VI = 12 V. See Thermal Consideration section.
Available load current vs. ambient air temperature and airflow at
VO = 1.0 V, VI = 12 V. See Thermal Consideration section.
Output Current Derating, VO = 1.8 V
Output Current Derating, VO = 3.3 V
[A]
[A]
50
50
3.0 m/s
3.0 m/s
40
40
2.0 m/s
30
1.0 m/s
30
1.0 m/s
20
0.5 m/s
20
0.5 m/s
Nat. Conv.
10
0
20
40
60
80
100
Available load current vs. ambient air temperature and airflow at
VO = 1.8 V, VI = 12 V. See Thermal Consideration section.
Nat. Conv.
10
0
120 [°C]
2.0 m/s
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 3.3 V, VI = 12 V. See Thermal Consideration section.
Current Limit Characteristics, VO = 1.0 V
Current Limit Characteristics, VO = 3.3 V
[V]
[V]
1,2
4,0
0,9
3,0
4.5 V
4.5 V
5.0 V
0,6
VI = 4.5, 5.0 V
VI =12, 14 V
12 V
14 V
0,3
0,0
50
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 1.0 V.
Note: Output enters hiccup mode at current limit.
5.0 V
2,0
VI = 4.5, 14 V
12 V
VI = 5.0, 12 V
14 V
1,0
0,0
50
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 3.3 V.
Note: Output enters hiccup mode at current limit.
Ericsson Internal
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18 (20)
No.
EHOSMIR
2/1301-BMR 464 0008 Uen
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EAB/FJB/GM
(Ksenia
(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
39
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
© Flex
Typical Characteristics
Output Voltage
BMR 464 2008 (SIP)
Output Ripple & Noise, VO = 1.0 V
Output Ripple & Noise, VO = 3.3 V
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 50 A
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
VI = 12 V, CO = 470 µF/10 mΩ
IO = 50 A
Output Ripple vs. Input Voltage
Output Ripple vs. Frequency
[mVpk-pk]
[mVpk-pk]
40
70
60
30
50
0.6 V
1.0 V
40
1.0 V
1.8 V
30
3.3 V
20
0.6 V
20
10
1.8 V
3.3 V
10
0
5
7
9
11
0
[V]
13
200
300
400
500
600
[kHz]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, CO = 470 µF/10 mΩ, IO = 50 A.
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V, CO = 470 µF/10 mΩ,
IO = 50 A. Default configuration except changed frequency.
Output Ripple vs. External Capacitance
Load regulation, VO = 1.0 V
[mV]
[V]
40
1,010
30
0.6 V
1.0 V
20
1.8 V
3.3 V
10
0
0
1
2
3
4
5 [mF]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V, IO = 50 A.
Parallel coupling of capacitors with 470 µF/10 mΩ
1,005
4.5 V
5.0 V
1,000
12 V
14 V
0,995
0,990
0
5
10
15
20
25 [A]
Load regulation at VO = 1.0 V, TP1 = +25 °C, CO = 470 µF/10 mΩ
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2/1301-BMR 464 0008 Uen
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EAB/FJB/GM
(Ksenia
(EKRIROB)
BMR46
series
PoL Harrisen)
Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Technical
Specification
Reference
Date
Rev
2014-05-02
C1/28701-BMR 464 Rev.B
July 2019
BMR 464 2008 (SIP)
Start-up by input source
Shut-down by input source
Top trace: output voltage (0.5 V/div.).
Bottom trace: input voltage (5 V/div.).
Time scale: (20 ms/div.).
Start-up by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
40
© Flex
Typical Characteristics
Start-up and shut-down
Start-up enabled by connecting VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
19 (20)
No.
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: output voltage (0.5 V/div).
Bottom trace: input voltage (5 V/div.).
Time scale: (2 ms/div.).
Shut-down by CTRL signal
Top trace: output voltage (0.5 V/div.).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (20 ms/div.).
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: output voltage (0.5 V/div).
Bottom trace: CTRL signal (2 V/div.).
Time scale: (2 ms/div.).
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
2 (10)
No.
JIDDASUN Dan Sun
Approved (Document resp)
2/1301-BMR 464 2012 Uen
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
41
Technical Specification
Date
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
July 2019
© Flex
Electrical Specification
BMR 464 2012 (SIP)
TP1 = -30 to +95 °C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
External CIN = 470 µF/10 mΩ, COUT = 470 µF/10 mΩ. See Operating Information section for selection of capacitor
types. Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage rise time
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
margining
Output voltage set-point resolution
Output voltage accuracy
VO
Load regulation; IO = 0 - 100%
VOac
Output ripple & noise
CO = 470 μF (minimum external
capacitance). See Note 11
IO
Output current
IS
Static input current at max IO
Ilim
Current limit threshold
Short circuit
current
RMS, hiccup mode,
See Note 3
50% of max IO
η
Efficiency
max IO
Pd
Power dissipation at max IO
Pli
Input idling
power
(no load)
Default configuration:
Continues Conduction
Mode, CCM
PCTRL
Input standby
power
Turned off with
CTRL-pin
Ci
Co
COUT
max
Unit
2.4
V/ms
0.60
Internal input capacitance
Internal output capacitance
Total external output capacitance
ESR range of capacitors (per capacitor)
typ
3.3
V
V
0.54
3.63
V
1.2
See Note 17
±0.025
Including line, load, temp.
See Note 14
Current sharing operation
See Note 15
-1
-2
Internal resistance +S/-S to VOUT/GND
Line regulation
Isc
min
monotonic
1
%
2
%
47
2
2
2
3
2
2
2
2
20
25
30
35
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
See Note 18
VO = 1.0 V
VO = 3.3 V
% FS
0.001
Ω
mV
mV
mVp-p
50
4.9
14.53
52
A
65
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
11
9
7
6
VO = 1.0 V
VO = 3.3 V
VO = 1.0 V
VO = 3.3 V
VO = 1.0 V
VO = 3.3 V
VO = 0.6 V
VO = 1.0 V
VO = 1.8 V
VO = 3.3 V
90.4
95.7
86.9
94.6
7.54
9.36
0.90
0.90
1.10
1.67
Default configuration:
Monitoring enabled,
Precise timing enabled
170
470
5
A
A
%
%
W
W
mW
140
400
See Note 9
See Note 9
A
30 000
30
μF
μF
μF
mΩ
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
JIDDASUN Dan Sun
Approved (Document resp)
2/1301-BMR 464 2012 Uen
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
Vtr1
ttr1
fs
Load transient
peak voltage
deviation
(L to H/H to L)
Load step
20-60-20% of
max IO
Load transient
recovery time,
Note 5
(L to H/H to L)
Load step
20-60-20% of
max IO
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Default configuration
di/dt = 2 A/μs
CO = 470 μF (minimum
external capacitance)
see Note 12
Switching frequency
Switching frequency range, see Note 19
Switching frequency set-point accuracy
Control Circuit PWM Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Input Under Voltage
Lockout,
UVLO
Input Over Voltage
Protection,
IOVP
Power Good, PG,
See Note 2
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
Over Current
Protection,
OCP
Over Temperature
Protection,
OTP at P2
See Note 8
3 (10)
No.
UVLO threshold
UVLO threshold range
Set point accuracy
UVLO hysteresis
UVLO hysteresis range
Delay
Fault response
IOVP threshold
IOVP threshold range
Set point accuracy
IOVP hysteresis
IOVP hysteresis range
Delay
Fault response
PG threshold
PG hysteresis
PG delay
PG delay range
UVP threshold
UVP threshold range
UVP hysteresis
OVP threshold
OVP threshold range
UVP/OVP response time
UVP/OVP
response time range
Fault response
OCP threshold
OCP threshold range
Protection delay,
Protection delay range
Fault response
OTP threshold
OTP threshold range
OTP hysteresis
OTP hysteresis range
Fault response
42
Technical Specification
Date
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
July 2019
© Flex
VO = 1.0 V
127 / 298
mV
VO = 3.3 V
210 / 327
VO = 1.0 V
100 / 100
μs
VO = 3.3 V
100 / 100
320
200-640
PMBus configurable
External clock source
-5
5
150
-13
5
95
13
3.85
3.85-14
PMBus configurable
-150
150
0.35
0-10.15
2.5
Automatic restart, 70 ms
16
4.2-16
PMBus configurable
See Note 3
PMBus configurable
-150
PMBus configurable
See Note 3
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
PMBus configurable
See Note 3
PMBus configurable
See Note 4
PMBus configurable
See Note 3
PMBus configurable
PMBus configurable
See Note 3
150
1
0-11.8
2.5
Automatic restart, 70 ms
90
5
10
0-500
85
0-100
5
115
100-115
25
5-60
Automatic restart, 70 ms
62
0-62
32
1-32
Automatic restart, 70 ms
120
-40…+125
25
0-165
Automatic restart, 240 ms
kHz
kHz
%
%
ns
%
V
V
mV
V
V
μs
V
V
mV
V
V
μs
% VO
% VO
s
s
% VO
% VO
% VO
% VO
% VO
μs
μs
A
A
Tsw
Tsw
C
C
C
C
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
JIDDASUN Dan Sun
Approved (Document resp)
Checked
BMR46
series
PoL
JIDDASUN
Dan
SunRegulators
Input 4.5-14 V, Output up to 50 A / 165 W
VIL
VIH
IIL
VOL
VOH
IOL
IOH
fSMB
tset
thold
tfree
Cp
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic output low signal level
Logic output high signal level
Logic output low sink current
Logic output high source current
SMBus Operating frequency
Setup time, SMBus
Hold time, SMBus
Bus free time, SMBus
Internal capacitance on logic pins
Initialization time
Output Voltage
Delay Time
See Note 6
Output Voltage
Ramp Time
See Note 13
Delay duration
Delay duration range
Delay accuracy
turn-on
Delay accuracy
turn-off
Ramp duration
Ramp duration range
Ramp time accuracy
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy (VO - VVTRK)
VTRK Regulation Accuracy (VO - VVTRK)
Current difference between products in a current
sharing group
Date
READ_IOUT vs IO
Rev
1/28701-BMR 464 Rev.B
1/7/2019
SYNC, SA0, SA1, SCL, SDA,
GCB, CTRL, VSET
SYNC, SCL, SDA, SALERT,
GCB, PG
See Note 1
See Note 1
See Note 1
July 2019
C
© Flex
0.8
2
CTRL
0.6
0.4
2.25
4
2
100
10
250
300
2
10
See Note 10
See Note 16
PMBus configurable
40
10
5-500000
Current sharing operation
VVTRK = 5.5 V
100% tracking, see Note 7
Current sharing operation
2 phases, 100% tracking
VO = 1.0 V, 10 ms ramp
100% Tracking
Current sharing operation
100% Tracking
Steady state operation
Ramp-up
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 1.0 V
IO = 0-50 A, TP1 = 0 to +95 °C
VI = 4.5-14 V, VO = 0.6-3.3 V
V
V
mA
V
V
mA
mA
kHz
ns
ns
ms
pF
ms
ms
-0.25/+4
ms
-0.25/+4
ms
10
0-200
100
20
PMBus configurable
READ_VIN vs VI
READ_VOUT vs VO
READ_IOUT vs IO
43
2/1301-BMR 464Technical
2012 Uen Specification
Number of products in a current sharing group
Monitoring accuracy
4 (10)
No.
110
-100
ms
µs
%
200
100
±100
µA
mV
mV
-1
1
%
-2
2
%
Max 2 x READ_IOUT monitoring accuracy
4
7
A
3
1
%
%
±3.0
A
±5.0
A
Note 1: See section I2C/SMBus Setup and Hold Times – Definitions.
Note 2: Monitorable over PMBus Interface.
Note 3: Automatic restart ~70 or 240 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information and AN302 for
other fault response options.
Note 4: Tsw is the switching period.
Note 5: Within +/-3% of VO
Note 6: See section Soft-start Power Up.
Note 7: Tracking functionality is designed to follow a VTRK signal with slew rate < 2.4 V/ms. For faster VTRK signals accuracy will depend on the regulator bandwidth.
Note 8: See section Over Temperature Protection (OTP).
Note 9: See section External Capacitors.
Note 10: See section Initialization Procedure.
Note 11: See graph Output Ripple vs External Capacitance and Operating information section Output Ripple and Noise.
Note 12: See graph Load Transient vs. External Capacitance and Operating information section External Capacitors.
Note 13: Time for reaching 100% of nominal Vout.
Note 14: For Vout < 1.0 V accuracy is +/-10 mV. For further deviations see section Output Voltage Adjust using PMBus.
Note 15: Accuracy here means deviation from ideal output voltage level given by configured droop and actual load. Includes line, load and temperature variations.
Note 16: For current sharing the Output Voltage Delay Time must be reconfigured to minimum 15 ms, see AN307 for details.
Note 17: For steady state operation above 1.05 x 3.3 V, please contact your local Flex sales representative.
Note 18: A minimum load current is not required if Low Power mode is used (monitoring disabled).
Note 19: Please check with your local Flex Sales representative if you intend to adjust the frequency exceed 320 KHz ±10%.
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
JIDDASUN Dan Sun
2/1301-BMR 464 2012 Uen
Approved (Document resp)
Checked
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
July 2019
© Flex
Typical Characteristics
Efficiency and Power Dissipation
BMR 464 2012 (SIP)
Efficiency vs. Output Current, VI = 5 V
Power Dissipation vs. Output Current, VI = 5 V
[%]
[W]
100
12
10
95
8
90
0.6 V
1.0 V
85
80
0
10
20
30
40
0.6 V
6
1.0 V
1.8 V
4
1.8 V
3.3 V
2
3.3 V
0
50 [A]
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 5 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current, VI = 12 V
Power Dissipation vs. Output Current, VI = 12 V
[%]
[W]
100
12
95
10
90
0.6 V
85
80
75
44
Technical Specification
Date
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
75
5 (10)
No.
10
20
30
40
0.6 V
1.0 V
6
1.8 V
4
1.8 V
2
3.3 V
3.3 V
0
8
0
50 [A]
1.0 V
0
10
20
30
40
50 [A]
Efficiency vs. load current and output voltage at
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Dissipated power vs. load current and output voltage:
TP1 = +25 °C, VI = 12 V, fsw = 320 kHz, CO = 470 µF/10 mΩ.
Efficiency vs. Output Current and
Switching Frequency
Power Dissipation vs. Output Current and
Switching frequency
[%]
[W]
95
12
90
200
kHz
85
10
200
kHz
8
320
kHz
6
320
kHz
80
480
kHz
4
480
kHz
75
640
kHz
2
640
kHz
70
0
10
20
30
40
Efficiency vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
50 [A]
0
0
10
20
30
40
50 [A]
Dissipated power vs. load current and switch frequency at
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, CO = 470 µF/10 mΩ.
Default configuration except changed frequency
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
JIDDASUN Dan Sun
2/1301-BMR 464 2012 Uen
Approved (Document resp)
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
Technical Specification
Date
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
45
July 2019
© Flex
Typical Characteristics
Load Transient
BMR 464 2012 (SIP)
Load Transient vs. External Capacitance, VO = 1.0 V
Load Transient vs. External Capacitance, VO = 3.3 V
[mV]
500
[mV]
500
Universal PID,
No NLR
400
300
Optimized
PID, Default
NLR
200
Optimized
PID, Opt. NLR
100
0
6 (10)
No.
300
1
2
3
4
5 [mF]
Optimized
PID, Default
NLR
200
Optimized
PID, Opt. NLR
100
0
0
Universal PID,
No NLR
400
0
1
2
3
4
5 [mF]
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 1.0 V, fsw = 320 kHz, di/dt = 2 A/µs
Load transient peak voltage deviation vs. external capacitance.
Step (12.5-37.5-12.5 A). Parallel coupling of capacitors with 470 µF/10 mΩ,
TP1 = +25 °C, VI = 12 V, VO = 3.3 V, fsw = 320 kHz, di/dt = 2 A/µs
Output Load Transient Response, Default Configuration
Output Load Transient Response, Opt. PID, Opt.NLR
Output voltage response to load current
Step-change (10-30-10 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz
CO = 4000 µF
Top trace: output voltage (100 mV/div.). Output voltage response to load current Top trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Step-change (10-30-10 A) at:
Bottom trace: load current (10 A/div.).
Time scale: (0.1 ms/div.).
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
Time scale: (0.1 ms/div.).
di/dt = 2 A/µs, fsw = 320 kHz
CO = 4000 µF
Output Load Transient Response, Opt. PID, default NLR
Output voltage response to load current
Step-change (10-30-10 A) at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
di/dt = 2 A/µs, fsw = 320 kHz
CO = 4000 µF
Top trace: output voltage (200 mV/div.).
Bottom trace: load current (10 A/div.).
Time scale: (0.1 ms/div.).
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
7 (10)
No.
JIDDASUN Dan Sun
2/1301-BMR 464 2012 Uen
Approved (Document resp)
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
Technical Specification
Date
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
July 2019
© Flex
Typical Characteristics
Output Current Characteristic
BMR 464 2012 (SIP)
Output Current Derating, VO = 0.6 V
Output Current Derating, VO = 1.0 V
[A]
[A]
50
50
3.0 m/s
40
2.0 m/s
3.0 m/s
40
2.0 m/s
30
1.0 m/s
30
1.0 m/s
20
0.5 m/s
20
0.5 m/s
Nat. Conv.
10
0
20
40
60
80
100
Nat. Conv.
10
0
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 0.6 V, VI = 12 V. See Thermal Consideration section.
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 1.0 V, VI = 12 V. See Thermal Consideration section.
Output Current Derating, VO = 1.8 V
Output Current Derating, VO = 3.3 V
[A]
[A]
50
50
3.0 m/s
3.0 m/s
40
2.0 m/s
40
2.0 m/s
30
1.0 m/s
30
1.0 m/s
20
0.5 m/s
20
0.5 m/s
Nat. Conv.
10
10
0
0
20
40
60
80
100
46
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 1.8 V, VI = 12 V. See Thermal Consideration section.
Nat. Conv.
20
40
60
80
100
120 [°C]
Available load current vs. ambient air temperature and airflow at
VO = 3.3 V, VI = 12 V. See Thermal Consideration section.
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
8 (10)
No.
JIDDASUN Dan Sun
2/1301-BMR 464 2012 Uen
Approved (Document resp)
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
47
Technical Specification
Date
Rev
1/7/2019
C1/28701-BMR 464
Rev.B
July 2019
© Flex
BMR 464 2012 (SIP)
Typical Characteristics
Output Voltage
Output Ripple & Noise, VO = 1.0 V
Output Ripple & Noise, VO = 3.3 V
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
VI = 12 V, CO = 470 µF/10 mΩ
Time scale: (2 µs/div.).
IO = 50 A
20 MHz bandwidth
Output voltage ripple at: TP1 = +25 °C, Trace: output voltage (10 mV/div.).
VI = 12 V, CO = 470 µF/10 mΩ
Time scale: (2 µs/div.).
IO = 50 A
20 MHz bandwidth
Output Ripple vs. Input Voltage
Output Ripple vs. External Capacitance
[mVpk-pk]
40
[mV]
40
30
0.6 V
1.0 V
20
1.8 V
3.3 V
10
0
30
7
9
11
1.8 V
3.3 V
10
[V]
13
1.0 V
20
0
5
0.6 V
0
1
2
3
4
5 [mF]
Output voltage ripple Vpk-pk at: TP1 = +25 °C, CO = 470 µF/10 mΩ, IO = 50 A
Output voltage ripple Vpk-pk at: TP1 = +25 °C, VI = 12 V. IO = 50 A.
Parallel coupling of capacitors with 470 µF/10 mΩ
Current Limit Characteristics, VO = 1.0 V
Current Limit Characteristics, VO = 3.3 V
[V]
[V]
1.2
4.0
VI = 4.5, 5 .0V
VI = 5.0, 12 V
0.9
3.0
4.5 V
4.5 V
5.0 V
0.6
12 V
VI = 4.5,14 V
14 V
0.3
0.0
50
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 1.0 V.
Note: Output enters hiccup mode at current limit.
5.0 V
2.0
12 V
VI = 12, 14 V
14 V
1.0
0.0
50
55
60
65 [A]
Output voltage vs. load current at TP1 = +25 °C, VO = 3.3 V.
Note: Output enters hiccup mode at current limit.
ERICSSON INTERNAL
PRODUCT SPECIFICATION
Prepared (Subject resp)
JIDDASUN Dan Sun
Approved (Document resp)
2/1301-BMR 464 2012 Uen
Checked
JIDDASUN
Dan
SunRegulators
BMR46
series
PoL
Input 4.5-14 V, Output up to 50 A / 165 W
Date
1/7/2019
Technical Specification
Rev
C1/28701-BMR 464
July 2019
BMR 464 2012 (SIP)
Start-up by input source
Shut-down by input source
Top trace: input voltage (10 V/div.).
Mid trace: output voltage (1V/div)
Bottom trace: PG (2 V/div.).
Time scale: (20 ms/div.).
Start-up by CTRL signal
Start-up by enabling CTRL signal at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Rev.B
48
© Flex
Typical Characteristics
Start-up and shut-down
Start-up enabled by connecting VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
9 (10)
No.
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: input voltage (10 V/div.).
Mid trace: output voltage (1V/div)
Bottom trace: PG (2 V/div.).
Time scale: (10 ms/div.).
Shut-down by CTRL signal
Top trace: CTRL (5 V/div.).
Mid trace: output voltage (1V/div)
Bottom trace: PG (2 V/div.).
Time scale: (10 ms/div.).
Shut-down enabled by disconnecting
VI at:
TP1 = +25 °C, VI = 12 V, VO = 1.0 V
CO = 470 µF/10 mΩ, IO = 50 A
Top trace: CTRL (5 V/div.).
Mid trace: output voltage (1V/div)
Bottom trace: PG (2 V/div.).
Time scale: (10 ms/div.).
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
EMC Specification
Conducted EMI measured according to test set-up below.
The fundamental switching frequency is 320 kHz at VI = 12 V,
max IO.
1/28701-BMR 464 Rev.B
49
July 2019
© Flex
Output Ripple and Noise
Output ripple and noise is measured according to figure below.
A 50 mm conductor works as a small inductor forming together
with the two capacitors as a damped filter.
Conducted EMI Input terminal value (typical for default
configuration)
S
S
50 mm conductor
Tantalum
Capacitor
Output
10 µF
Capacitor
470 µF/10 mΩ
GND
Ceramic
Capacitor
0.1 µF
Load
Vout
50 mm conductor
BNC-contact to
oscilloscope
Output ripple and noise test set-up.
Operating information
EMI without filter for BMR 464 2008
To spectrum
analyzer
Battery
supply
RF Current probe
1kHz – 50MHz
Resistive
load
C1
POL
50mm
C1 = 10uF / 600VDC
Feed- Thru RF capacitor
800mm
200mm
Conducted EMI test set-up
Layout Recommendations
The radiated EMI performance of the product will depend on
the PWB layout and ground layer design. It is also important to
consider the stand-off of the product. If a ground layer is used,
it should be connected to the output of the product and the
equipment ground or chassis.
A ground layer will increase the stray capacitance in the PWB
and improve the high frequency EMC performance.
Power Management Overview
This product is equipped with a PMBus interface. The product
incorporates a wide range of readable and configurable power
management features that are simple to implement
with a minimum of external components. Additionally, the
product includes protection features that continuously
safeguard the load from damage due to unexpected system
faults. A fault is also shown as an alert on the SALERT pin.
The following product parameters can continuously be
monitored by a host: Input voltage, output voltage/current,
and internal temperature. If the monitoring is not needed it can
be disabled and the product enters a low power mode reducing
the power consumption. The protection features are not
affected.
The product is delivered with a default configuration suitable
for a wide range operation in terms of input voltage, output
voltage, and load. The configuration is stored in an internal
Non-Volatile Memory (NVM). All power management functions
can be reconfigured using the PMBus interface. Please contact
your local Flex representative for design support of custom
configurations or appropriate SW tools for design and
download of your own configurations.
Input Voltage
The input voltage range, 4.5 - 14 V, makes the product
easy to use in intermediate bus applications when powered
by a non-regulated bus converter or a regulated bus converter.
See Ordering Information for input voltage range.
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
1/28701-BMR 464 Rev.B
50
July 2019
© Flex
Input Under Voltage Lockout, UVLO
The product monitors the input voltage and will turn-on and
turn-off at configured levels. The default turn-on input voltage
level setting is 4.20 V, whereas the corresponding turn-off input
voltage level is 3.85 V. Hence, the default hysteresis between
turn-on and turn-off input voltage is 0.35 V. Once an input turnoff condition occurs, the device can respond in a number of
ways as follows:
significant inductance, the addition a capacitor with low ESR at
the input of the product will ensure stable operation.
1.
where I load is the output load current and D is the duty cycle.
Continue operating without interruption. The unit will
continue to operate as long as the input voltage can be
supported. If the input voltage continues to fall, there will
come a point where the unit will cease to operate.
2.
Continue operating for a given delay period, followed by
shutdown if the fault still exists. The device will remain in
shutdown until instructed to restart.
3.
Initiate an immediate shutdown until the fault has been
cleared. The user can select a specific number of retry
attempts.
The default response from a turn-off is an immediate shutdown
of the device. The device will continuously check for the
presence of the fault condition. If the fault condition is no
longer present, the product will be re-enabled. The turn-on and
turn-off levels and response can be reconfigured using the
PMBus interface.
Remote Control
Vext
CTRL
GND
The product is equipped with a
remote control function, i.e., the
CTRL pin. The remote control
can be connected to either the
primary negative input
connection (GND) or an external
voltage (Vext), which is a 3 - 5 V
positive supply voltage in
accordance to the SMBus
Specification version 2.0.
The CTRL function allows the product to be turned on/off by an
external device like a semiconductor or mechanical switch. By
default the product will turn on when the CTRL pin is left open
and turn off when the CTRL pin is applied to GND. The CTRL
pin has an internal pull-up resistor. When the CTRL pin is left
open, the voltage generated on the CTRL pin is max 5.5 V.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the CTRL
pin.
The product can also be configured using the PMBus interface
to be “Always on”, or turn on/off can be performed with PMBus
commands.
Input and Output Impedance
The impedance of both the input source and the load will
interact with the impedance of the product. It is important that
the input source has low characteristic impedance. The
performance in some applications can be enhanced by
addition of external capacitance as described under External
Decoupling Capacitors. If the input voltage source contains
External Capacitors
Input capacitors:
The input ripple RMS current in a buck converter is equal to
Eq. 1.
I inputRMS I load D1 D ,
The maximum load ripple current becomes I load 2 . The ripple
current is divided into three parts, i.e., currents in the input
source, external input capacitor, and internal input capacitor.
How the current is divided depends on the impedance of the
input source, ESR and capacitance values in the capacitors. A
minimum capacitance of 300 µF with low ESR is
recommended. The ripple current rating of the capacitors must
follow Eq. 1. For high-performance/transient applications or
wherever the input source performance is degraded, additional
low ESR ceramic type capacitors at the input is recommended.
The additional input low ESR capacitance above the minimum
level insures an optimized performance.
Output capacitors:
When powering loads with significant dynamic current
requirements, the voltage regulation at the point of load can be
improved by addition of decoupling capacitors at the load.
The most effective technique is to locate low ESR ceramic and
electrolytic capacitors as close to the load as possible, using
several capacitors in parallel to lower the effective ESR. The
ceramic capacitors will handle high-frequency dynamic load
changes while the electrolytic capacitors are used to handle
low frequency dynamic load changes. Ceramic capacitors will
also reduce high frequency noise at the load.
It is equally important to use low resistance and low inductance
PWB layouts and cabling.
External decoupling capacitors are a part of the control loop of
the product and may affect the stability margins.
Stable operation is guaranteed for the following total
capacitance CO in the output decoupling capacitor bank where
Eq. 2. CO Cmin , Cmax 470, 30000 µF .
The decoupling capacitor bank should consist of capacitors
which has a capacitance value larger than C Cmin and has
an ESR range of
Eq. 3.
ESR ESRmin , ESRmax 5, 30 mΩ
The control loop stability margins are limited by the minimum
time constant min of the capacitors. Hence, the time constant
of the capacitors should follow Eq. 4.
Eq. 4.
min Cmin ESRmin 2.35 s
This relation can be used if your preferred capacitors have
parameters outside the above stated ranges in Eq. 2 and Eq.3.
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
• If the capacitors capacitance value is C Cmin one must
use at least N capacitors where
Cmin
C
.
N min and ESR ESRmin
C
C
• If the ESR value is ESR ESRmax one must use at least N
capacitors of that type where
ESR
Cmin
.
N
and C
N
ESR
max
• If the ESR value is ESR ESRmin the capacitance value
should be
ESRmin
C Cmin
.
ESR
For a total capacitance outside the above stated range or
capacitors that do not follow the stated above requirements
above a re-design of the control loop parameters will be
necessary for robust dynamic operation and stability.
See technical paper TP022 for further information.
Control Loop
The product uses a voltage-mode synchronous buck controller
with a fixed frequency PWM scheme. Although the product
uses a digital control loop, it operates much like a traditional
analog PWM controller. As in the analog controller case, the
control loop compares the output voltage to the desired voltage
reference and compensation is added to keep the loop stable
and fast. The resulting error signal is used to drive the PWM
logic. Instead of using external resistors and capacitors
required with traditional analog control loops, the product uses
a digital Proportional-Integral-Derivative (PID) compensator in
the control loop. The characteristics of the control loop is
configured by setting PID compensation parameters. These
PID settings can be reconfigured using the PMBus interface.
Control Loop Compensation Setting
The products without DLC are by default configured with a
robust control loop compensation setting (PID setting) which
allows for a wide range operation of input and output voltages
and capacitive loads as defined in the section External
Decoupling Capacitors. For an application with a specific input
voltage, output voltage, and capacitive load, the control loop
can be optimized for a robust and stable operation and with an
improved load transient response. This optimization will
minimize the amount of required output decoupling capacitors
for a given load transient requirement yielding an optimized
cost and minimized board space. The optimization together
with load step simulations can be made using the Flex Power
Designer software.
Dynamic Loop Compensation (DLC)
Only some of the products that this specification covers have
this feature (see section Ordering Information).
The DLC feature might in some documents be referred to as
“Auto Compensation” or “Auto Tuning” feature.
The DLC feature measures the characteristics of the power
train and calculates the proper compensator PID coefficients.
1/28701-BMR 464 Rev.B
51
July 2019
© Flex
The default configuration is that once the output voltage ramp
up has completed, the DLC algorithm will begin and a new
optimized compensator solution (PID setting) will be found and
implemented. The DLC algorithm typically takes between 50
ms and 200 ms to complete.
By the PMBus command AUTO_COMP_CONFIG the user
may select between several different modes of operation:
•
Disable
•
Autocomp once, will run DLC algorithm each time the
output is enabled (default configuration)
•
Autocomp every second will initiate a new DLC
algorithm each 1 second
•
Autocomp every minute will initiate a new DLC
algorithm every minute.
The DLC can also be configured to run once only after the first
ramp up (after input power have been applied) and to use that
temporary stored PID settings in all subsequent ramps. If input
power is cycled a new DLC algorithm will be performed after
the first ramp up. The default setting is however to run the DLC
algorithm after every ramp up.
The DLC algorithm can also be initiated manually by sending
the AUTO_COMP_CONTROL command.
The DLC can also be configured with Auto Comp Gain Control.
This scales the DLC results to allow a trade-off between
transient response and steady-state duty cycle jitter. A setting
of 100% will provide the fastest transient response while a
setting of 10% will produce the lowest jitter. The default is 50%.
Changing DLC and PID Setting
Some caution must be considered while DLC is enabled and
when it is changed from enabled or disabled.
When operating, the controller IC uses the settings loaded in
its (volatile) RAM memory. When the input power is applied the
RAM settings are retrieved from the pin-strap resistors and the
two non-volatile memories (DEFAULT and USER). The
sequence is described in the “Initialization Procedure” section.
When DLC is enabled:
When DLC is enabled, the normal sequence (after input power
has been applied) that a value stored in the user non-volatile
memory overwrites any previously loaded value does not apply
for the PID setting (stored in the PID_TAPS register). The PID
setting in the user non-volatile memory is ignored and a nonconfigurable default PID setting is loaded to RAM to act as a
safe starting value for the DLC. Once the output has been
enabled and the DLC algorithm has found a new optimized PID
setting, it will be loaded in RAM and used by the control loop.
When saving changes to the user non-volatile memory, all
changes made to the content of RAM will be saved. This also
includes the default PID setting (loaded to RAM to act as a
safe starting value) or the PID setting changed by the DLC
algorithm after enabling output. The result is that as long as
DLC is enabled the PID setting in the user non-volatile memory
is ignored, but it might accidentally get overwritten.
When changing DLC from disabled to enabled:
A non-configurable default PID setting is loaded to RAM to act
as a safe starting value for the DLC (same as above).
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
When changing DLC from enabled to disabled:
When changing DLC from enabled to disabled, the PID setting
in the user non-volatile memory will be loaded to RAM. Any
new optimized PID setting in RAM will be lost, if not first stored
to the user non-volatile memory.
When DLC is disabled:
When DLC is disabled and input power has been applied, the
PID setting in the user non-volatile memory will be loaded to
RAM and used in the control loop.
The original PID setting in the user non-volatile memory is
quite slow and not recommended for optimal performance. If
DLC is disabled it is recommended to either:
1. Use the DLC to find optimized PID setting.
2. Use Flex Power Designer to find appropriate PID
setting.
3. Use Universal PID as defined below.
The Universal PID setting (taps) is:
A = 3289.56,
B = -6248.12,
C = 2964.06
Write 0x7CB941FDC3417CCD99 to PID_TAPS register and
write command STORE_USER_ALL
Note that if DLC is enabled, for best results VI must be stable
before DLC algorithm begins.
Load Transient Response Optimization
The product incorporates a Non-Linear transient Response,
NLR, loop that decreases the response time and the output
voltage deviation during a load transient. The NLR results in a
higher equivalent loop bandwidth than is possible using a
traditional linear control loop. The product is pre-configured
with appropriate NLR settings for robust and stable operation
for a wide range of input voltage and a capacitive load range
as defined in the section External Decoupling Capacitors. For
an application with a specific input voltage, output voltage, and
capacitive load, the NLR configuration can be optimized for a
robust and stable operation and with an improved load
transient response. This will also reduce the amount of output
decoupling capacitors and yield a reduced cost. However, the
NLR slightly reduces the efficiency. In order to obtain maximal
energy efficiency the load transient requirement has to be met
by the standard control loop compensation and the decoupling
capacitors. The NLR settings can be reconfigured using the
PMBus interface.
See application note AN306 for further information.
Remote Sense
The product has remote sense that can be used to
compensate for voltage drops between the output and the
point of load. The sense traces should be located close to the
PWB ground layer to reduce noise susceptibility. Due to
derating of internal output capacitance the voltage drop should
be kept below VDROPMAX (5.5 VO ) / 2 . A large voltage drop
will impact the electrical performance of the regulator. If the
remote sense is not needed, +S should be connected to VOUT
1/28701-BMR 464 Rev.B
52
July 2019
© Flex
and −S should be connected to GND.
Output Voltage Adjust using Pin-strap Resistor
Using an external Pin-strap
resistor, RSET, the output
voltage can be set in the
VSET
range 0.6 V to 3.3 V at 28
RSET
different levels shown in the
PREF
table below. The resistor
should be applied between
the VSET pin and the PREF
pin.
RSET also sets the maximum output voltage, see section
“Output Voltage Range Limitation”. The resistor is sensed only
during product start-up. Changing the resistor value during
normal operation will not change the output voltage. The input
voltage must be at least 1 V larger than the output voltage in
order to deliver the correct output voltage. See Ordering
Information for output voltage range.
The following table shows recommended resistor values for
RSET. Maximum 1% tolerance resistors are required.
VO [V]
RSET[kΩ]
VO [V]
RSET[kΩ]
0.60
10
1.50
46.4
0.65
11
1.60
51.1
0.70
12.1
1.70
56.2
0.75
13.3
1.80
61.9
0.80
14.7
1.90
68.1
0.85
16.2
2.00
75
0.90
17.8
2.10
82.5
0.95
19.6
2.20
90.9
1.00
21.5
2.30
100
1.05
23.7
2.50
110
1.10
26.1
3.00
121
1.15
28.7
3.30
133
1.20
31.6
1.25
34.8
1.30
38.3
1.40
42.2
The output voltage and the maximum output voltage can be pin
strapped to three fixed values by connecting the VSET pin
according to the table below.
VO [V]
0.60
1.2
2.5
VSET
Shorted to PREF
Open “high impedance”
Logic High, GND as reference
Technical Specification
53
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
1/28701-BMR 464 Rev.B
Output Voltage Adjust using PMBus
The output voltage set by pin-strap can be overridden by
configuration file or by using a PMBus command. See
Electrical Specification for adjustment range.
Over Voltage Protection (OVP)
The product includes over voltage limiting circuitry for
protection of the load. The default OVP limit is 15% above the
nominal output voltage. If the output voltage exceeds the OVP
limit, the product can respond in different ways:
When setting the output voltage by configuration file or by a
PMBus command, the specified output voltage accuracy is
valid only when the set output voltage level falls within the
same bin range as the voltage level defined by the pin-strap
resistor RSET. The applicable bin ranges are defined in the
table below. Valid accuracy for voltage levels outside the
applicable bin range is two times the specified.
Example:
Nominal VO is set to 1.10 V by RSET = 26.1 kΩ. 1.10 V falls
within the bin range 0.988-1.383 V, thus specified accuracy is
valid when adjusting VO within 0.988-1.383V.
VO bin ranges [V]
0.600 – 0.988
0.988 – 1.383
1.383 – 1.975
1.975 – 2.398
2.398 – 2.963
2.963 – 3.753
For parallel operation, see application notes AN307.
Output Voltage Range Limitation
The output voltage range that is possible to set by
configuration or by the PMBus interface is limited by the pinstrap resistor RSET. The maximum output voltage is set to 110%
of the nominal output value defined by RSET,
VO, MAX 1.1 VO, RSET . This protects the load from an over
voltage due to an accidental wrong PMBus command.
Output Voltage Adjust Limitation using PMBus
In addition to the maximum output voltage limitation by the pinstrap resistor RSET, there is also a limitation in how much the
output voltage can be increased while the output is enabled. If
output is disabled then RSET resistor is the only limitation.
Example:
If the output is enabled with output voltage set to 1.0 V, then it
is only possible to adjust/change the output voltage up to 1.7V as long as the output is enabled.
VO setting
when enabled [V]
VO set range
while enabled [V]
0.000 – 0.988
~0.2 to >1.2
0.988 – 1.383
~0.2 to >1.7
1.383 – 1.975
~0.2 to >2.5
1.975 – 2.398
~0.2 to >2.97
2.398 – 2.963
~0.2 to >3.68
2.963 – 3.753
~0.2 to >4.65
July 2019
© Flex
1. Initiate an immediate shutdown until the fault has been
cleared. The user can select a specific number of retry
attempts.
2. Turn off the high-side MOSFET and turn on the low-side
MOSFET. The low-side MOSFET remains ON until the
device attempts a restart, i.e. the output voltage is pulled to
ground level (crowbar function).
The default response from an overvoltage fault is to
immediately shut down as in 2. The device will continuously
check for the presence of the fault condition, and when the
fault condition no longer exists the device will be re-enabled.
For continuous OVP when operating from an external clock for
synchronization, the only allowed response is an immediate
shutdown. The OVP limit and fault response can be
reconfigured using the PMBus interface.
Under Voltage Protection (UVP)
The product includes output under voltage limiting circuitry for
protection of the load. The default UVP limit is 15% below the
nominal output voltage. The UVP limit can be reconfigured
using the PMBus interface.
Power Good
The product provides a Power Good (PG) flag in the Status
Word register that indicates the output voltage is within a
specified tolerance of its target level and no fault condition
exists. If specified in section Connections, the product also
provides a PG signal output. The PG pin is active high and by
default open-drain but may also be configured as push-pull via
the PMBus interface.
By default, the PG signal will be asserted when the output
reaches above 90% of the nominal voltage, and de-asserted
when the output falls below 85% of the nominal voltage. These
limits may be changed via the PMBus interface. A PG delay
period is defined as the time from when all conditions within
the product for asserting PG are met to when the PG signal is
actually asserted. The default PG delay is set to 10 ms. This
value can be reconfigured using the PMBus interface.
For products with DLC the PG signal is by default asserted
directly after the DLC operation have been completed. If DLC
is disabled the configured PG delay will be used. This can be
reconfigured using the PMBus interface.
Switching Frequency
The fundamental switching frequency is 320 kHz, which yields
optimal power efficiency. The switching frequency can be set
to any value between 200 kHz and 640 kHz using the PMBus
interface. The switching frequency will change the
efficiency/power dissipation, load transient response and
output ripple. For optimal control loop performance in a product
without DLC, the control loop must be re-optimized when
changing the switching frequency.
Technical Specification
BMR46 series PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
Synchronization
Synchronization is a feature that allows multiple products to be
synchronized to a common frequency. Synchronized products
powered from the same bus eliminate beat frequencies
reflected back to the input supply, and also reduces EMI
filtering requirements. Eliminating the slow beat frequencies
(usually
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