CD4043BE

XBLW CD4043 Quad R/S Latch General Description The CD4043 is a quad R/S latch with 3-state outputs with a common output enable input (OE). Each latch has an active HIGH set input (1S to 4S), an active HIGH reset input (1R to 4R) and an active HIGH 3-state output (1Q to 4Q). When OE is HIGH, the latch output (nQ) is determined by the nR and nS inputs as shown in function table. When OE is LOW, the latch outputs are in the high impedance OFF-state. OE does not affect the state of the latch. The high impedance off-state feature allows common bussing of the outputs. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS , or another input. Features  5V, 10V, and 15V parametric ratings  Standardized symmetrical output characteristics  Specified from -40℃ to +85℃  Packaging information: DIP16/SOP16/TSSOP16 ORDERING INFORMATION DEVICE Package Type MARKING Packing Packing QTY CD4043BE CD4043BDTR CD4043BTDTR DIP-16 SOP-16 TSSOP-16 CD4043BE CD4043B CD4043B Tube Tape Tape 1000/Box 2500/Reel 3000/Reel XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 1 页 共 13 页 XBLW CD4043 Quad R/S Latch Block Diagram And Pin Description Block Diagram Figure 1. Functional diagram Figure 2. Logic diagram for one latch Pin Configurations XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 2 页 共 13 页 XBLW CD4043 Quad R/S Latch Pin Description Pin No. Pin Name Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 4Q 1Q 1R 1S OE 2S 2R VSS 2Q 3Q 3R 3S NC 4S 4R VDD 3-state buffered latch output 3-state buffered latch output reset input(active HIGH) set input (active HIGH) common output enable input set input(active HIGH) reset input(active HIGH) ground supply voltage 3-state buffered latch output 3-state buffered latch output reset input(active HIGH) set input(active HIGH) not connected set input(active HIGH) reset input(active HIGH) supply voltage Function Table OE Inputs nS nR Output nQ L X X Z H L H L H H X H H L L latched Note: [1] H=HIGH voltage level; L=LOW voltage level; X=don’t care; Z=high impedance state. XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 3 页 共 13 页 XBLW CD4043 Quad R/S Latch Electrical Parameter Absolute Maximum Ratings Parameter Symbol supply voltage input clamping current input voltage output clamping current output current supply current total power dissipation power dissipation storage temperature VDD IIK VI IOK IO IDD Ptot PD Ttsg soldering temperature TL Conditions Min. -0.5 -0.5 -65 VI < -0.5V or VI > VDD +0.5V VO < -0.5V or VO > VDD+0.5V VO=0V to VCC per output DIP 10s SOP Max. +18 ±10 VDD+0.5 ±10 ±10 50 500 100 +150 245 260 Unit J mA V mA mA mA mW mW ℃ ℃ ℃ Recommended Operating Conditions Parameter Symbol Conditions Min. Typ. Max. Unit supply voltage input voltage operating temperature VDD VI Tamb - 3 0 -40 - 15 VDD +85 V V ℃ XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 4 页 共 13 页 XBLW CD4043 Quad R/S Latch Electrical Characteristics DC Characteristics 1 (Tamb=25℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter supply current Symbol IDD LOW-level output current IOL HIGH-level output current IOH LOW-level output voltage VOL HIGH-level output voltage VOH LOW-level input voltage VIL HIGH-level input voltage VIH input leakage current II OFF-state output current IOZ input capacitance CI XBLW version 1.0 VO Conditions(V) VIN VDD Min. Tamb=25℃ Typ. Max. Unit - 0, 5 5 - - 20 μA - 0, 10 10 - - 40 μA - 0, 15 15 - - 80 μA 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0.5, 4.5 1, 9 1.5, 13.5 0.5, 4.5 1, 9 1.5, 13.5 0, 5 0, 10 0, 15 0, 5 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 - 5 10 15 5 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 0.44 1.1 3.0 4.95 9.95 14.95 3.5 7 11 - -0.44 -1.4 -1.1 -3.0 0.05 0.05 0.05 1.5 3 4 - mA mA mA mA mA mA mA V V V V V V V V V V V V - 0, 15 15 - - ±1.0 μA 15 - - 1.6 μA 15 - - 1.6 μA - - - 7.5 pF nQ output HIGH; returned to VDD nQ output LOW; returned to VSS - - 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 5 页 共 13 页 XBLW CD4043 Quad R/S Latch DC Characteristics 2 (Tamb=-40℃ to +85℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter supply current Symbol IDD LOW-level output current IOL HIGH-level output current IOH LOW-level output voltage VOL HIGH-level output voltage VOH LOW-level input voltage VIL HIGH-level input voltage VIH input leakage current II OFF-state output current IOZ XBLW version 1.0 Conditions(V) VO VIN VDD Tamb=-40℃ Min. Max. Tamb=+85℃ Min. Max. Unit - 0, 5 5 - 20 - 150 μA - 0, 10 10 - 40 - 300 μA - 0, 15 15 - 80 - 600 μA 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0.5, 4.5 1, 9 1.5, 13.5 0.5, 4.5 1, 9 1.5, 13.5 0, 5 0, 10 0, 15 0, 5 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 - 5 10 15 5 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 0.52 1.3 3.6 4.95 9.95 14.95 3.5 7 11 -0.52 -1.7 -1.3 -3.6 0.05 0.05 0.05 1.5 3 4 - 0.36 0.9 2.4 4.95 9.95 14.95 3.5 7 11 -0.36 -1.1 -0.9 -2.4 0.05 0.05 0.05 1.5 3 4 - mA mA mA mA mA mA mA V V V V V V V V V V V V - 0, 15 15 - ±0.1 - ±1.0 μA 15 - 1.6 - 12 μA 15 - 1.6 - 12 μA nQ output HIGH; returned to VDD nQ output LOW; returned to VSS 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 6 页 共 13 页 XBLW CD4043 Quad R/S Latch AC Characteristics (Tamb=25℃, VSS=0V, unless otherwise specified.) Parameter Symbol Conditions VDD Min. Typ. Max. Unit 5 10 15 5[1] 10 15 5[1][2] 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 30 20 16 30 20 16 90 35 25 65 25 15 60 30 30 45 25 20 50 20 15 40 26 25 45 30 30 15 10 8 15 10 8 180 70 50 135 50 35 120 60 60 90 50 40 100 40 30 80 60 50 90 60 60 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns [1] HIGH to LOW propagation delay tPHL nR→nQ; see Figure 4 LOW to HIGH propagation delay tPLH nS→nQ; see Figure 4 transition time tTHL, tTLH HIGH to OFF-state propagation delay tPHZ OE→nQ; see Figure 5 LOW to OFF-state propagation delay tPLZ OE→nQ; see Figure 5 OFF-state to HIGH propagation delay tPZH OE→nQ; see Figure 5 OFF-state to LOW propagation delay tPZL OE→nQ; see Figure 5 pulse width tW nQ output; see Figure 4 nS input HIGH; minimum width; see Figure 4 nR input HIGH; minimum width; see Figure 4 Note: The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 7 页 共 13 页 XBLW CD4043 Quad R/S Latch Testing Circuit AC Testing Circuit Figure 3. Test circuit for switching times Definitions for test circuit: DUT=Device Under Test CL=Load capacitance including jig and probe capacitance. RT=Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT=External voltage for measuring switching times. XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 8 页 共 13 页 XBLW CD4043 Quad R/S Latch AC Testing Waveforms Figure 4. Input minimum set (nS) and reset (nR) pulse widths, inputs nS or nR to latch output (nQ) propagation delay and nQ transition time Figure 5. Output enable (OE) to latch output (nQ) enable time (tPZL and tPZH) and disable time (tPLZ and tPHZ) Measurement Points Supply voltage VDD 5V to 15V Input VI VDD or 0V VM 0.5×VDD VM 0.5×VDD Output VX 0.1×VDD VY 0.9×VDD Test Data Supply voltage VDD XBLW version 1.0 Input VI Load tr , t f CL RL tPLH,tPHL VEXT tPLZ,tPZL 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ tPHZ,tPZH 第 9 页 共 13 页 XBLW CD4043 Quad R/S Latch 5V to 15V VDD ≤20ns 50pF open 1KΩ VDD GND Package Information DIP16 Symbol A A1 A2 B B1 C D E E1 e XBLW version 1.0 Dimensions In Millimeters Min Max 3.710 4.310 0.510 3.200 3.600 0.380 0.570 1.524(BSC) 0.204 0.360 18.800 19.200 6.200 6.600 7.320 7.920 2.540(BSC) Dimensions In Inches Min Max 0.146 0.170 0.020 0.126 0.142 0.015 0.022 0.060(BSC) 0.008 0.014 0.740 0.756 0.244 0.260 0.288 0.312 0.100(BSC) 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 10 页 共 13 页 XBLW CD4043 Quad R/S Latch L E2 3.000 8.400 3.600 9.000 0.118 0.331 0.142 0.354 SOP16 Symbol A A1 A2 b c D E E1 e L XBLW version 1.0 Dimens ons In Millimeters Min Max 1.350 1.750 0.100 0.250 1.350 1.550 0.330 0.510 0.170 0.250 9.800 10.200 3.800 4.000 5.800 6.200 1.270(BSC) 0.400 1.270 Dimensi ons In Inches Min Max 0.053 0.069 0.004 0.010 0.053 0.061 0.013 0.020 0.007 0.010 0.386 0.402 0.150 0.157 0.228 0.244 0.050(BSC) 0.016 0.050 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 11 页 共 13 页 XBLW CD4043 Quad R/S Latch 0° θ 8° 0° 8° TSSOP16 MILLIMETER MIN NOM MAX SYMBOL A Al A2 A3 b bl c cl D E E1 e L L1 θ 0.05 0.90 0.39 0.20 0.19 0.13 0.12 4.90 6.20 4.30 1.00 0.44 0.22 0.13 5.00 6.40 4.40 0.65BSC 0.60 1.00BSC - 0.45 0 1.20 0.15 1.05 0.49 0.28 0.25 0.17 0.14 5.10 6.60 4.50 0.75 8° Statements And Notes Part name Lead and lead compounds Lead frame ○ Plastic resin ○ ○ ○ ○ ○ ○ Chip ○ ○ ○ ○ ○ The lead Plastic sheet installed ○ ○ ○ ○ ○ ○ ○ ○ explanation Cadmium and cadmium compounds ○ Hazardous substances or Elements Polybro Hexavalent Polybro minated Dibutyl chromium minated phthalate biphenyl compounds biphenyls ethers ○ ○ ○ ○ Mercury and mercury compounds ○ Butyl benzyl phthalate Di-2ethylhexyl phthalate Diisobutyl phthalate ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○: Indicates that the content of hazardous substances or elements in the detection limit of the following the SJ/T11363-2006 standard. ×: Indicates that the content of hazardous substances or elements exceeding the SJ/T11363-2006 Standard limit requirements XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 12 页 共 13 页 XBLW CD4043 Quad R/S Latch Statement：  Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice! Before placing an order, the customer needs to confirm whether the information obtained is the latest version, and verify the integrity of the relevant information.  Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be responsible for complying with safety standards in the system design and whole machine manufacturing using Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk of failure may result in personal injury or property losses of the situation occurred!  Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide customers with better performance, better quality of integrated circuit products. XBLW version 1.0 文档仅供参考，实际应用测试为准 ｗｗｗ．ｘｉｎｂｏｌｅｉｃ．ｃｏｍ　　　　　　　技术支持热线：４００９６８２００３ 第 13 页 共 13 页